Lines Matching +full:dev +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
7 * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
12 #include <linux/platform_data/gpio-ath79.h>
43 static u32 ath79_gpio_read(struct ath79_gpio_ctrl *ctrl, unsigned reg) in ath79_gpio_read() argument
45 return readl(ctrl->base + reg); in ath79_gpio_read()
48 static void ath79_gpio_write(struct ath79_gpio_ctrl *ctrl, in ath79_gpio_write() argument
51 writel(val, ctrl->base + reg); in ath79_gpio_write()
55 struct ath79_gpio_ctrl *ctrl, unsigned reg, u32 mask, u32 bits) in ath79_gpio_update_bits() argument
59 old_val = ath79_gpio_read(ctrl, reg); in ath79_gpio_update_bits()
63 ath79_gpio_write(ctrl, reg, new_val); in ath79_gpio_update_bits()
70 struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data); in ath79_gpio_irq_unmask() local
74 raw_spin_lock_irqsave(&ctrl->lock, flags); in ath79_gpio_irq_unmask()
75 ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask); in ath79_gpio_irq_unmask()
76 raw_spin_unlock_irqrestore(&ctrl->lock, flags); in ath79_gpio_irq_unmask()
81 struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data); in ath79_gpio_irq_mask() local
85 raw_spin_lock_irqsave(&ctrl->lock, flags); in ath79_gpio_irq_mask()
86 ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0); in ath79_gpio_irq_mask()
87 raw_spin_unlock_irqrestore(&ctrl->lock, flags); in ath79_gpio_irq_mask()
92 struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data); in ath79_gpio_irq_enable() local
96 raw_spin_lock_irqsave(&ctrl->lock, flags); in ath79_gpio_irq_enable()
97 ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, mask); in ath79_gpio_irq_enable()
98 ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, mask); in ath79_gpio_irq_enable()
99 raw_spin_unlock_irqrestore(&ctrl->lock, flags); in ath79_gpio_irq_enable()
104 struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data); in ath79_gpio_irq_disable() local
108 raw_spin_lock_irqsave(&ctrl->lock, flags); in ath79_gpio_irq_disable()
109 ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_MASK, mask, 0); in ath79_gpio_irq_disable()
110 ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, 0); in ath79_gpio_irq_disable()
111 raw_spin_unlock_irqrestore(&ctrl->lock, flags); in ath79_gpio_irq_disable()
117 struct ath79_gpio_ctrl *ctrl = irq_data_to_ath79_gpio(data); in ath79_gpio_irq_set_type() local
138 return -EINVAL; in ath79_gpio_irq_set_type()
141 raw_spin_lock_irqsave(&ctrl->lock, flags); in ath79_gpio_irq_set_type()
144 ctrl->both_edges |= mask; in ath79_gpio_irq_set_type()
145 polarity = ~ath79_gpio_read(ctrl, AR71XX_GPIO_REG_IN); in ath79_gpio_irq_set_type()
147 ctrl->both_edges &= ~mask; in ath79_gpio_irq_set_type()
155 ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, 0); in ath79_gpio_irq_set_type()
158 ctrl, AR71XX_GPIO_REG_INT_TYPE, mask, type); in ath79_gpio_irq_set_type()
160 ctrl, AR71XX_GPIO_REG_INT_POLARITY, mask, polarity); in ath79_gpio_irq_set_type()
164 ctrl, AR71XX_GPIO_REG_INT_ENABLE, mask, mask); in ath79_gpio_irq_set_type()
166 raw_spin_unlock_irqrestore(&ctrl->lock, flags); in ath79_gpio_irq_set_type()
172 .name = "gpio-ath79",
184 struct ath79_gpio_ctrl *ctrl = in ath79_gpio_irq_handler() local
192 raw_spin_lock_irqsave(&ctrl->lock, flags); in ath79_gpio_irq_handler()
194 pending = ath79_gpio_read(ctrl, AR71XX_GPIO_REG_INT_PENDING); in ath79_gpio_irq_handler()
197 both_edges = ctrl->both_edges & pending; in ath79_gpio_irq_handler()
199 state = ath79_gpio_read(ctrl, AR71XX_GPIO_REG_IN); in ath79_gpio_irq_handler()
200 ath79_gpio_update_bits(ctrl, AR71XX_GPIO_REG_INT_POLARITY, in ath79_gpio_irq_handler()
204 raw_spin_unlock_irqrestore(&ctrl->lock, flags); in ath79_gpio_irq_handler()
207 for_each_set_bit(irq, &pending, gc->ngpio) in ath79_gpio_irq_handler()
209 irq_linear_revmap(gc->irq.domain, irq)); in ath79_gpio_irq_handler()
216 { .compatible = "qca,ar7100-gpio" },
217 { .compatible = "qca,ar9340-gpio" },
224 struct ath79_gpio_platform_data *pdata = dev_get_platdata(&pdev->dev); in ath79_gpio_probe()
225 struct device *dev = &pdev->dev; in ath79_gpio_probe() local
226 struct device_node *np = dev->of_node; in ath79_gpio_probe()
227 struct ath79_gpio_ctrl *ctrl; in ath79_gpio_probe() local
233 ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); in ath79_gpio_probe()
234 if (!ctrl) in ath79_gpio_probe()
235 return -ENOMEM; in ath79_gpio_probe()
236 platform_set_drvdata(pdev, ctrl); in ath79_gpio_probe()
241 dev_err(dev, "ngpios property is not valid\n"); in ath79_gpio_probe()
244 oe_inverted = of_device_is_compatible(np, "qca,ar9340-gpio"); in ath79_gpio_probe()
246 ath79_gpio_count = pdata->ngpios; in ath79_gpio_probe()
247 oe_inverted = pdata->oe_inverted; in ath79_gpio_probe()
249 dev_err(dev, "No DT node or platform data found\n"); in ath79_gpio_probe()
250 return -EINVAL; in ath79_gpio_probe()
254 dev_err(dev, "ngpios must be less than 32\n"); in ath79_gpio_probe()
255 return -EINVAL; in ath79_gpio_probe()
258 ctrl->base = devm_platform_ioremap_resource(pdev, 0); in ath79_gpio_probe()
259 if (IS_ERR(ctrl->base)) in ath79_gpio_probe()
260 return PTR_ERR(ctrl->base); in ath79_gpio_probe()
262 raw_spin_lock_init(&ctrl->lock); in ath79_gpio_probe()
263 err = bgpio_init(&ctrl->gc, dev, 4, in ath79_gpio_probe()
264 ctrl->base + AR71XX_GPIO_REG_IN, in ath79_gpio_probe()
265 ctrl->base + AR71XX_GPIO_REG_SET, in ath79_gpio_probe()
266 ctrl->base + AR71XX_GPIO_REG_CLEAR, in ath79_gpio_probe()
267 oe_inverted ? NULL : ctrl->base + AR71XX_GPIO_REG_OE, in ath79_gpio_probe()
268 oe_inverted ? ctrl->base + AR71XX_GPIO_REG_OE : NULL, in ath79_gpio_probe()
271 dev_err(dev, "bgpio_init failed\n"); in ath79_gpio_probe()
275 ctrl->gc.base = 0; in ath79_gpio_probe()
278 if (!np || of_property_read_bool(np, "interrupt-controller")) { in ath79_gpio_probe()
279 girq = &ctrl->gc.irq; in ath79_gpio_probe()
280 girq->chip = &ath79_gpio_irqchip; in ath79_gpio_probe()
281 girq->parent_handler = ath79_gpio_irq_handler; in ath79_gpio_probe()
282 girq->num_parents = 1; in ath79_gpio_probe()
283 girq->parents = devm_kcalloc(dev, 1, sizeof(*girq->parents), in ath79_gpio_probe()
285 if (!girq->parents) in ath79_gpio_probe()
286 return -ENOMEM; in ath79_gpio_probe()
287 girq->parents[0] = platform_get_irq(pdev, 0); in ath79_gpio_probe()
288 girq->default_type = IRQ_TYPE_NONE; in ath79_gpio_probe()
289 girq->handler = handle_simple_irq; in ath79_gpio_probe()
292 err = devm_gpiochip_add_data(dev, &ctrl->gc, ctrl); in ath79_gpio_probe()
294 dev_err(dev, in ath79_gpio_probe()
303 .name = "ath79-gpio",