Lines Matching +full:ep9301 +full:- +full:adc
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Driver for ADC module on the Cirrus Logic EP93xx series of SoCs
27 * lower ADC conversion rate down to CONFIG_HZ, so we fallback to busy wait
30 * HR Timers-based version loads CPU only up to 10% during back to back ADC
31 * conversion, while busy wait-based version consumes whole CPU power.
63 * Numbering scheme for channels 0..4 is defined in EP9301 and EP9302 datasheets.
88 mutex_lock(&priv->lock); in ep93xx_read_raw()
89 if (priv->lastch != channel->channel) { in ep93xx_read_raw()
90 priv->lastch = channel->channel; in ep93xx_read_raw()
92 * Switch register is software-locked, unlocking must be in ep93xx_read_raw()
96 writel_relaxed(0xAA, priv->base + EP93XX_ADC_SW_LOCK); in ep93xx_read_raw()
97 writel_relaxed(channel->address, in ep93xx_read_raw()
98 priv->base + EP93XX_ADC_SWITCH); in ep93xx_read_raw()
107 readl_relaxed(priv->base + EP93XX_ADC_RESULT); in ep93xx_read_raw()
117 t = readl_relaxed(priv->base + EP93XX_ADC_RESULT); in ep93xx_read_raw()
124 dev_err(&iiodev->dev, "Conversion timeout\n"); in ep93xx_read_raw()
125 ret = -ETIMEDOUT; in ep93xx_read_raw()
131 mutex_unlock(&priv->lock); in ep93xx_read_raw()
135 /* According to datasheet, range is -25000..25000 */ in ep93xx_read_raw()
146 return -EINVAL; in ep93xx_read_raw()
161 iiodev = devm_iio_device_alloc(&pdev->dev, sizeof(*priv)); in ep93xx_adc_probe()
163 return -ENOMEM; in ep93xx_adc_probe()
167 priv->base = devm_ioremap_resource(&pdev->dev, res); in ep93xx_adc_probe()
168 if (IS_ERR(priv->base)) { in ep93xx_adc_probe()
169 dev_err(&pdev->dev, "Cannot map memory resource\n"); in ep93xx_adc_probe()
170 return PTR_ERR(priv->base); in ep93xx_adc_probe()
173 iiodev->name = dev_name(&pdev->dev); in ep93xx_adc_probe()
174 iiodev->modes = INDIO_DIRECT_MODE; in ep93xx_adc_probe()
175 iiodev->info = &ep93xx_adc_info; in ep93xx_adc_probe()
176 iiodev->num_channels = ARRAY_SIZE(ep93xx_adc_channels); in ep93xx_adc_probe()
177 iiodev->channels = ep93xx_adc_channels; in ep93xx_adc_probe()
179 priv->lastch = -1; in ep93xx_adc_probe()
180 mutex_init(&priv->lock); in ep93xx_adc_probe()
184 priv->clk = devm_clk_get(&pdev->dev, NULL); in ep93xx_adc_probe()
185 if (IS_ERR(priv->clk)) { in ep93xx_adc_probe()
186 dev_err(&pdev->dev, "Cannot obtain clock\n"); in ep93xx_adc_probe()
187 return PTR_ERR(priv->clk); in ep93xx_adc_probe()
190 pclk = clk_get_parent(priv->clk); in ep93xx_adc_probe()
192 dev_warn(&pdev->dev, "Cannot obtain parent clock\n"); in ep93xx_adc_probe()
196 * EP93xx ADC supports two clock divisors -- 4 and 16, in ep93xx_adc_probe()
201 ret = clk_set_rate(priv->clk, clk_get_rate(pclk) / 16); in ep93xx_adc_probe()
203 dev_warn(&pdev->dev, "Cannot set clock rate\n"); in ep93xx_adc_probe()
210 ret = clk_enable(priv->clk); in ep93xx_adc_probe()
212 dev_err(&pdev->dev, "Cannot enable clock\n"); in ep93xx_adc_probe()
218 clk_disable(priv->clk); in ep93xx_adc_probe()
229 clk_disable(priv->clk); in ep93xx_adc_remove()
236 .name = "ep93xx-adc",
244 MODULE_DESCRIPTION("Cirrus Logic EP93XX ADC driver");
246 MODULE_ALIAS("platform:ep93xx-adc");