1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/interrupt.h>
19 /* Interrupt numbers per mbigen node supported */
22 /* 64 irqs (Pin0-pin63) are reserved for each mbigen chip */
45  * of interrupt
50  * offset of interrupt type register
51  * This register is used to configure interrupt
57  * struct mbigen_device - holds the information of mbigen device.
60  * @base:		mapped address of this mbigen chip.
64 	void __iomem		*base;  member
71 	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;  in get_mbigen_vec_reg()
84 	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;  in get_mbigen_type_reg()
106 	void __iomem *base = data->chip_data;  in mbigen_eoi_irq()  local
109 	get_mbigen_clear_reg(data->hwirq, &mask, &addr);  in mbigen_eoi_irq()
111 	writel_relaxed(mask, base + addr);  in mbigen_eoi_irq()
118 	void __iomem *base = data->chip_data;  in mbigen_set_type()  local
122 		return -EINVAL;  in mbigen_set_type()
124 	get_mbigen_type_reg(data->hwirq, &mask, &addr);  in mbigen_set_type()
126 	val = readl_relaxed(base + addr);  in mbigen_set_type()
133 	writel_relaxed(val, base + addr);  in mbigen_set_type()
139 	.name =			"mbigen-v2",
149 	struct irq_data *d = irq_get_irq_data(desc->irq);  in mbigen_write_msg()
150 	void __iomem *base = d->chip_data;  in mbigen_write_msg()  local
153 	if (!msg->address_lo && !msg->address_hi)  in mbigen_write_msg()
156 	base += get_mbigen_vec_reg(d->hwirq);  in mbigen_write_msg()
157 	val = readl_relaxed(base);  in mbigen_write_msg()
160 	val |= (msg->data << IRQ_EVENT_ID_SHIFT);  in mbigen_write_msg()
165 	writel_relaxed(val, base);  in mbigen_write_msg()
173 	if (is_of_node(fwspec->fwnode) || is_acpi_device_node(fwspec->fwnode)) {  in mbigen_domain_translate()
174 		if (fwspec->param_count != 2)  in mbigen_domain_translate()
175 			return -EINVAL;  in mbigen_domain_translate()
177 		if ((fwspec->param[0] > MAXIMUM_IRQ_PIN_NUM) ||  in mbigen_domain_translate()
178 			(fwspec->param[0] < RESERVED_IRQ_PER_MBIGEN_CHIP))  in mbigen_domain_translate()
179 			return -EINVAL;  in mbigen_domain_translate()
181 			*hwirq = fwspec->param[0];  in mbigen_domain_translate()
184 		if ((fwspec->param[1] == IRQ_TYPE_EDGE_RISING) ||  in mbigen_domain_translate()
185 			(fwspec->param[1] == IRQ_TYPE_LEVEL_HIGH))  in mbigen_domain_translate()
186 			*type = fwspec->param[1];  in mbigen_domain_translate()
188 			return -EINVAL;  in mbigen_domain_translate()
192 	return -EINVAL;  in mbigen_domain_translate()
218 				      &mbigen_irq_chip, mgn_chip->base);  in mbigen_irq_domain_alloc()
239 	struct platform_device *child;  in mbigen_of_create_domain()  local
244 	for_each_child_of_node(pdev->dev.of_node, np) {  in mbigen_of_create_domain()
245 		if (!of_property_read_bool(np, "interrupt-controller"))  in mbigen_of_create_domain()
249 		child = of_platform_device_create(np, NULL, parent);  in mbigen_of_create_domain()
250 		if (!child) {  in mbigen_of_create_domain()
252 			return -ENOMEM;  in mbigen_of_create_domain()
255 		if (of_property_read_u32(child->dev.of_node, "num-pins",  in mbigen_of_create_domain()
257 			dev_err(&pdev->dev, "No num-pins property\n");  in mbigen_of_create_domain()
259 			return -EINVAL;  in mbigen_of_create_domain()
262 		domain = platform_msi_create_device_domain(&child->dev, num_pins,  in mbigen_of_create_domain()
268 			return -ENOMEM;  in mbigen_of_create_domain()
284 	 * "num-pins" is the total number of interrupt pins implemented in  in mbigen_acpi_create_domain()
285 	 * this mbigen instance, and mbigen is an interrupt controller  in mbigen_acpi_create_domain()
287 	 * use "num-pins" to alloc MSI vectors which are needed by client  in mbigen_acpi_create_domain()
299 	 *			ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),  in mbigen_acpi_create_domain()
301 	 *				Package () {"num-pins", 378}  in mbigen_acpi_create_domain()
306 	ret = device_property_read_u32(&pdev->dev, "num-pins", &num_pins);  in mbigen_acpi_create_domain()
308 		return -EINVAL;  in mbigen_acpi_create_domain()
310 	domain = platform_msi_create_device_domain(&pdev->dev, num_pins,  in mbigen_acpi_create_domain()
315 		return -ENOMEM;  in mbigen_acpi_create_domain()
323 	return -ENODEV;  in mbigen_acpi_create_domain()
333 	mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL);  in mbigen_device_probe()
335 		return -ENOMEM;  in mbigen_device_probe()
337 	mgn_chip->pdev = pdev;  in mbigen_device_probe()
341 		return -EINVAL;  in mbigen_device_probe()
343 	mgn_chip->base = devm_ioremap(&pdev->dev, res->start,  in mbigen_device_probe()
345 	if (!mgn_chip->base) {  in mbigen_device_probe()
346 		dev_err(&pdev->dev, "failed to ioremap %pR\n", res);  in mbigen_device_probe()
347 		return -ENOMEM;  in mbigen_device_probe()
350 	if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)  in mbigen_device_probe()
352 	else if (ACPI_COMPANION(&pdev->dev))  in mbigen_device_probe()
355 		err = -EINVAL;  in mbigen_device_probe()
358 		dev_err(&pdev->dev, "Failed to create mbi-gen irqdomain\n");  in mbigen_device_probe()
367 	{ .compatible = "hisilicon,mbigen-v2" },
380 		.name		= "Hisilicon MBIGEN-V2",