Lines Matching +full:prcmu +full:- +full:clock
1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) ST-Ericsson SA 2010
35 #include <linux/mfd/dbx500-prcmu.h>
37 #include <linux/regulator/db8500-prcmu.h>
40 #include "dbx500-prcmu-regs.h"
228 #define ALL_MBOX_BITS (MBOX_BIT(NUM_MB) - 1)
273 * communication with the PRCMU firmware.
333 #define VALID_WAKEUPS (BIT(NUM_PRCMU_WAKEUP_INDICES) - 1)
348 * mb0_transfer - state needed for mailbox 0 communication.
369 * mb1_transfer - state needed for mailbox 1 communication.
388 * mb2_transfer - state needed for mailbox 2 communication.
407 * mb3_transfer - state needed for mailbox 3 communication.
419 * mb4_transfer - state needed for mailbox 4 communication.
429 * mb5_transfer - state needed for mailbox 5 communication.
581 return ver && ver->project == PRCMU_FW_PROJECT_U8420_SYSCLK; in prcmu_is_ulppll_disabled()
591 * prcmu_set_rc_a2p - This function is used to run few power state sequences
593 * Returns: 0 on success, -EINVAL on invalid argument
595 * This function is used to run the following power state sequences -
601 return -EINVAL; in prcmu_set_rc_a2p()
607 * prcmu_get_rc_p2a - This function is used to get power state sequences
610 * This function can return the following transitions-
619 * prcmu_get_current_mode - Return the current XP70 power mode
629 * prcmu_config_clkout - Configure one of the programmable clock outputs.
631 * @source: The clock to be used (one of the PRCMU_CLKSRC_*).
634 * Configures one of the programmable clock outputs (CLKOUTs).
653 return -EINVAL; in prcmu_config_clkout()
675 r = -EBUSY; in prcmu_config_clkout()
680 r = -EINVAL; in prcmu_config_clkout()
686 requests[clkout] += (div ? 1 : -1); in prcmu_config_clkout()
798 * db8500_prcmu_set_arm_opp - set the appropriate ARM OPP
800 * Returns: 0 on success, non-zero on failure
809 return -EINVAL; in db8500_prcmu_set_arm_opp()
827 r = -EIO; in db8500_prcmu_set_arm_opp()
835 * db8500_prcmu_get_arm_opp - get the current ARM OPP
845 * db8500_prcmu_get_ddr_opp - get the current DDR OPP
878 pr_err("prcmu: Bad clock divider %d in %s\n", in request_even_slower_clocks()
901 * db8500_set_ape_opp - set the appropriate APE OPP
903 * Returns: 0 on success, non-zero on failure
935 r = -EIO; in db8500_prcmu_set_ape_opp()
950 * db8500_prcmu_get_ape_opp - get the current APE OPP
960 * db8500_prcmu_request_ape_opp_100_voltage - Request APE OPP 100% voltage
979 r = -EIO; in db8500_prcmu_request_ape_opp_100_voltage()
981 } else if (1 != requests--) { in db8500_prcmu_request_ape_opp_100_voltage()
997 r = -EIO; in db8500_prcmu_request_ape_opp_100_voltage()
1006 * prcmu_release_usb_wakeup_state - release the state required by a USB wakeup
1027 r = -EIO; in prcmu_release_usb_wakeup_state()
1034 static int request_pll(u8 clock, bool enable) in request_pll() argument
1038 if (clock == PRCMU_PLLSOC0) in request_pll()
1039 clock = (enable ? PLL_SOC0_ON : PLL_SOC0_OFF); in request_pll()
1040 else if (clock == PRCMU_PLLSOC1) in request_pll()
1041 clock = (enable ? PLL_SOC1_ON : PLL_SOC1_OFF); in request_pll()
1043 return -EINVAL; in request_pll()
1051 writeb(clock, (tcdm_base + PRCM_REQ_MB1_PLL_ON_OFF)); in request_pll()
1057 r = -EIO; in request_pll()
1065 * db8500_prcmu_set_epod - set the state of a EPOD (power domain)
1118 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in db8500_prcmu_set_epod()
1120 r = -EIO; in db8500_prcmu_set_epod()
1125 r = -EIO; in db8500_prcmu_set_epod()
1133 * prcmu_configure_auto_pm - Configure autonomous power management.
1146 sleep_cfg = (sleep->sva_auto_pm_enable & 0xF); in prcmu_configure_auto_pm()
1147 sleep_cfg = ((sleep_cfg << 4) | (sleep->sia_auto_pm_enable & 0xF)); in prcmu_configure_auto_pm()
1148 sleep_cfg = ((sleep_cfg << 8) | (sleep->sva_power_on & 0xFF)); in prcmu_configure_auto_pm()
1149 sleep_cfg = ((sleep_cfg << 8) | (sleep->sia_power_on & 0xFF)); in prcmu_configure_auto_pm()
1150 sleep_cfg = ((sleep_cfg << 4) | (sleep->sva_policy & 0xF)); in prcmu_configure_auto_pm()
1151 sleep_cfg = ((sleep_cfg << 4) | (sleep->sia_policy & 0xF)); in prcmu_configure_auto_pm()
1153 idle_cfg = (idle->sva_auto_pm_enable & 0xF); in prcmu_configure_auto_pm()
1154 idle_cfg = ((idle_cfg << 4) | (idle->sia_auto_pm_enable & 0xF)); in prcmu_configure_auto_pm()
1155 idle_cfg = ((idle_cfg << 8) | (idle->sva_power_on & 0xFF)); in prcmu_configure_auto_pm()
1156 idle_cfg = ((idle_cfg << 8) | (idle->sia_power_on & 0xFF)); in prcmu_configure_auto_pm()
1157 idle_cfg = ((idle_cfg << 4) | (idle->sva_policy & 0xF)); in prcmu_configure_auto_pm()
1158 idle_cfg = ((idle_cfg << 4) | (idle->sia_policy & 0xF)); in prcmu_configure_auto_pm()
1165 * variables - i.e. there is no need to send a message. in prcmu_configure_auto_pm()
1171 ((sleep->sva_auto_pm_enable == PRCMU_AUTO_PM_ON) || in prcmu_configure_auto_pm()
1172 (sleep->sia_auto_pm_enable == PRCMU_AUTO_PM_ON) || in prcmu_configure_auto_pm()
1173 (idle->sva_auto_pm_enable == PRCMU_AUTO_PM_ON) || in prcmu_configure_auto_pm()
1174 (idle->sia_auto_pm_enable == PRCMU_AUTO_PM_ON)); in prcmu_configure_auto_pm()
1212 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in request_sysclk()
1214 r = -EIO; in request_sysclk()
1229 * stop the clock on this firmware. in request_timclk()
1246 static int request_clock(u8 clock, bool enable) in request_clock() argument
1257 val = readl(prcmu_base + clk_mgt[clock].offset); in request_clock()
1259 val |= (PRCM_CLK_MGT_CLKEN | clk_mgt[clock].pllsw); in request_clock()
1261 clk_mgt[clock].pllsw = (val & PRCM_CLK_MGT_CLKPLLSW_MASK); in request_clock()
1264 writel(val, prcmu_base + clk_mgt[clock].offset); in request_clock()
1274 static int request_sga_clock(u8 clock, bool enable) in request_sga_clock() argument
1284 ret = request_clock(clock, enable); in request_sga_clock()
1323 for (i = 10; !locked && (i > 0); --i) { in request_plldsi()
1336 r = -EAGAIN; in request_plldsi()
1367 * db8500_prcmu_request_clock() - Request for a clock to be enabled or disabled.
1368 * @clock: The clock for which the request is made.
1369 * @enable: Whether the clock should be enabled (true) or disabled (false).
1371 * This function should only be used by the clock implementation.
1374 int db8500_prcmu_request_clock(u8 clock, bool enable) in db8500_prcmu_request_clock() argument
1376 if (clock == PRCMU_SGACLK) in db8500_prcmu_request_clock()
1377 return request_sga_clock(clock, enable); in db8500_prcmu_request_clock()
1378 else if (clock < PRCMU_NUM_REG_CLOCKS) in db8500_prcmu_request_clock()
1379 return request_clock(clock, enable); in db8500_prcmu_request_clock()
1380 else if (clock == PRCMU_TIMCLK) in db8500_prcmu_request_clock()
1382 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in db8500_prcmu_request_clock()
1383 return request_dsiclk((clock - PRCMU_DSI0CLK), enable); in db8500_prcmu_request_clock()
1384 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in db8500_prcmu_request_clock()
1385 return request_dsiescclk((clock - PRCMU_DSI0ESCCLK), enable); in db8500_prcmu_request_clock()
1386 else if (clock == PRCMU_PLLDSI) in db8500_prcmu_request_clock()
1388 else if (clock == PRCMU_SYSCLK) in db8500_prcmu_request_clock()
1390 else if ((clock == PRCMU_PLLSOC0) || (clock == PRCMU_PLLSOC1)) in db8500_prcmu_request_clock()
1391 return request_pll(clock, enable); in db8500_prcmu_request_clock()
1393 return -EINVAL; in db8500_prcmu_request_clock()
1434 static unsigned long clock_rate(u8 clock) in clock_rate() argument
1440 val = readl(prcmu_base + clk_mgt[clock].offset); in clock_rate()
1443 if (clk_mgt[clock].clk38div && (val & PRCM_CLK_MGT_CLK38DIV)) in clock_rate()
1448 val |= clk_mgt[clock].pllsw; in clock_rate()
1452 rate = pll_rate(PRCM_PLLSOC0_FREQ, rate, clk_mgt[clock].branch); in clock_rate()
1454 rate = pll_rate(PRCM_PLLSOC1_FREQ, rate, clk_mgt[clock].branch); in clock_rate()
1456 rate = pll_rate(PRCM_PLLDDR_FREQ, rate, clk_mgt[clock].branch); in clock_rate()
1460 if ((clock == PRCMU_SGACLK) && in clock_rate()
1482 /* External ARMCLKFIX clock */ in armss_rate()
1539 unsigned long prcmu_clock_rate(u8 clock) in prcmu_clock_rate() argument
1541 if (clock < PRCMU_NUM_REG_CLOCKS) in prcmu_clock_rate()
1542 return clock_rate(clock); in prcmu_clock_rate()
1543 else if (clock == PRCMU_TIMCLK) in prcmu_clock_rate()
1546 else if (clock == PRCMU_SYSCLK) in prcmu_clock_rate()
1548 else if (clock == PRCMU_PLLSOC0) in prcmu_clock_rate()
1550 else if (clock == PRCMU_PLLSOC1) in prcmu_clock_rate()
1552 else if (clock == PRCMU_ARMSS) in prcmu_clock_rate()
1554 else if (clock == PRCMU_PLLDDR) in prcmu_clock_rate()
1556 else if (clock == PRCMU_PLLDSI) in prcmu_clock_rate()
1559 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in prcmu_clock_rate()
1560 return dsiclk_rate(clock - PRCMU_DSI0CLK); in prcmu_clock_rate()
1561 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_clock_rate()
1562 return dsiescclk_rate(clock - PRCMU_DSI0ESCCLK); in prcmu_clock_rate()
1594 static long round_clock_rate(u8 clock, unsigned long rate) in round_clock_rate() argument
1601 val = readl(prcmu_base + clk_mgt[clock].offset); in round_clock_rate()
1602 src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), in round_clock_rate()
1603 clk_mgt[clock].branch); in round_clock_rate()
1606 if (clk_mgt[clock].clk38div) { in round_clock_rate()
1612 } else if ((clock == PRCMU_SGACLK) && (div == 3)) { in round_clock_rate()
1678 for (r = 7; (rem > 0) && (r > 0); r--) { in round_plldsi_rate()
1697 if ((rate - d) < rem) { in round_plldsi_rate()
1698 rem = (rate - d); in round_plldsi_rate()
1732 long prcmu_round_clock_rate(u8 clock, unsigned long rate) in prcmu_round_clock_rate() argument
1734 if (clock < PRCMU_NUM_REG_CLOCKS) in prcmu_round_clock_rate()
1735 return round_clock_rate(clock, rate); in prcmu_round_clock_rate()
1736 else if (clock == PRCMU_ARMSS) in prcmu_round_clock_rate()
1738 else if (clock == PRCMU_PLLDSI) in prcmu_round_clock_rate()
1740 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in prcmu_round_clock_rate()
1742 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_round_clock_rate()
1745 return (long)prcmu_clock_rate(clock); in prcmu_round_clock_rate()
1748 static void set_clock_rate(u8 clock, unsigned long rate) in set_clock_rate() argument
1761 val = readl(prcmu_base + clk_mgt[clock].offset); in set_clock_rate()
1762 src_rate = clock_source_rate((val | clk_mgt[clock].pllsw), in set_clock_rate()
1763 clk_mgt[clock].branch); in set_clock_rate()
1766 if (clk_mgt[clock].clk38div) { in set_clock_rate()
1772 } else if (clock == PRCMU_SGACLK) { in set_clock_rate()
1789 writel(val, prcmu_base + clk_mgt[clock].offset); in set_clock_rate()
1821 return -EINVAL; in set_armss_rate()
1838 for (r = 7; (rem > 0) && (r > 0); r--) { in set_plldsi_rate()
1859 if ((rate - hwrate) < rem) { in set_plldsi_rate()
1860 rem = (rate - hwrate); in set_plldsi_rate()
1866 return -EINVAL; in set_plldsi_rate()
1904 int prcmu_set_clock_rate(u8 clock, unsigned long rate) in prcmu_set_clock_rate() argument
1906 if (clock < PRCMU_NUM_REG_CLOCKS) in prcmu_set_clock_rate()
1907 set_clock_rate(clock, rate); in prcmu_set_clock_rate()
1908 else if (clock == PRCMU_ARMSS) in prcmu_set_clock_rate()
1910 else if (clock == PRCMU_PLLDSI) in prcmu_set_clock_rate()
1912 else if ((clock == PRCMU_DSI0CLK) || (clock == PRCMU_DSI1CLK)) in prcmu_set_clock_rate()
1913 set_dsiclk_rate((clock - PRCMU_DSI0CLK), rate); in prcmu_set_clock_rate()
1914 else if ((PRCMU_DSI0ESCCLK <= clock) && (clock <= PRCMU_DSI2ESCCLK)) in prcmu_set_clock_rate()
1915 set_dsiescclk_rate((clock - PRCMU_DSI0ESCCLK), rate); in prcmu_set_clock_rate()
1923 return -EINVAL; in db8500_prcmu_config_esram0_deep_sleep()
2006 return -EINVAL; in db8500_prcmu_start_temp_sense()
2088 * prcmu_abb_read() - Read register value(s) from the ABB.
2102 return -EINVAL; in prcmu_abb_read()
2119 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in prcmu_abb_read()
2121 r = -EIO; in prcmu_abb_read()
2123 r = ((mb5_transfer.ack.status == I2C_RD_OK) ? 0 : -EIO); in prcmu_abb_read()
2135 * prcmu_abb_write_masked() - Write masked register value(s) to the ABB.
2152 return -EINVAL; in prcmu_abb_write_masked()
2169 pr_err("prcmu: %s timed out (20 s) waiting for a reply.\n", in prcmu_abb_write_masked()
2171 r = -EIO; in prcmu_abb_write_masked()
2173 r = ((mb5_transfer.ack.status == I2C_WR_OK) ? 0 : -EIO); in prcmu_abb_write_masked()
2182 * prcmu_abb_write() - Write register value(s) to the ABB.
2199 * prcmu_ac_wake_req - should be called whenever ARM wants to wakeup Modem
2215 * Force Modem Wake-up before hostaccess_req ping-pong. in prcmu_ac_wake_req()
2229 pr_crit("prcmu: %s timed out (5 s) waiting for a reply.\n", in prcmu_ac_wake_req()
2231 ret = -EFAULT; in prcmu_ac_wake_req()
2240 * prcmu_ac_sleep_req - called when ARM no longer needs to talk to modem
2257 pr_crit("prcmu: %s timed out (5 s) waiting for a reply.\n", in prcmu_ac_sleep_req()
2273 * db8500_prcmu_system_reset - System reset
2287 * db8500_prcmu_get_reset_code - Retrieve SW reset reason code
2298 * db8500_prcmu_reset_modem - ask the PRCMU to reset modem
2312 * No need to check return from PRCMU as modem should go in reset state in db8500_prcmu_modem_reset()
2336 pr_warn("prcmu: Unknown message header (%d) in mailbox %d\n", in print_unknown_header_warning()
2482 bits -= MBOX_BIT(n); in prcmu_irq_handler()
2513 mb0_transfer.req.dbb_irqs &= ~prcmu_irq_bit[d->hwirq]; in prcmu_irq_mask()
2517 if (d->irq != IRQ_PRCMU_CA_SLEEP) in prcmu_irq_mask()
2527 mb0_transfer.req.dbb_irqs |= prcmu_irq_bit[d->hwirq]; in prcmu_irq_unmask()
2531 if (d->irq != IRQ_PRCMU_CA_SLEEP) in prcmu_irq_unmask()
2540 .name = "prcmu",
2577 return "U8420-sysclk"; in fw_project_name()
2615 return -ENOSYS; in db8500_irq_init()
2632 pr_err("no prcmu tcpm mem region provided\n"); in dbx500_fw_version_init()
2645 pr_info("PRCMU firmware: %s(%d), version %d.%d.%d\n", in dbx500_fw_version_init()
2660 * clock driver can probe independently. An early initcall will in db8500_prcmu_early_init()
2665 np = of_find_compatible_node(NULL, NULL, "stericsson,db8500-prcmu"); in db8500_prcmu_early_init()
2669 pr_err("%s: ioremap() of prcmu registers failed!\n", __func__); in db8500_prcmu_early_init()
2710 REGULATOR_SUPPLY("v-ape", NULL),
2711 REGULATOR_SUPPLY("v-i2c", "nmk-i2c.0"),
2712 REGULATOR_SUPPLY("v-i2c", "nmk-i2c.1"),
2713 REGULATOR_SUPPLY("v-i2c", "nmk-i2c.2"),
2714 REGULATOR_SUPPLY("v-i2c", "nmk-i2c.3"),
2715 REGULATOR_SUPPLY("v-i2c", "nmk-i2c.4"),
2716 /* "v-mmc" changed to "vcore" in the mainline kernel */
2722 REGULATOR_SUPPLY("v-dma", "dma40.0"),
2723 REGULATOR_SUPPLY("v-ape", "ab8500-usb.0"),
2724 /* "v-uart" changed to "vcore" in the mainline kernel */
2728 REGULATOR_SUPPLY("v-ape", "nmk-ske-keypad.0"),
2729 REGULATOR_SUPPLY("v-hsi", "ste_hsi.0"),
2734 REGULATOR_SUPPLY("musb_1v8", "ab8500-usb.0"),
2736 REGULATOR_SUPPLY("hdmi_1v8", "0-0070"),
2746 REGULATOR_SUPPLY("sva-mmdsp", "cm_control"),
2751 REGULATOR_SUPPLY("sva-pipe", "cm_control"),
2756 REGULATOR_SUPPLY("sia-mmdsp", "cm_control"),
2761 REGULATOR_SUPPLY("sia-pipe", "cm_control"),
2765 REGULATOR_SUPPLY("v-mali", NULL),
2775 REGULATOR_SUPPLY("v-esram34", "mcde"),
2783 .name = "db8500-vape",
2792 .name = "db8500-varm",
2798 .name = "db8500-vmodem",
2804 .name = "db8500-vpll",
2810 .name = "db8500-vsmps1",
2816 .name = "db8500-vsmps2",
2824 .name = "db8500-vsmps3",
2830 .name = "db8500-vrf1",
2835 /* dependency to u8500-vape is handled outside regulator framework */
2837 .name = "db8500-sva-mmdsp",
2846 .name = "db8500-sva-mmdsp-ret",
2851 /* dependency to u8500-vape is handled outside regulator framework */
2853 .name = "db8500-sva-pipe",
2860 /* dependency to u8500-vape is handled outside regulator framework */
2862 .name = "db8500-sia-mmdsp",
2870 .name = "db8500-sia-mmdsp-ret",
2875 /* dependency to u8500-vape is handled outside regulator framework */
2877 .name = "db8500-sia-pipe",
2884 .supply_regulator = "db8500-vape",
2886 .name = "db8500-sga",
2894 .supply_regulator = "db8500-vape",
2896 .name = "db8500-b2r2-mcde",
2908 .name = "db8500-esram12",
2916 .name = "db8500-esram12-ret",
2926 .name = "db8500-esram34",
2934 .name = "db8500-esram34-ret",
2950 .id = -1,
2955 OF_MFD_CELL("db8500-prcmu-regulators", NULL,
2957 "stericsson,db8500-prcmu-regulator"),
2958 OF_MFD_CELL("cpuidle-dbx500",
2959 NULL, NULL, 0, 0, "stericsson,cpuidle-dbx500"),
2960 OF_MFD_CELL("db8500-thermal",
2961 NULL, NULL, 0, 0, "stericsson,db8500-thermal"),
2969 .name = "ab8500-core", in db8500_prcmu_register_ab8500()
2976 .name = "ab8505-core", in db8500_prcmu_register_ab8500()
2984 if (!parent->of_node) in db8500_prcmu_register_ab8500()
2985 return -ENODEV; in db8500_prcmu_register_ab8500()
2988 for_each_child_of_node(parent->of_node, np) { in db8500_prcmu_register_ab8500()
3000 return -ENODEV; in db8500_prcmu_register_ab8500()
3009 struct device_node *np = pdev->dev.of_node; in db8500_prcmu_probe()
3013 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcmu"); in db8500_prcmu_probe()
3015 dev_err(&pdev->dev, "no prcmu memory region provided\n"); in db8500_prcmu_probe()
3016 return -EINVAL; in db8500_prcmu_probe()
3018 prcmu_base = devm_ioremap(&pdev->dev, res->start, resource_size(res)); in db8500_prcmu_probe()
3020 dev_err(&pdev->dev, in db8500_prcmu_probe()
3021 "failed to ioremap prcmu register memory\n"); in db8500_prcmu_probe()
3022 return -ENOMEM; in db8500_prcmu_probe()
3025 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcmu-tcdm"); in db8500_prcmu_probe()
3027 dev_err(&pdev->dev, "no prcmu tcdm region provided\n"); in db8500_prcmu_probe()
3028 return -EINVAL; in db8500_prcmu_probe()
3030 tcdm_base = devm_ioremap(&pdev->dev, res->start, in db8500_prcmu_probe()
3033 dev_err(&pdev->dev, in db8500_prcmu_probe()
3034 "failed to ioremap prcmu-tcdm register memory\n"); in db8500_prcmu_probe()
3035 return -ENOMEM; in db8500_prcmu_probe()
3038 /* Clean up the mailbox interrupts after pre-kernel code. */ in db8500_prcmu_probe()
3046 prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL); in db8500_prcmu_probe()
3048 pr_err("prcmu: Failed to allocate IRQ_DB8500_PRCMU1.\n"); in db8500_prcmu_probe()
3056 err = mfd_add_devices(&pdev->dev, 0, common_prcmu_devs, in db8500_prcmu_probe()
3059 pr_err("prcmu: Failed to add subdevices\n"); in db8500_prcmu_probe()
3064 if (!of_machine_is_compatible("st-ericsson,u8540")) { in db8500_prcmu_probe()
3065 err = mfd_add_devices(&pdev->dev, 0, db8500_prcmu_devs, in db8500_prcmu_probe()
3069 mfd_remove_devices(&pdev->dev); in db8500_prcmu_probe()
3070 pr_err("prcmu: Failed to add subdevices\n"); in db8500_prcmu_probe()
3075 err = db8500_prcmu_register_ab8500(&pdev->dev); in db8500_prcmu_probe()
3077 mfd_remove_devices(&pdev->dev); in db8500_prcmu_probe()
3078 pr_err("prcmu: Failed to add ab8500 subdevice\n"); in db8500_prcmu_probe()
3082 pr_info("DB8500 PRCMU initialized\n"); in db8500_prcmu_probe()
3086 { .compatible = "stericsson,db8500-prcmu"},
3092 .name = "db8500-prcmu",