Lines Matching +full:dev +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (c) 2011-2014, Intel Corporation.
11 #include <linux/blk-mq.h>
12 #include <linux/blk-mq-pci.h>
23 #include <linux/t10-pi.h>
25 #include <linux/io-64-nonatomic-lo-hi.h>
26 #include <linux/io-64-nonatomic-hi-lo.h>
27 #include <linux/sed-opal.h>
28 #include <linux/pci-p2pdma.h>
33 #define SQ_SIZE(q) ((q)->q_depth << (q)->sqes)
34 #define CQ_SIZE(q) ((q)->q_depth * sizeof(struct nvme_completion))
80 return -EINVAL; in io_queue_count_set()
106 static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown);
107 static bool __nvme_disable_io_queues(struct nvme_dev *dev, u8 opcode);
117 struct device *dev; member
136 struct nvme_ctrl ctrl; member
166 return -EINVAL; in io_queue_depth_set()
181 static inline struct nvme_dev *to_nvme_dev(struct nvme_ctrl *ctrl) in to_nvme_dev() argument
183 return container_of(ctrl, struct nvme_dev, ctrl); in to_nvme_dev()
191 struct nvme_dev *dev; member
240 static inline unsigned int nvme_dbbuf_size(struct nvme_dev *dev) in nvme_dbbuf_size() argument
242 return dev->nr_allocated_queues * 8 * dev->db_stride; in nvme_dbbuf_size()
245 static int nvme_dbbuf_dma_alloc(struct nvme_dev *dev) in nvme_dbbuf_dma_alloc() argument
247 unsigned int mem_size = nvme_dbbuf_size(dev); in nvme_dbbuf_dma_alloc()
249 if (dev->dbbuf_dbs) in nvme_dbbuf_dma_alloc()
252 dev->dbbuf_dbs = dma_alloc_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_alloc()
253 &dev->dbbuf_dbs_dma_addr, in nvme_dbbuf_dma_alloc()
255 if (!dev->dbbuf_dbs) in nvme_dbbuf_dma_alloc()
256 return -ENOMEM; in nvme_dbbuf_dma_alloc()
257 dev->dbbuf_eis = dma_alloc_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_alloc()
258 &dev->dbbuf_eis_dma_addr, in nvme_dbbuf_dma_alloc()
260 if (!dev->dbbuf_eis) { in nvme_dbbuf_dma_alloc()
261 dma_free_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_alloc()
262 dev->dbbuf_dbs, dev->dbbuf_dbs_dma_addr); in nvme_dbbuf_dma_alloc()
263 dev->dbbuf_dbs = NULL; in nvme_dbbuf_dma_alloc()
264 return -ENOMEM; in nvme_dbbuf_dma_alloc()
270 static void nvme_dbbuf_dma_free(struct nvme_dev *dev) in nvme_dbbuf_dma_free() argument
272 unsigned int mem_size = nvme_dbbuf_size(dev); in nvme_dbbuf_dma_free()
274 if (dev->dbbuf_dbs) { in nvme_dbbuf_dma_free()
275 dma_free_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_free()
276 dev->dbbuf_dbs, dev->dbbuf_dbs_dma_addr); in nvme_dbbuf_dma_free()
277 dev->dbbuf_dbs = NULL; in nvme_dbbuf_dma_free()
279 if (dev->dbbuf_eis) { in nvme_dbbuf_dma_free()
280 dma_free_coherent(dev->dev, mem_size, in nvme_dbbuf_dma_free()
281 dev->dbbuf_eis, dev->dbbuf_eis_dma_addr); in nvme_dbbuf_dma_free()
282 dev->dbbuf_eis = NULL; in nvme_dbbuf_dma_free()
286 static void nvme_dbbuf_init(struct nvme_dev *dev, in nvme_dbbuf_init() argument
289 if (!dev->dbbuf_dbs || !qid) in nvme_dbbuf_init()
292 nvmeq->dbbuf_sq_db = &dev->dbbuf_dbs[sq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
293 nvmeq->dbbuf_cq_db = &dev->dbbuf_dbs[cq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
294 nvmeq->dbbuf_sq_ei = &dev->dbbuf_eis[sq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
295 nvmeq->dbbuf_cq_ei = &dev->dbbuf_eis[cq_idx(qid, dev->db_stride)]; in nvme_dbbuf_init()
300 if (!nvmeq->qid) in nvme_dbbuf_free()
303 nvmeq->dbbuf_sq_db = NULL; in nvme_dbbuf_free()
304 nvmeq->dbbuf_cq_db = NULL; in nvme_dbbuf_free()
305 nvmeq->dbbuf_sq_ei = NULL; in nvme_dbbuf_free()
306 nvmeq->dbbuf_cq_ei = NULL; in nvme_dbbuf_free()
309 static void nvme_dbbuf_set(struct nvme_dev *dev) in nvme_dbbuf_set() argument
314 if (!dev->dbbuf_dbs) in nvme_dbbuf_set()
319 c.dbbuf.prp1 = cpu_to_le64(dev->dbbuf_dbs_dma_addr); in nvme_dbbuf_set()
320 c.dbbuf.prp2 = cpu_to_le64(dev->dbbuf_eis_dma_addr); in nvme_dbbuf_set()
322 if (nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0)) { in nvme_dbbuf_set()
323 dev_warn(dev->ctrl.device, "unable to set dbbuf\n"); in nvme_dbbuf_set()
325 nvme_dbbuf_dma_free(dev); in nvme_dbbuf_set()
327 for (i = 1; i <= dev->online_queues; i++) in nvme_dbbuf_set()
328 nvme_dbbuf_free(&dev->queues[i]); in nvme_dbbuf_set()
334 return (u16)(new_idx - event_idx - 1) < (u16)(new_idx - old); in nvme_dbbuf_need_event()
378 return DIV_ROUND_UP(8 * nprps, NVME_CTRL_PAGE_SIZE - 8); in nvme_pci_npages_prp()
394 struct nvme_dev *dev = data; in nvme_admin_init_hctx() local
395 struct nvme_queue *nvmeq = &dev->queues[0]; in nvme_admin_init_hctx()
398 WARN_ON(dev->admin_tagset.tags[0] != hctx->tags); in nvme_admin_init_hctx()
400 hctx->driver_data = nvmeq; in nvme_admin_init_hctx()
407 struct nvme_dev *dev = data; in nvme_init_hctx() local
408 struct nvme_queue *nvmeq = &dev->queues[hctx_idx + 1]; in nvme_init_hctx()
410 WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags); in nvme_init_hctx()
411 hctx->driver_data = nvmeq; in nvme_init_hctx()
418 struct nvme_dev *dev = set->driver_data; in nvme_init_request() local
420 int queue_idx = (set == &dev->tagset) ? hctx_idx + 1 : 0; in nvme_init_request()
421 struct nvme_queue *nvmeq = &dev->queues[queue_idx]; in nvme_init_request()
424 iod->nvmeq = nvmeq; in nvme_init_request()
426 nvme_req(req)->ctrl = &dev->ctrl; in nvme_init_request()
430 static int queue_irq_offset(struct nvme_dev *dev) in queue_irq_offset() argument
433 if (dev->num_vecs > 1) in queue_irq_offset()
441 struct nvme_dev *dev = set->driver_data; in nvme_pci_map_queues() local
444 offset = queue_irq_offset(dev); in nvme_pci_map_queues()
445 for (i = 0, qoff = 0; i < set->nr_maps; i++) { in nvme_pci_map_queues()
446 struct blk_mq_queue_map *map = &set->map[i]; in nvme_pci_map_queues()
448 map->nr_queues = dev->io_queues[i]; in nvme_pci_map_queues()
449 if (!map->nr_queues) { in nvme_pci_map_queues()
456 * affinity), so use the regular blk-mq cpu mapping in nvme_pci_map_queues()
458 map->queue_offset = qoff; in nvme_pci_map_queues()
460 blk_mq_pci_map_queues(map, to_pci_dev(dev->dev), offset); in nvme_pci_map_queues()
463 qoff += map->nr_queues; in nvme_pci_map_queues()
464 offset += map->nr_queues; in nvme_pci_map_queues()
476 u16 next_tail = nvmeq->sq_tail + 1; in nvme_write_sq_db()
478 if (next_tail == nvmeq->q_depth) in nvme_write_sq_db()
480 if (next_tail != nvmeq->last_sq_tail) in nvme_write_sq_db()
484 if (nvme_dbbuf_update_and_check_event(nvmeq->sq_tail, in nvme_write_sq_db()
485 nvmeq->dbbuf_sq_db, nvmeq->dbbuf_sq_ei)) in nvme_write_sq_db()
486 writel(nvmeq->sq_tail, nvmeq->q_db); in nvme_write_sq_db()
487 nvmeq->last_sq_tail = nvmeq->sq_tail; in nvme_write_sq_db()
491 * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
499 spin_lock(&nvmeq->sq_lock); in nvme_submit_cmd()
500 memcpy(nvmeq->sq_cmds + (nvmeq->sq_tail << nvmeq->sqes), in nvme_submit_cmd()
502 if (++nvmeq->sq_tail == nvmeq->q_depth) in nvme_submit_cmd()
503 nvmeq->sq_tail = 0; in nvme_submit_cmd()
505 spin_unlock(&nvmeq->sq_lock); in nvme_submit_cmd()
510 struct nvme_queue *nvmeq = hctx->driver_data; in nvme_commit_rqs()
512 spin_lock(&nvmeq->sq_lock); in nvme_commit_rqs()
513 if (nvmeq->sq_tail != nvmeq->last_sq_tail) in nvme_commit_rqs()
515 spin_unlock(&nvmeq->sq_lock); in nvme_commit_rqs()
521 return (void **)(iod->sg + blk_rq_nr_phys_segments(req)); in nvme_pci_iod_list()
524 static inline bool nvme_pci_use_sgls(struct nvme_dev *dev, struct request *req) in nvme_pci_use_sgls() argument
532 if (!(dev->ctrl.sgls & ((1 << 0) | (1 << 1)))) in nvme_pci_use_sgls()
534 if (!iod->nvmeq->qid) in nvme_pci_use_sgls()
541 static void nvme_free_prps(struct nvme_dev *dev, struct request *req) in nvme_free_prps() argument
543 const int last_prp = NVME_CTRL_PAGE_SIZE / sizeof(__le64) - 1; in nvme_free_prps()
545 dma_addr_t dma_addr = iod->first_dma; in nvme_free_prps()
548 for (i = 0; i < iod->npages; i++) { in nvme_free_prps()
552 dma_pool_free(dev->prp_page_pool, prp_list, dma_addr); in nvme_free_prps()
558 static void nvme_free_sgls(struct nvme_dev *dev, struct request *req) in nvme_free_sgls() argument
560 const int last_sg = SGES_PER_PAGE - 1; in nvme_free_sgls()
562 dma_addr_t dma_addr = iod->first_dma; in nvme_free_sgls()
565 for (i = 0; i < iod->npages; i++) { in nvme_free_sgls()
569 dma_pool_free(dev->prp_page_pool, sg_list, dma_addr); in nvme_free_sgls()
575 static void nvme_unmap_sg(struct nvme_dev *dev, struct request *req) in nvme_unmap_sg() argument
579 if (is_pci_p2pdma_page(sg_page(iod->sg))) in nvme_unmap_sg()
580 pci_p2pdma_unmap_sg(dev->dev, iod->sg, iod->nents, in nvme_unmap_sg()
583 dma_unmap_sg(dev->dev, iod->sg, iod->nents, rq_dma_dir(req)); in nvme_unmap_sg()
586 static void nvme_unmap_data(struct nvme_dev *dev, struct request *req) in nvme_unmap_data() argument
590 if (iod->dma_len) { in nvme_unmap_data()
591 dma_unmap_page(dev->dev, iod->first_dma, iod->dma_len, in nvme_unmap_data()
596 WARN_ON_ONCE(!iod->nents); in nvme_unmap_data()
598 nvme_unmap_sg(dev, req); in nvme_unmap_data()
599 if (iod->npages == 0) in nvme_unmap_data()
600 dma_pool_free(dev->prp_small_pool, nvme_pci_iod_list(req)[0], in nvme_unmap_data()
601 iod->first_dma); in nvme_unmap_data()
602 else if (iod->use_sgl) in nvme_unmap_data()
603 nvme_free_sgls(dev, req); in nvme_unmap_data()
605 nvme_free_prps(dev, req); in nvme_unmap_data()
606 mempool_free(iod->sg, dev->iod_mempool); in nvme_unmap_data()
618 i, &phys, sg->offset, sg->length, &sg_dma_address(sg), in nvme_print_sgl()
623 static blk_status_t nvme_pci_setup_prps(struct nvme_dev *dev, in nvme_pci_setup_prps() argument
629 struct scatterlist *sg = iod->sg; in nvme_pci_setup_prps()
632 int offset = dma_addr & (NVME_CTRL_PAGE_SIZE - 1); in nvme_pci_setup_prps()
638 length -= (NVME_CTRL_PAGE_SIZE - offset); in nvme_pci_setup_prps()
640 iod->first_dma = 0; in nvme_pci_setup_prps()
644 dma_len -= (NVME_CTRL_PAGE_SIZE - offset); in nvme_pci_setup_prps()
646 dma_addr += (NVME_CTRL_PAGE_SIZE - offset); in nvme_pci_setup_prps()
654 iod->first_dma = dma_addr; in nvme_pci_setup_prps()
660 pool = dev->prp_small_pool; in nvme_pci_setup_prps()
661 iod->npages = 0; in nvme_pci_setup_prps()
663 pool = dev->prp_page_pool; in nvme_pci_setup_prps()
664 iod->npages = 1; in nvme_pci_setup_prps()
669 iod->first_dma = dma_addr; in nvme_pci_setup_prps()
670 iod->npages = -1; in nvme_pci_setup_prps()
674 iod->first_dma = prp_dma; in nvme_pci_setup_prps()
682 list[iod->npages++] = prp_list; in nvme_pci_setup_prps()
683 prp_list[0] = old_prp_list[i - 1]; in nvme_pci_setup_prps()
684 old_prp_list[i - 1] = cpu_to_le64(prp_dma); in nvme_pci_setup_prps()
688 dma_len -= NVME_CTRL_PAGE_SIZE; in nvme_pci_setup_prps()
690 length -= NVME_CTRL_PAGE_SIZE; in nvme_pci_setup_prps()
702 cmnd->dptr.prp1 = cpu_to_le64(sg_dma_address(iod->sg)); in nvme_pci_setup_prps()
703 cmnd->dptr.prp2 = cpu_to_le64(iod->first_dma); in nvme_pci_setup_prps()
706 nvme_free_prps(dev, req); in nvme_pci_setup_prps()
709 WARN(DO_ONCE(nvme_print_sgl, iod->sg, iod->nents), in nvme_pci_setup_prps()
711 blk_rq_payload_bytes(req), iod->nents); in nvme_pci_setup_prps()
718 sge->addr = cpu_to_le64(sg_dma_address(sg)); in nvme_pci_sgl_set_data()
719 sge->length = cpu_to_le32(sg_dma_len(sg)); in nvme_pci_sgl_set_data()
720 sge->type = NVME_SGL_FMT_DATA_DESC << 4; in nvme_pci_sgl_set_data()
726 sge->addr = cpu_to_le64(dma_addr); in nvme_pci_sgl_set_seg()
728 sge->length = cpu_to_le32(entries * sizeof(*sge)); in nvme_pci_sgl_set_seg()
729 sge->type = NVME_SGL_FMT_LAST_SEG_DESC << 4; in nvme_pci_sgl_set_seg()
731 sge->length = cpu_to_le32(NVME_CTRL_PAGE_SIZE); in nvme_pci_sgl_set_seg()
732 sge->type = NVME_SGL_FMT_SEG_DESC << 4; in nvme_pci_sgl_set_seg()
736 static blk_status_t nvme_pci_setup_sgls(struct nvme_dev *dev, in nvme_pci_setup_sgls() argument
742 struct scatterlist *sg = iod->sg; in nvme_pci_setup_sgls()
747 cmd->flags = NVME_CMD_SGL_METABUF; in nvme_pci_setup_sgls()
750 nvme_pci_sgl_set_data(&cmd->dptr.sgl, sg); in nvme_pci_setup_sgls()
755 pool = dev->prp_small_pool; in nvme_pci_setup_sgls()
756 iod->npages = 0; in nvme_pci_setup_sgls()
758 pool = dev->prp_page_pool; in nvme_pci_setup_sgls()
759 iod->npages = 1; in nvme_pci_setup_sgls()
764 iod->npages = -1; in nvme_pci_setup_sgls()
769 iod->first_dma = sgl_dma; in nvme_pci_setup_sgls()
771 nvme_pci_sgl_set_seg(&cmd->dptr.sgl, sgl_dma, entries); in nvme_pci_setup_sgls()
776 struct nvme_sgl_desc *link = &old_sg_desc[i - 1]; in nvme_pci_setup_sgls()
783 nvme_pci_iod_list(req)[iod->npages++] = sg_list; in nvme_pci_setup_sgls()
790 } while (--entries > 0); in nvme_pci_setup_sgls()
794 nvme_free_sgls(dev, req); in nvme_pci_setup_sgls()
798 static blk_status_t nvme_setup_prp_simple(struct nvme_dev *dev, in nvme_setup_prp_simple() argument
803 unsigned int offset = bv->bv_offset & (NVME_CTRL_PAGE_SIZE - 1); in nvme_setup_prp_simple()
804 unsigned int first_prp_len = NVME_CTRL_PAGE_SIZE - offset; in nvme_setup_prp_simple()
806 iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0); in nvme_setup_prp_simple()
807 if (dma_mapping_error(dev->dev, iod->first_dma)) in nvme_setup_prp_simple()
809 iod->dma_len = bv->bv_len; in nvme_setup_prp_simple()
811 cmnd->dptr.prp1 = cpu_to_le64(iod->first_dma); in nvme_setup_prp_simple()
812 if (bv->bv_len > first_prp_len) in nvme_setup_prp_simple()
813 cmnd->dptr.prp2 = cpu_to_le64(iod->first_dma + first_prp_len); in nvme_setup_prp_simple()
815 cmnd->dptr.prp2 = 0; in nvme_setup_prp_simple()
819 static blk_status_t nvme_setup_sgl_simple(struct nvme_dev *dev, in nvme_setup_sgl_simple() argument
825 iod->first_dma = dma_map_bvec(dev->dev, bv, rq_dma_dir(req), 0); in nvme_setup_sgl_simple()
826 if (dma_mapping_error(dev->dev, iod->first_dma)) in nvme_setup_sgl_simple()
828 iod->dma_len = bv->bv_len; in nvme_setup_sgl_simple()
830 cmnd->flags = NVME_CMD_SGL_METABUF; in nvme_setup_sgl_simple()
831 cmnd->dptr.sgl.addr = cpu_to_le64(iod->first_dma); in nvme_setup_sgl_simple()
832 cmnd->dptr.sgl.length = cpu_to_le32(iod->dma_len); in nvme_setup_sgl_simple()
833 cmnd->dptr.sgl.type = NVME_SGL_FMT_DATA_DESC << 4; in nvme_setup_sgl_simple()
837 static blk_status_t nvme_map_data(struct nvme_dev *dev, struct request *req, in nvme_map_data() argument
849 return nvme_setup_prp_simple(dev, req, in nvme_map_data()
850 &cmnd->rw, &bv); in nvme_map_data()
852 if (iod->nvmeq->qid && sgl_threshold && in nvme_map_data()
853 dev->ctrl.sgls & ((1 << 0) | (1 << 1))) in nvme_map_data()
854 return nvme_setup_sgl_simple(dev, req, in nvme_map_data()
855 &cmnd->rw, &bv); in nvme_map_data()
859 iod->dma_len = 0; in nvme_map_data()
860 iod->sg = mempool_alloc(dev->iod_mempool, GFP_ATOMIC); in nvme_map_data()
861 if (!iod->sg) in nvme_map_data()
863 sg_init_table(iod->sg, blk_rq_nr_phys_segments(req)); in nvme_map_data()
864 iod->nents = blk_rq_map_sg(req->q, req, iod->sg); in nvme_map_data()
865 if (!iod->nents) in nvme_map_data()
868 if (is_pci_p2pdma_page(sg_page(iod->sg))) in nvme_map_data()
869 nr_mapped = pci_p2pdma_map_sg_attrs(dev->dev, iod->sg, in nvme_map_data()
870 iod->nents, rq_dma_dir(req), DMA_ATTR_NO_WARN); in nvme_map_data()
872 nr_mapped = dma_map_sg_attrs(dev->dev, iod->sg, iod->nents, in nvme_map_data()
877 iod->use_sgl = nvme_pci_use_sgls(dev, req); in nvme_map_data()
878 if (iod->use_sgl) in nvme_map_data()
879 ret = nvme_pci_setup_sgls(dev, req, &cmnd->rw, nr_mapped); in nvme_map_data()
881 ret = nvme_pci_setup_prps(dev, req, &cmnd->rw); in nvme_map_data()
887 nvme_unmap_sg(dev, req); in nvme_map_data()
889 mempool_free(iod->sg, dev->iod_mempool); in nvme_map_data()
893 static blk_status_t nvme_map_metadata(struct nvme_dev *dev, struct request *req, in nvme_map_metadata() argument
898 iod->meta_dma = dma_map_bvec(dev->dev, rq_integrity_vec(req), in nvme_map_metadata()
900 if (dma_mapping_error(dev->dev, iod->meta_dma)) in nvme_map_metadata()
902 cmnd->rw.metadata = cpu_to_le64(iod->meta_dma); in nvme_map_metadata()
912 struct nvme_ns *ns = hctx->queue->queuedata; in nvme_queue_rq()
913 struct nvme_queue *nvmeq = hctx->driver_data; in nvme_queue_rq()
914 struct nvme_dev *dev = nvmeq->dev; in nvme_queue_rq() local
915 struct request *req = bd->rq; in nvme_queue_rq()
917 struct nvme_command *cmnd = &iod->cmd; in nvme_queue_rq()
920 iod->aborted = 0; in nvme_queue_rq()
921 iod->npages = -1; in nvme_queue_rq()
922 iod->nents = 0; in nvme_queue_rq()
928 if (unlikely(!test_bit(NVMEQ_ENABLED, &nvmeq->flags))) in nvme_queue_rq()
936 ret = nvme_map_data(dev, req, cmnd); in nvme_queue_rq()
942 ret = nvme_map_metadata(dev, req, cmnd); in nvme_queue_rq()
948 nvme_submit_cmd(nvmeq, cmnd, bd->last); in nvme_queue_rq()
952 nvme_unmap_data(dev, req); in nvme_queue_rq()
961 struct nvme_dev *dev = iod->nvmeq->dev; in nvme_pci_complete_rq() local
964 dma_unmap_page(dev->dev, iod->meta_dma, in nvme_pci_complete_rq()
965 rq_integrity_vec(req)->bv_len, rq_dma_dir(req)); in nvme_pci_complete_rq()
968 nvme_unmap_data(dev, req); in nvme_pci_complete_rq()
975 struct nvme_completion *hcqe = &nvmeq->cqes[nvmeq->cq_head]; in nvme_cqe_pending()
977 return (le16_to_cpu(READ_ONCE(hcqe->status)) & 1) == nvmeq->cq_phase; in nvme_cqe_pending()
982 u16 head = nvmeq->cq_head; in nvme_ring_cq_doorbell()
984 if (nvme_dbbuf_update_and_check_event(head, nvmeq->dbbuf_cq_db, in nvme_ring_cq_doorbell()
985 nvmeq->dbbuf_cq_ei)) in nvme_ring_cq_doorbell()
986 writel(head, nvmeq->q_db + nvmeq->dev->db_stride); in nvme_ring_cq_doorbell()
991 if (!nvmeq->qid) in nvme_queue_tagset()
992 return nvmeq->dev->admin_tagset.tags[0]; in nvme_queue_tagset()
993 return nvmeq->dev->tagset.tags[nvmeq->qid - 1]; in nvme_queue_tagset()
998 struct nvme_completion *cqe = &nvmeq->cqes[idx]; in nvme_handle_cqe()
999 __u16 command_id = READ_ONCE(cqe->command_id); in nvme_handle_cqe()
1008 if (unlikely(nvme_is_aen_req(nvmeq->qid, command_id))) { in nvme_handle_cqe()
1009 nvme_complete_async_event(&nvmeq->dev->ctrl, in nvme_handle_cqe()
1010 cqe->status, &cqe->result); in nvme_handle_cqe()
1016 dev_warn(nvmeq->dev->ctrl.device, in nvme_handle_cqe()
1018 command_id, le16_to_cpu(cqe->sq_id)); in nvme_handle_cqe()
1022 trace_nvme_sq(req, cqe->sq_head, nvmeq->sq_tail); in nvme_handle_cqe()
1023 if (!nvme_try_complete_req(req, cqe->status, cqe->result)) in nvme_handle_cqe()
1029 u32 tmp = nvmeq->cq_head + 1; in nvme_update_cq_head()
1031 if (tmp == nvmeq->q_depth) { in nvme_update_cq_head()
1032 nvmeq->cq_head = 0; in nvme_update_cq_head()
1033 nvmeq->cq_phase ^= 1; in nvme_update_cq_head()
1035 nvmeq->cq_head = tmp; in nvme_update_cq_head()
1046 * load-load control dependency between phase and the rest of in nvme_process_cq()
1050 nvme_handle_cqe(nvmeq, nvmeq->cq_head); in nvme_process_cq()
1091 struct pci_dev *pdev = to_pci_dev(nvmeq->dev->dev); in nvme_poll_irqdisable()
1093 WARN_ON_ONCE(test_bit(NVMEQ_POLLED, &nvmeq->flags)); in nvme_poll_irqdisable()
1095 disable_irq(pci_irq_vector(pdev, nvmeq->cq_vector)); in nvme_poll_irqdisable()
1097 enable_irq(pci_irq_vector(pdev, nvmeq->cq_vector)); in nvme_poll_irqdisable()
1102 struct nvme_queue *nvmeq = hctx->driver_data; in nvme_poll()
1108 spin_lock(&nvmeq->cq_poll_lock); in nvme_poll()
1110 spin_unlock(&nvmeq->cq_poll_lock); in nvme_poll()
1115 static void nvme_pci_submit_async_event(struct nvme_ctrl *ctrl) in nvme_pci_submit_async_event() argument
1117 struct nvme_dev *dev = to_nvme_dev(ctrl); in nvme_pci_submit_async_event() local
1118 struct nvme_queue *nvmeq = &dev->queues[0]; in nvme_pci_submit_async_event()
1127 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id) in adapter_delete_queue() argument
1135 return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in adapter_delete_queue()
1138 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid, in adapter_alloc_cq() argument
1144 if (!test_bit(NVMEQ_POLLED, &nvmeq->flags)) in adapter_alloc_cq()
1153 c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr); in adapter_alloc_cq()
1155 c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1); in adapter_alloc_cq()
1159 return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in adapter_alloc_cq()
1162 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid, in adapter_alloc_sq() argument
1165 struct nvme_ctrl *ctrl = &dev->ctrl; in adapter_alloc_sq() local
1170 * Some drives have a bug that auto-enables WRRU if MEDIUM isn't in adapter_alloc_sq()
1174 if (ctrl->quirks & NVME_QUIRK_MEDIUM_PRIO_SQ) in adapter_alloc_sq()
1183 c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr); in adapter_alloc_sq()
1185 c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1); in adapter_alloc_sq()
1189 return nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in adapter_alloc_sq()
1192 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid) in adapter_delete_cq() argument
1194 return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid); in adapter_delete_cq()
1197 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid) in adapter_delete_sq() argument
1199 return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid); in adapter_delete_sq()
1205 struct nvme_queue *nvmeq = iod->nvmeq; in abort_endio()
1207 dev_warn(nvmeq->dev->ctrl.device, in abort_endio()
1208 "Abort status: 0x%x", nvme_req(req)->status); in abort_endio()
1209 atomic_inc(&nvmeq->dev->ctrl.abort_limit); in abort_endio()
1213 static bool nvme_should_reset(struct nvme_dev *dev, u32 csts) in nvme_should_reset() argument
1218 bool nssro = dev->subsystem && (csts & NVME_CSTS_NSSRO); in nvme_should_reset()
1221 switch (dev->ctrl.state) { in nvme_should_reset()
1238 static void nvme_warn_reset(struct nvme_dev *dev, u32 csts) in nvme_warn_reset() argument
1244 result = pci_read_config_word(to_pci_dev(dev->dev), PCI_STATUS, in nvme_warn_reset()
1247 dev_warn(dev->ctrl.device, in nvme_warn_reset()
1251 dev_warn(dev->ctrl.device, in nvme_warn_reset()
1259 struct nvme_queue *nvmeq = iod->nvmeq; in nvme_timeout()
1260 struct nvme_dev *dev = nvmeq->dev; in nvme_timeout() local
1263 u32 csts = readl(dev->bar + NVME_REG_CSTS); in nvme_timeout()
1269 if (pci_channel_offline(to_pci_dev(dev->dev))) in nvme_timeout()
1275 if (nvme_should_reset(dev, csts)) { in nvme_timeout()
1276 nvme_warn_reset(dev, csts); in nvme_timeout()
1277 nvme_dev_disable(dev, false); in nvme_timeout()
1278 nvme_reset_ctrl(&dev->ctrl); in nvme_timeout()
1285 if (test_bit(NVMEQ_POLLED, &nvmeq->flags)) in nvme_timeout()
1286 nvme_poll(req->mq_hctx); in nvme_timeout()
1291 dev_warn(dev->ctrl.device, in nvme_timeout()
1293 req->tag, nvmeq->qid); in nvme_timeout()
1303 switch (dev->ctrl.state) { in nvme_timeout()
1305 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_timeout()
1308 dev_warn_ratelimited(dev->ctrl.device, in nvme_timeout()
1310 req->tag, nvmeq->qid); in nvme_timeout()
1311 nvme_req(req)->flags |= NVME_REQ_CANCELLED; in nvme_timeout()
1312 nvme_dev_disable(dev, true); in nvme_timeout()
1325 if (!nvmeq->qid || iod->aborted) { in nvme_timeout()
1326 dev_warn(dev->ctrl.device, in nvme_timeout()
1328 req->tag, nvmeq->qid); in nvme_timeout()
1329 nvme_req(req)->flags |= NVME_REQ_CANCELLED; in nvme_timeout()
1330 nvme_dev_disable(dev, false); in nvme_timeout()
1331 nvme_reset_ctrl(&dev->ctrl); in nvme_timeout()
1336 if (atomic_dec_return(&dev->ctrl.abort_limit) < 0) { in nvme_timeout()
1337 atomic_inc(&dev->ctrl.abort_limit); in nvme_timeout()
1340 iod->aborted = 1; in nvme_timeout()
1345 cmd.abort.sqid = cpu_to_le16(nvmeq->qid); in nvme_timeout()
1347 dev_warn(nvmeq->dev->ctrl.device, in nvme_timeout()
1349 req->tag, nvmeq->qid); in nvme_timeout()
1351 abort_req = nvme_alloc_request(dev->ctrl.admin_q, &cmd, in nvme_timeout()
1354 atomic_inc(&dev->ctrl.abort_limit); in nvme_timeout()
1358 abort_req->end_io_data = NULL; in nvme_timeout()
1359 blk_execute_rq_nowait(abort_req->q, NULL, abort_req, 0, abort_endio); in nvme_timeout()
1371 dma_free_coherent(nvmeq->dev->dev, CQ_SIZE(nvmeq), in nvme_free_queue()
1372 (void *)nvmeq->cqes, nvmeq->cq_dma_addr); in nvme_free_queue()
1373 if (!nvmeq->sq_cmds) in nvme_free_queue()
1376 if (test_and_clear_bit(NVMEQ_SQ_CMB, &nvmeq->flags)) { in nvme_free_queue()
1377 pci_free_p2pmem(to_pci_dev(nvmeq->dev->dev), in nvme_free_queue()
1378 nvmeq->sq_cmds, SQ_SIZE(nvmeq)); in nvme_free_queue()
1380 dma_free_coherent(nvmeq->dev->dev, SQ_SIZE(nvmeq), in nvme_free_queue()
1381 nvmeq->sq_cmds, nvmeq->sq_dma_addr); in nvme_free_queue()
1385 static void nvme_free_queues(struct nvme_dev *dev, int lowest) in nvme_free_queues() argument
1389 for (i = dev->ctrl.queue_count - 1; i >= lowest; i--) { in nvme_free_queues()
1390 dev->ctrl.queue_count--; in nvme_free_queues()
1391 nvme_free_queue(&dev->queues[i]); in nvme_free_queues()
1396 * nvme_suspend_queue - put queue into suspended state
1401 if (!test_and_clear_bit(NVMEQ_ENABLED, &nvmeq->flags)) in nvme_suspend_queue()
1407 nvmeq->dev->online_queues--; in nvme_suspend_queue()
1408 if (!nvmeq->qid && nvmeq->dev->ctrl.admin_q) in nvme_suspend_queue()
1409 nvme_stop_admin_queue(&nvmeq->dev->ctrl); in nvme_suspend_queue()
1410 if (!test_and_clear_bit(NVMEQ_POLLED, &nvmeq->flags)) in nvme_suspend_queue()
1411 pci_free_irq(to_pci_dev(nvmeq->dev->dev), nvmeq->cq_vector, nvmeq); in nvme_suspend_queue()
1415 static void nvme_suspend_io_queues(struct nvme_dev *dev) in nvme_suspend_io_queues() argument
1419 for (i = dev->ctrl.queue_count - 1; i > 0; i--) in nvme_suspend_io_queues()
1420 nvme_suspend_queue(&dev->queues[i]); in nvme_suspend_io_queues()
1423 static void nvme_disable_admin_queue(struct nvme_dev *dev, bool shutdown) in nvme_disable_admin_queue() argument
1425 struct nvme_queue *nvmeq = &dev->queues[0]; in nvme_disable_admin_queue()
1428 nvme_shutdown_ctrl(&dev->ctrl); in nvme_disable_admin_queue()
1430 nvme_disable_ctrl(&dev->ctrl); in nvme_disable_admin_queue()
1441 static void nvme_reap_pending_cqes(struct nvme_dev *dev) in nvme_reap_pending_cqes() argument
1445 for (i = dev->ctrl.queue_count - 1; i > 0; i--) { in nvme_reap_pending_cqes()
1446 spin_lock(&dev->queues[i].cq_poll_lock); in nvme_reap_pending_cqes()
1447 nvme_process_cq(&dev->queues[i]); in nvme_reap_pending_cqes()
1448 spin_unlock(&dev->queues[i].cq_poll_lock); in nvme_reap_pending_cqes()
1452 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues, in nvme_cmb_qdepth() argument
1455 int q_depth = dev->q_depth; in nvme_cmb_qdepth()
1459 if (q_size_aligned * nr_io_queues > dev->cmb_size) { in nvme_cmb_qdepth()
1460 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues); in nvme_cmb_qdepth()
1471 return -ENOMEM; in nvme_cmb_qdepth()
1477 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq, in nvme_alloc_sq_cmds() argument
1480 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_alloc_sq_cmds()
1482 if (qid && dev->cmb_use_sqes && (dev->cmbsz & NVME_CMBSZ_SQS)) { in nvme_alloc_sq_cmds()
1483 nvmeq->sq_cmds = pci_alloc_p2pmem(pdev, SQ_SIZE(nvmeq)); in nvme_alloc_sq_cmds()
1484 if (nvmeq->sq_cmds) { in nvme_alloc_sq_cmds()
1485 nvmeq->sq_dma_addr = pci_p2pmem_virt_to_bus(pdev, in nvme_alloc_sq_cmds()
1486 nvmeq->sq_cmds); in nvme_alloc_sq_cmds()
1487 if (nvmeq->sq_dma_addr) { in nvme_alloc_sq_cmds()
1488 set_bit(NVMEQ_SQ_CMB, &nvmeq->flags); in nvme_alloc_sq_cmds()
1492 pci_free_p2pmem(pdev, nvmeq->sq_cmds, SQ_SIZE(nvmeq)); in nvme_alloc_sq_cmds()
1496 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(nvmeq), in nvme_alloc_sq_cmds()
1497 &nvmeq->sq_dma_addr, GFP_KERNEL); in nvme_alloc_sq_cmds()
1498 if (!nvmeq->sq_cmds) in nvme_alloc_sq_cmds()
1499 return -ENOMEM; in nvme_alloc_sq_cmds()
1503 static int nvme_alloc_queue(struct nvme_dev *dev, int qid, int depth) in nvme_alloc_queue() argument
1505 struct nvme_queue *nvmeq = &dev->queues[qid]; in nvme_alloc_queue()
1507 if (dev->ctrl.queue_count > qid) in nvme_alloc_queue()
1510 nvmeq->sqes = qid ? dev->io_sqes : NVME_ADM_SQES; in nvme_alloc_queue()
1511 nvmeq->q_depth = depth; in nvme_alloc_queue()
1512 nvmeq->cqes = dma_alloc_coherent(dev->dev, CQ_SIZE(nvmeq), in nvme_alloc_queue()
1513 &nvmeq->cq_dma_addr, GFP_KERNEL); in nvme_alloc_queue()
1514 if (!nvmeq->cqes) in nvme_alloc_queue()
1517 if (nvme_alloc_sq_cmds(dev, nvmeq, qid)) in nvme_alloc_queue()
1520 nvmeq->dev = dev; in nvme_alloc_queue()
1521 spin_lock_init(&nvmeq->sq_lock); in nvme_alloc_queue()
1522 spin_lock_init(&nvmeq->cq_poll_lock); in nvme_alloc_queue()
1523 nvmeq->cq_head = 0; in nvme_alloc_queue()
1524 nvmeq->cq_phase = 1; in nvme_alloc_queue()
1525 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; in nvme_alloc_queue()
1526 nvmeq->qid = qid; in nvme_alloc_queue()
1527 dev->ctrl.queue_count++; in nvme_alloc_queue()
1532 dma_free_coherent(dev->dev, CQ_SIZE(nvmeq), (void *)nvmeq->cqes, in nvme_alloc_queue()
1533 nvmeq->cq_dma_addr); in nvme_alloc_queue()
1535 return -ENOMEM; in nvme_alloc_queue()
1540 struct pci_dev *pdev = to_pci_dev(nvmeq->dev->dev); in queue_request_irq()
1541 int nr = nvmeq->dev->ctrl.instance; in queue_request_irq()
1544 return pci_request_irq(pdev, nvmeq->cq_vector, nvme_irq_check, in queue_request_irq()
1545 nvme_irq, nvmeq, "nvme%dq%d", nr, nvmeq->qid); in queue_request_irq()
1547 return pci_request_irq(pdev, nvmeq->cq_vector, nvme_irq, in queue_request_irq()
1548 NULL, nvmeq, "nvme%dq%d", nr, nvmeq->qid); in queue_request_irq()
1554 struct nvme_dev *dev = nvmeq->dev; in nvme_init_queue() local
1556 nvmeq->sq_tail = 0; in nvme_init_queue()
1557 nvmeq->last_sq_tail = 0; in nvme_init_queue()
1558 nvmeq->cq_head = 0; in nvme_init_queue()
1559 nvmeq->cq_phase = 1; in nvme_init_queue()
1560 nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride]; in nvme_init_queue()
1561 memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq)); in nvme_init_queue()
1562 nvme_dbbuf_init(dev, nvmeq, qid); in nvme_init_queue()
1563 dev->online_queues++; in nvme_init_queue()
1569 struct nvme_dev *dev = nvmeq->dev; in nvme_create_queue() local
1573 clear_bit(NVMEQ_DELETE_ERROR, &nvmeq->flags); in nvme_create_queue()
1580 vector = dev->num_vecs == 1 ? 0 : qid; in nvme_create_queue()
1582 set_bit(NVMEQ_POLLED, &nvmeq->flags); in nvme_create_queue()
1584 result = adapter_alloc_cq(dev, qid, nvmeq, vector); in nvme_create_queue()
1588 result = adapter_alloc_sq(dev, qid, nvmeq); in nvme_create_queue()
1594 nvmeq->cq_vector = vector; in nvme_create_queue()
1603 set_bit(NVMEQ_ENABLED, &nvmeq->flags); in nvme_create_queue()
1607 dev->online_queues--; in nvme_create_queue()
1608 adapter_delete_sq(dev, qid); in nvme_create_queue()
1610 adapter_delete_cq(dev, qid); in nvme_create_queue()
1633 static void nvme_dev_remove_admin(struct nvme_dev *dev) in nvme_dev_remove_admin() argument
1635 if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) { in nvme_dev_remove_admin()
1641 nvme_start_admin_queue(&dev->ctrl); in nvme_dev_remove_admin()
1642 blk_cleanup_queue(dev->ctrl.admin_q); in nvme_dev_remove_admin()
1643 blk_mq_free_tag_set(&dev->admin_tagset); in nvme_dev_remove_admin()
1647 static int nvme_alloc_admin_tags(struct nvme_dev *dev) in nvme_alloc_admin_tags() argument
1649 if (!dev->ctrl.admin_q) { in nvme_alloc_admin_tags()
1650 dev->admin_tagset.ops = &nvme_mq_admin_ops; in nvme_alloc_admin_tags()
1651 dev->admin_tagset.nr_hw_queues = 1; in nvme_alloc_admin_tags()
1653 dev->admin_tagset.queue_depth = NVME_AQ_MQ_TAG_DEPTH; in nvme_alloc_admin_tags()
1654 dev->admin_tagset.timeout = ADMIN_TIMEOUT; in nvme_alloc_admin_tags()
1655 dev->admin_tagset.numa_node = dev->ctrl.numa_node; in nvme_alloc_admin_tags()
1656 dev->admin_tagset.cmd_size = sizeof(struct nvme_iod); in nvme_alloc_admin_tags()
1657 dev->admin_tagset.flags = BLK_MQ_F_NO_SCHED; in nvme_alloc_admin_tags()
1658 dev->admin_tagset.driver_data = dev; in nvme_alloc_admin_tags()
1660 if (blk_mq_alloc_tag_set(&dev->admin_tagset)) in nvme_alloc_admin_tags()
1661 return -ENOMEM; in nvme_alloc_admin_tags()
1662 dev->ctrl.admin_tagset = &dev->admin_tagset; in nvme_alloc_admin_tags()
1664 dev->ctrl.admin_q = blk_mq_init_queue(&dev->admin_tagset); in nvme_alloc_admin_tags()
1665 if (IS_ERR(dev->ctrl.admin_q)) { in nvme_alloc_admin_tags()
1666 blk_mq_free_tag_set(&dev->admin_tagset); in nvme_alloc_admin_tags()
1667 dev->ctrl.admin_q = NULL; in nvme_alloc_admin_tags()
1668 return -ENOMEM; in nvme_alloc_admin_tags()
1670 if (!blk_get_queue(dev->ctrl.admin_q)) { in nvme_alloc_admin_tags()
1671 nvme_dev_remove_admin(dev); in nvme_alloc_admin_tags()
1672 dev->ctrl.admin_q = NULL; in nvme_alloc_admin_tags()
1673 return -ENODEV; in nvme_alloc_admin_tags()
1676 nvme_start_admin_queue(&dev->ctrl); in nvme_alloc_admin_tags()
1681 static unsigned long db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues) in db_bar_size() argument
1683 return NVME_REG_DBS + ((nr_io_queues + 1) * 8 * dev->db_stride); in db_bar_size()
1686 static int nvme_remap_bar(struct nvme_dev *dev, unsigned long size) in nvme_remap_bar() argument
1688 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_remap_bar()
1690 if (size <= dev->bar_mapped_size) in nvme_remap_bar()
1693 return -ENOMEM; in nvme_remap_bar()
1694 if (dev->bar) in nvme_remap_bar()
1695 iounmap(dev->bar); in nvme_remap_bar()
1696 dev->bar = ioremap(pci_resource_start(pdev, 0), size); in nvme_remap_bar()
1697 if (!dev->bar) { in nvme_remap_bar()
1698 dev->bar_mapped_size = 0; in nvme_remap_bar()
1699 return -ENOMEM; in nvme_remap_bar()
1701 dev->bar_mapped_size = size; in nvme_remap_bar()
1702 dev->dbs = dev->bar + NVME_REG_DBS; in nvme_remap_bar()
1707 static int nvme_pci_configure_admin_queue(struct nvme_dev *dev) in nvme_pci_configure_admin_queue() argument
1713 result = nvme_remap_bar(dev, db_bar_size(dev, 0)); in nvme_pci_configure_admin_queue()
1717 dev->subsystem = readl(dev->bar + NVME_REG_VS) >= NVME_VS(1, 1, 0) ? in nvme_pci_configure_admin_queue()
1718 NVME_CAP_NSSRC(dev->ctrl.cap) : 0; in nvme_pci_configure_admin_queue()
1720 if (dev->subsystem && in nvme_pci_configure_admin_queue()
1721 (readl(dev->bar + NVME_REG_CSTS) & NVME_CSTS_NSSRO)) in nvme_pci_configure_admin_queue()
1722 writel(NVME_CSTS_NSSRO, dev->bar + NVME_REG_CSTS); in nvme_pci_configure_admin_queue()
1724 result = nvme_disable_ctrl(&dev->ctrl); in nvme_pci_configure_admin_queue()
1728 result = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH); in nvme_pci_configure_admin_queue()
1732 dev->ctrl.numa_node = dev_to_node(dev->dev); in nvme_pci_configure_admin_queue()
1734 nvmeq = &dev->queues[0]; in nvme_pci_configure_admin_queue()
1735 aqa = nvmeq->q_depth - 1; in nvme_pci_configure_admin_queue()
1738 writel(aqa, dev->bar + NVME_REG_AQA); in nvme_pci_configure_admin_queue()
1739 lo_hi_writeq(nvmeq->sq_dma_addr, dev->bar + NVME_REG_ASQ); in nvme_pci_configure_admin_queue()
1740 lo_hi_writeq(nvmeq->cq_dma_addr, dev->bar + NVME_REG_ACQ); in nvme_pci_configure_admin_queue()
1742 result = nvme_enable_ctrl(&dev->ctrl); in nvme_pci_configure_admin_queue()
1746 nvmeq->cq_vector = 0; in nvme_pci_configure_admin_queue()
1750 dev->online_queues--; in nvme_pci_configure_admin_queue()
1754 set_bit(NVMEQ_ENABLED, &nvmeq->flags); in nvme_pci_configure_admin_queue()
1758 static int nvme_create_io_queues(struct nvme_dev *dev) in nvme_create_io_queues() argument
1763 for (i = dev->ctrl.queue_count; i <= dev->max_qid; i++) { in nvme_create_io_queues()
1764 if (nvme_alloc_queue(dev, i, dev->q_depth)) { in nvme_create_io_queues()
1765 ret = -ENOMEM; in nvme_create_io_queues()
1770 max = min(dev->max_qid, dev->ctrl.queue_count - 1); in nvme_create_io_queues()
1771 if (max != 1 && dev->io_queues[HCTX_TYPE_POLL]) { in nvme_create_io_queues()
1772 rw_queues = dev->io_queues[HCTX_TYPE_DEFAULT] + in nvme_create_io_queues()
1773 dev->io_queues[HCTX_TYPE_READ]; in nvme_create_io_queues()
1778 for (i = dev->online_queues; i <= max; i++) { in nvme_create_io_queues()
1781 ret = nvme_create_queue(&dev->queues[i], i, polled); in nvme_create_io_queues()
1795 static ssize_t nvme_cmb_show(struct device *dev, in nvme_cmb_show() argument
1799 struct nvme_dev *ndev = to_nvme_dev(dev_get_drvdata(dev)); in nvme_cmb_show()
1802 ndev->cmbloc, ndev->cmbsz); in nvme_cmb_show()
1806 static u64 nvme_cmb_size_unit(struct nvme_dev *dev) in nvme_cmb_size_unit() argument
1808 u8 szu = (dev->cmbsz >> NVME_CMBSZ_SZU_SHIFT) & NVME_CMBSZ_SZU_MASK; in nvme_cmb_size_unit()
1813 static u32 nvme_cmb_size(struct nvme_dev *dev) in nvme_cmb_size() argument
1815 return (dev->cmbsz >> NVME_CMBSZ_SZ_SHIFT) & NVME_CMBSZ_SZ_MASK; in nvme_cmb_size()
1818 static void nvme_map_cmb(struct nvme_dev *dev) in nvme_map_cmb() argument
1822 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_map_cmb()
1825 if (dev->cmb_size) in nvme_map_cmb()
1828 if (NVME_CAP_CMBS(dev->ctrl.cap)) in nvme_map_cmb()
1829 writel(NVME_CMBMSC_CRE, dev->bar + NVME_REG_CMBMSC); in nvme_map_cmb()
1831 dev->cmbsz = readl(dev->bar + NVME_REG_CMBSZ); in nvme_map_cmb()
1832 if (!dev->cmbsz) in nvme_map_cmb()
1834 dev->cmbloc = readl(dev->bar + NVME_REG_CMBLOC); in nvme_map_cmb()
1836 size = nvme_cmb_size_unit(dev) * nvme_cmb_size(dev); in nvme_map_cmb()
1837 offset = nvme_cmb_size_unit(dev) * NVME_CMB_OFST(dev->cmbloc); in nvme_map_cmb()
1838 bar = NVME_CMB_BIR(dev->cmbloc); in nvme_map_cmb()
1848 if (NVME_CAP_CMBS(dev->ctrl.cap)) { in nvme_map_cmb()
1851 dev->bar + NVME_REG_CMBMSC); in nvme_map_cmb()
1859 if (size > bar_size - offset) in nvme_map_cmb()
1860 size = bar_size - offset; in nvme_map_cmb()
1863 dev_warn(dev->ctrl.device, in nvme_map_cmb()
1868 dev->cmb_size = size; in nvme_map_cmb()
1869 dev->cmb_use_sqes = use_cmb_sqes && (dev->cmbsz & NVME_CMBSZ_SQS); in nvme_map_cmb()
1871 if ((dev->cmbsz & (NVME_CMBSZ_WDS | NVME_CMBSZ_RDS)) == in nvme_map_cmb()
1875 if (sysfs_add_file_to_group(&dev->ctrl.device->kobj, in nvme_map_cmb()
1877 dev_warn(dev->ctrl.device, in nvme_map_cmb()
1881 static inline void nvme_release_cmb(struct nvme_dev *dev) in nvme_release_cmb() argument
1883 if (dev->cmb_size) { in nvme_release_cmb()
1884 sysfs_remove_file_from_group(&dev->ctrl.device->kobj, in nvme_release_cmb()
1886 dev->cmb_size = 0; in nvme_release_cmb()
1890 static int nvme_set_host_mem(struct nvme_dev *dev, u32 bits) in nvme_set_host_mem() argument
1892 u32 host_mem_size = dev->host_mem_size >> NVME_CTRL_PAGE_SHIFT; in nvme_set_host_mem()
1893 u64 dma_addr = dev->host_mem_descs_dma; in nvme_set_host_mem()
1904 c.features.dword15 = cpu_to_le32(dev->nr_host_mem_descs); in nvme_set_host_mem()
1906 ret = nvme_submit_sync_cmd(dev->ctrl.admin_q, &c, NULL, 0); in nvme_set_host_mem()
1908 dev_warn(dev->ctrl.device, in nvme_set_host_mem()
1915 static void nvme_free_host_mem(struct nvme_dev *dev) in nvme_free_host_mem() argument
1919 for (i = 0; i < dev->nr_host_mem_descs; i++) { in nvme_free_host_mem()
1920 struct nvme_host_mem_buf_desc *desc = &dev->host_mem_descs[i]; in nvme_free_host_mem()
1921 size_t size = le32_to_cpu(desc->size) * NVME_CTRL_PAGE_SIZE; in nvme_free_host_mem()
1923 dma_free_attrs(dev->dev, size, dev->host_mem_desc_bufs[i], in nvme_free_host_mem()
1924 le64_to_cpu(desc->addr), in nvme_free_host_mem()
1928 kfree(dev->host_mem_desc_bufs); in nvme_free_host_mem()
1929 dev->host_mem_desc_bufs = NULL; in nvme_free_host_mem()
1930 dma_free_coherent(dev->dev, dev->host_mem_descs_size, in nvme_free_host_mem()
1931 dev->host_mem_descs, dev->host_mem_descs_dma); in nvme_free_host_mem()
1932 dev->host_mem_descs = NULL; in nvme_free_host_mem()
1933 dev->host_mem_descs_size = 0; in nvme_free_host_mem()
1934 dev->nr_host_mem_descs = 0; in nvme_free_host_mem()
1937 static int __nvme_alloc_host_mem(struct nvme_dev *dev, u64 preferred, in __nvme_alloc_host_mem() argument
1947 tmp = (preferred + chunk_size - 1); in __nvme_alloc_host_mem()
1951 if (dev->ctrl.hmmaxd && dev->ctrl.hmmaxd < max_entries) in __nvme_alloc_host_mem()
1952 max_entries = dev->ctrl.hmmaxd; in __nvme_alloc_host_mem()
1955 descs = dma_alloc_coherent(dev->dev, descs_size, &descs_dma, in __nvme_alloc_host_mem()
1967 len = min_t(u64, chunk_size, preferred - size); in __nvme_alloc_host_mem()
1968 bufs[i] = dma_alloc_attrs(dev->dev, len, &dma_addr, GFP_KERNEL, in __nvme_alloc_host_mem()
1981 dev->nr_host_mem_descs = i; in __nvme_alloc_host_mem()
1982 dev->host_mem_size = size; in __nvme_alloc_host_mem()
1983 dev->host_mem_descs = descs; in __nvme_alloc_host_mem()
1984 dev->host_mem_descs_dma = descs_dma; in __nvme_alloc_host_mem()
1985 dev->host_mem_descs_size = descs_size; in __nvme_alloc_host_mem()
1986 dev->host_mem_desc_bufs = bufs; in __nvme_alloc_host_mem()
1990 while (--i >= 0) { in __nvme_alloc_host_mem()
1993 dma_free_attrs(dev->dev, size, bufs[i], in __nvme_alloc_host_mem()
2000 dma_free_coherent(dev->dev, descs_size, descs, descs_dma); in __nvme_alloc_host_mem()
2002 dev->host_mem_descs = NULL; in __nvme_alloc_host_mem()
2003 return -ENOMEM; in __nvme_alloc_host_mem()
2006 static int nvme_alloc_host_mem(struct nvme_dev *dev, u64 min, u64 preferred) in nvme_alloc_host_mem() argument
2009 u64 hmminds = max_t(u32, dev->ctrl.hmminds * 4096, PAGE_SIZE * 2); in nvme_alloc_host_mem()
2014 if (!__nvme_alloc_host_mem(dev, preferred, chunk_size)) { in nvme_alloc_host_mem()
2015 if (!min || dev->host_mem_size >= min) in nvme_alloc_host_mem()
2017 nvme_free_host_mem(dev); in nvme_alloc_host_mem()
2021 return -ENOMEM; in nvme_alloc_host_mem()
2024 static int nvme_setup_host_mem(struct nvme_dev *dev) in nvme_setup_host_mem() argument
2027 u64 preferred = (u64)dev->ctrl.hmpre * 4096; in nvme_setup_host_mem()
2028 u64 min = (u64)dev->ctrl.hmmin * 4096; in nvme_setup_host_mem()
2034 dev_warn(dev->ctrl.device, in nvme_setup_host_mem()
2037 nvme_free_host_mem(dev); in nvme_setup_host_mem()
2044 if (dev->host_mem_descs) { in nvme_setup_host_mem()
2045 if (dev->host_mem_size >= min) in nvme_setup_host_mem()
2048 nvme_free_host_mem(dev); in nvme_setup_host_mem()
2051 if (!dev->host_mem_descs) { in nvme_setup_host_mem()
2052 if (nvme_alloc_host_mem(dev, min, preferred)) { in nvme_setup_host_mem()
2053 dev_warn(dev->ctrl.device, in nvme_setup_host_mem()
2058 dev_info(dev->ctrl.device, in nvme_setup_host_mem()
2060 dev->host_mem_size >> ilog2(SZ_1M)); in nvme_setup_host_mem()
2063 ret = nvme_set_host_mem(dev, enable_bits); in nvme_setup_host_mem()
2065 nvme_free_host_mem(dev); in nvme_setup_host_mem()
2075 struct nvme_dev *dev = affd->priv; in nvme_calc_irq_sets() local
2076 unsigned int nr_read_queues, nr_write_queues = dev->nr_write_queues; in nvme_calc_irq_sets()
2097 nr_read_queues = nrirqs - nr_write_queues; in nvme_calc_irq_sets()
2100 dev->io_queues[HCTX_TYPE_DEFAULT] = nrirqs - nr_read_queues; in nvme_calc_irq_sets()
2101 affd->set_size[HCTX_TYPE_DEFAULT] = nrirqs - nr_read_queues; in nvme_calc_irq_sets()
2102 dev->io_queues[HCTX_TYPE_READ] = nr_read_queues; in nvme_calc_irq_sets()
2103 affd->set_size[HCTX_TYPE_READ] = nr_read_queues; in nvme_calc_irq_sets()
2104 affd->nr_sets = nr_read_queues ? 2 : 1; in nvme_calc_irq_sets()
2107 static int nvme_setup_irqs(struct nvme_dev *dev, unsigned int nr_io_queues) in nvme_setup_irqs() argument
2109 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_setup_irqs()
2113 .priv = dev, in nvme_setup_irqs()
2119 * left over for non-polled I/O. in nvme_setup_irqs()
2121 poll_queues = min(dev->nr_poll_queues, nr_io_queues - 1); in nvme_setup_irqs()
2122 dev->io_queues[HCTX_TYPE_POLL] = poll_queues; in nvme_setup_irqs()
2128 dev->io_queues[HCTX_TYPE_DEFAULT] = 1; in nvme_setup_irqs()
2129 dev->io_queues[HCTX_TYPE_READ] = 0; in nvme_setup_irqs()
2132 * We need interrupts for the admin queue and each non-polled I/O queue, in nvme_setup_irqs()
2137 if (!(dev->ctrl.quirks & NVME_QUIRK_SINGLE_VECTOR)) in nvme_setup_irqs()
2138 irq_queues += (nr_io_queues - poll_queues); in nvme_setup_irqs()
2143 static void nvme_disable_io_queues(struct nvme_dev *dev) in nvme_disable_io_queues() argument
2145 if (__nvme_disable_io_queues(dev, nvme_admin_delete_sq)) in nvme_disable_io_queues()
2146 __nvme_disable_io_queues(dev, nvme_admin_delete_cq); in nvme_disable_io_queues()
2149 static unsigned int nvme_max_io_queues(struct nvme_dev *dev) in nvme_max_io_queues() argument
2151 return num_possible_cpus() + dev->nr_write_queues + dev->nr_poll_queues; in nvme_max_io_queues()
2154 static int nvme_setup_io_queues(struct nvme_dev *dev) in nvme_setup_io_queues() argument
2156 struct nvme_queue *adminq = &dev->queues[0]; in nvme_setup_io_queues()
2157 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_setup_io_queues()
2166 dev->nr_write_queues = write_queues; in nvme_setup_io_queues()
2167 dev->nr_poll_queues = poll_queues; in nvme_setup_io_queues()
2173 if (dev->ctrl.quirks & NVME_QUIRK_SHARED_TAGS) in nvme_setup_io_queues()
2176 nr_io_queues = min(nvme_max_io_queues(dev), in nvme_setup_io_queues()
2177 dev->nr_allocated_queues - 1); in nvme_setup_io_queues()
2179 result = nvme_set_queue_count(&dev->ctrl, &nr_io_queues); in nvme_setup_io_queues()
2186 clear_bit(NVMEQ_ENABLED, &adminq->flags); in nvme_setup_io_queues()
2188 if (dev->cmb_use_sqes) { in nvme_setup_io_queues()
2189 result = nvme_cmb_qdepth(dev, nr_io_queues, in nvme_setup_io_queues()
2192 dev->q_depth = result; in nvme_setup_io_queues()
2194 dev->cmb_use_sqes = false; in nvme_setup_io_queues()
2198 size = db_bar_size(dev, nr_io_queues); in nvme_setup_io_queues()
2199 result = nvme_remap_bar(dev, size); in nvme_setup_io_queues()
2202 if (!--nr_io_queues) in nvme_setup_io_queues()
2203 return -ENOMEM; in nvme_setup_io_queues()
2205 adminq->q_db = dev->dbs; in nvme_setup_io_queues()
2217 result = nvme_setup_irqs(dev, nr_io_queues); in nvme_setup_io_queues()
2219 return -EIO; in nvme_setup_io_queues()
2221 dev->num_vecs = result; in nvme_setup_io_queues()
2222 result = max(result - 1, 1); in nvme_setup_io_queues()
2223 dev->max_qid = result + dev->io_queues[HCTX_TYPE_POLL]; in nvme_setup_io_queues()
2234 set_bit(NVMEQ_ENABLED, &adminq->flags); in nvme_setup_io_queues()
2236 result = nvme_create_io_queues(dev); in nvme_setup_io_queues()
2237 if (result || dev->online_queues < 2) in nvme_setup_io_queues()
2240 if (dev->online_queues - 1 < dev->max_qid) { in nvme_setup_io_queues()
2241 nr_io_queues = dev->online_queues - 1; in nvme_setup_io_queues()
2242 nvme_disable_io_queues(dev); in nvme_setup_io_queues()
2243 nvme_suspend_io_queues(dev); in nvme_setup_io_queues()
2246 dev_info(dev->ctrl.device, "%d/%d/%d default/read/poll queues\n", in nvme_setup_io_queues()
2247 dev->io_queues[HCTX_TYPE_DEFAULT], in nvme_setup_io_queues()
2248 dev->io_queues[HCTX_TYPE_READ], in nvme_setup_io_queues()
2249 dev->io_queues[HCTX_TYPE_POLL]); in nvme_setup_io_queues()
2255 struct nvme_queue *nvmeq = req->end_io_data; in nvme_del_queue_end()
2258 complete(&nvmeq->delete_done); in nvme_del_queue_end()
2263 struct nvme_queue *nvmeq = req->end_io_data; in nvme_del_cq_end()
2266 set_bit(NVMEQ_DELETE_ERROR, &nvmeq->flags); in nvme_del_cq_end()
2273 struct request_queue *q = nvmeq->dev->ctrl.admin_q; in nvme_delete_queue()
2279 cmd.delete_queue.qid = cpu_to_le16(nvmeq->qid); in nvme_delete_queue()
2285 req->end_io_data = nvmeq; in nvme_delete_queue()
2287 init_completion(&nvmeq->delete_done); in nvme_delete_queue()
2294 static bool __nvme_disable_io_queues(struct nvme_dev *dev, u8 opcode) in __nvme_disable_io_queues() argument
2296 int nr_queues = dev->online_queues - 1, sent = 0; in __nvme_disable_io_queues()
2302 if (nvme_delete_queue(&dev->queues[nr_queues], opcode)) in __nvme_disable_io_queues()
2304 nr_queues--; in __nvme_disable_io_queues()
2308 struct nvme_queue *nvmeq = &dev->queues[nr_queues + sent]; in __nvme_disable_io_queues()
2310 timeout = wait_for_completion_io_timeout(&nvmeq->delete_done, in __nvme_disable_io_queues()
2315 sent--; in __nvme_disable_io_queues()
2322 static void nvme_pci_alloc_tag_set(struct nvme_dev *dev) in nvme_pci_alloc_tag_set() argument
2324 struct blk_mq_tag_set * set = &dev->tagset; in nvme_pci_alloc_tag_set()
2327 set->ops = &nvme_mq_ops; in nvme_pci_alloc_tag_set()
2328 set->nr_hw_queues = dev->online_queues - 1; in nvme_pci_alloc_tag_set()
2329 set->nr_maps = 2; /* default + read */ in nvme_pci_alloc_tag_set()
2330 if (dev->io_queues[HCTX_TYPE_POLL]) in nvme_pci_alloc_tag_set()
2331 set->nr_maps++; in nvme_pci_alloc_tag_set()
2332 set->timeout = NVME_IO_TIMEOUT; in nvme_pci_alloc_tag_set()
2333 set->numa_node = dev->ctrl.numa_node; in nvme_pci_alloc_tag_set()
2334 set->queue_depth = min_t(unsigned, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1; in nvme_pci_alloc_tag_set()
2335 set->cmd_size = sizeof(struct nvme_iod); in nvme_pci_alloc_tag_set()
2336 set->flags = BLK_MQ_F_SHOULD_MERGE; in nvme_pci_alloc_tag_set()
2337 set->driver_data = dev; in nvme_pci_alloc_tag_set()
2344 if (dev->ctrl.quirks & NVME_QUIRK_SHARED_TAGS) in nvme_pci_alloc_tag_set()
2345 set->reserved_tags = NVME_AQ_DEPTH; in nvme_pci_alloc_tag_set()
2349 dev_warn(dev->ctrl.device, in nvme_pci_alloc_tag_set()
2353 dev->ctrl.tagset = set; in nvme_pci_alloc_tag_set()
2356 static bool nvme_pci_update_nr_queues(struct nvme_dev *dev) in nvme_pci_update_nr_queues() argument
2359 if (!mutex_trylock(&dev->shutdown_lock)) in nvme_pci_update_nr_queues()
2363 if (!dev->online_queues) { in nvme_pci_update_nr_queues()
2364 mutex_unlock(&dev->shutdown_lock); in nvme_pci_update_nr_queues()
2368 blk_mq_update_nr_hw_queues(&dev->tagset, dev->online_queues - 1); in nvme_pci_update_nr_queues()
2370 nvme_free_queues(dev, dev->online_queues); in nvme_pci_update_nr_queues()
2371 mutex_unlock(&dev->shutdown_lock); in nvme_pci_update_nr_queues()
2375 static int nvme_pci_enable(struct nvme_dev *dev) in nvme_pci_enable() argument
2377 int result = -ENOMEM; in nvme_pci_enable()
2378 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_pci_enable()
2385 if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64))) in nvme_pci_enable()
2388 if (readl(dev->bar + NVME_REG_CSTS) == -1) { in nvme_pci_enable()
2389 result = -ENODEV; in nvme_pci_enable()
2395 * interrupts. Pre-enable a single MSIX or MSI vec for setup. We'll in nvme_pci_enable()
2402 dev->ctrl.cap = lo_hi_readq(dev->bar + NVME_REG_CAP); in nvme_pci_enable()
2404 dev->q_depth = min_t(u32, NVME_CAP_MQES(dev->ctrl.cap) + 1, in nvme_pci_enable()
2406 dev->ctrl.sqsize = dev->q_depth - 1; /* 0's based queue depth */ in nvme_pci_enable()
2407 dev->db_stride = 1 << NVME_CAP_STRIDE(dev->ctrl.cap); in nvme_pci_enable()
2408 dev->dbs = dev->bar + 4096; in nvme_pci_enable()
2411 * Some Apple controllers require a non-standard SQE size. in nvme_pci_enable()
2415 if (dev->ctrl.quirks & NVME_QUIRK_128_BYTES_SQES) in nvme_pci_enable()
2416 dev->io_sqes = 7; in nvme_pci_enable()
2418 dev->io_sqes = NVME_NVM_IOSQES; in nvme_pci_enable()
2424 if (pdev->vendor == PCI_VENDOR_ID_APPLE && pdev->device == 0x2001) { in nvme_pci_enable()
2425 dev->q_depth = 2; in nvme_pci_enable()
2426 dev_warn(dev->ctrl.device, "detected Apple NVMe controller, " in nvme_pci_enable()
2428 dev->q_depth); in nvme_pci_enable()
2429 } else if (pdev->vendor == PCI_VENDOR_ID_SAMSUNG && in nvme_pci_enable()
2430 (pdev->device == 0xa821 || pdev->device == 0xa822) && in nvme_pci_enable()
2431 NVME_CAP_MQES(dev->ctrl.cap) == 0) { in nvme_pci_enable()
2432 dev->q_depth = 64; in nvme_pci_enable()
2433 dev_err(dev->ctrl.device, "detected PM1725 NVMe controller, " in nvme_pci_enable()
2434 "set queue depth=%u\n", dev->q_depth); in nvme_pci_enable()
2441 if ((dev->ctrl.quirks & NVME_QUIRK_SHARED_TAGS) && in nvme_pci_enable()
2442 (dev->q_depth < (NVME_AQ_DEPTH + 2))) { in nvme_pci_enable()
2443 dev->q_depth = NVME_AQ_DEPTH + 2; in nvme_pci_enable()
2444 dev_warn(dev->ctrl.device, "IO queue depth clamped to %d\n", in nvme_pci_enable()
2445 dev->q_depth); in nvme_pci_enable()
2449 nvme_map_cmb(dev); in nvme_pci_enable()
2460 static void nvme_dev_unmap(struct nvme_dev *dev) in nvme_dev_unmap() argument
2462 if (dev->bar) in nvme_dev_unmap()
2463 iounmap(dev->bar); in nvme_dev_unmap()
2464 pci_release_mem_regions(to_pci_dev(dev->dev)); in nvme_dev_unmap()
2467 static void nvme_pci_disable(struct nvme_dev *dev) in nvme_pci_disable() argument
2469 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_pci_disable()
2479 static void nvme_dev_disable(struct nvme_dev *dev, bool shutdown) in nvme_dev_disable() argument
2482 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_dev_disable()
2484 mutex_lock(&dev->shutdown_lock); in nvme_dev_disable()
2486 u32 csts = readl(dev->bar + NVME_REG_CSTS); in nvme_dev_disable()
2488 if (dev->ctrl.state == NVME_CTRL_LIVE || in nvme_dev_disable()
2489 dev->ctrl.state == NVME_CTRL_RESETTING) { in nvme_dev_disable()
2491 nvme_start_freeze(&dev->ctrl); in nvme_dev_disable()
2494 pdev->error_state != pci_channel_io_normal); in nvme_dev_disable()
2502 nvme_wait_freeze_timeout(&dev->ctrl, NVME_IO_TIMEOUT); in nvme_dev_disable()
2504 nvme_stop_queues(&dev->ctrl); in nvme_dev_disable()
2506 if (!dead && dev->ctrl.queue_count > 0) { in nvme_dev_disable()
2507 nvme_disable_io_queues(dev); in nvme_dev_disable()
2508 nvme_disable_admin_queue(dev, shutdown); in nvme_dev_disable()
2510 nvme_suspend_io_queues(dev); in nvme_dev_disable()
2511 nvme_suspend_queue(&dev->queues[0]); in nvme_dev_disable()
2512 nvme_pci_disable(dev); in nvme_dev_disable()
2513 nvme_reap_pending_cqes(dev); in nvme_dev_disable()
2515 blk_mq_tagset_busy_iter(&dev->tagset, nvme_cancel_request, &dev->ctrl); in nvme_dev_disable()
2516 blk_mq_tagset_busy_iter(&dev->admin_tagset, nvme_cancel_request, &dev->ctrl); in nvme_dev_disable()
2517 blk_mq_tagset_wait_completed_request(&dev->tagset); in nvme_dev_disable()
2518 blk_mq_tagset_wait_completed_request(&dev->admin_tagset); in nvme_dev_disable()
2523 * deadlocking blk-mq hot-cpu notifier. in nvme_dev_disable()
2526 nvme_start_queues(&dev->ctrl); in nvme_dev_disable()
2527 if (dev->ctrl.admin_q && !blk_queue_dying(dev->ctrl.admin_q)) in nvme_dev_disable()
2528 nvme_start_admin_queue(&dev->ctrl); in nvme_dev_disable()
2530 mutex_unlock(&dev->shutdown_lock); in nvme_dev_disable()
2533 static int nvme_disable_prepare_reset(struct nvme_dev *dev, bool shutdown) in nvme_disable_prepare_reset() argument
2535 if (!nvme_wait_reset(&dev->ctrl)) in nvme_disable_prepare_reset()
2536 return -EBUSY; in nvme_disable_prepare_reset()
2537 nvme_dev_disable(dev, shutdown); in nvme_disable_prepare_reset()
2541 static int nvme_setup_prp_pools(struct nvme_dev *dev) in nvme_setup_prp_pools() argument
2543 dev->prp_page_pool = dma_pool_create("prp list page", dev->dev, in nvme_setup_prp_pools()
2546 if (!dev->prp_page_pool) in nvme_setup_prp_pools()
2547 return -ENOMEM; in nvme_setup_prp_pools()
2550 dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev, in nvme_setup_prp_pools()
2552 if (!dev->prp_small_pool) { in nvme_setup_prp_pools()
2553 dma_pool_destroy(dev->prp_page_pool); in nvme_setup_prp_pools()
2554 return -ENOMEM; in nvme_setup_prp_pools()
2559 static void nvme_release_prp_pools(struct nvme_dev *dev) in nvme_release_prp_pools() argument
2561 dma_pool_destroy(dev->prp_page_pool); in nvme_release_prp_pools()
2562 dma_pool_destroy(dev->prp_small_pool); in nvme_release_prp_pools()
2565 static int nvme_pci_alloc_iod_mempool(struct nvme_dev *dev) in nvme_pci_alloc_iod_mempool() argument
2572 dev->iod_mempool = mempool_create_node(1, in nvme_pci_alloc_iod_mempool()
2575 dev_to_node(dev->dev)); in nvme_pci_alloc_iod_mempool()
2576 if (!dev->iod_mempool) in nvme_pci_alloc_iod_mempool()
2577 return -ENOMEM; in nvme_pci_alloc_iod_mempool()
2581 static void nvme_free_tagset(struct nvme_dev *dev) in nvme_free_tagset() argument
2583 if (dev->tagset.tags) in nvme_free_tagset()
2584 blk_mq_free_tag_set(&dev->tagset); in nvme_free_tagset()
2585 dev->ctrl.tagset = NULL; in nvme_free_tagset()
2589 static void nvme_pci_free_ctrl(struct nvme_ctrl *ctrl) in nvme_pci_free_ctrl() argument
2591 struct nvme_dev *dev = to_nvme_dev(ctrl); in nvme_pci_free_ctrl() local
2593 nvme_dbbuf_dma_free(dev); in nvme_pci_free_ctrl()
2594 nvme_free_tagset(dev); in nvme_pci_free_ctrl()
2595 if (dev->ctrl.admin_q) in nvme_pci_free_ctrl()
2596 blk_put_queue(dev->ctrl.admin_q); in nvme_pci_free_ctrl()
2597 free_opal_dev(dev->ctrl.opal_dev); in nvme_pci_free_ctrl()
2598 mempool_destroy(dev->iod_mempool); in nvme_pci_free_ctrl()
2599 put_device(dev->dev); in nvme_pci_free_ctrl()
2600 kfree(dev->queues); in nvme_pci_free_ctrl()
2601 kfree(dev); in nvme_pci_free_ctrl()
2604 static void nvme_remove_dead_ctrl(struct nvme_dev *dev) in nvme_remove_dead_ctrl() argument
2610 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_remove_dead_ctrl()
2611 nvme_get_ctrl(&dev->ctrl); in nvme_remove_dead_ctrl()
2612 nvme_dev_disable(dev, false); in nvme_remove_dead_ctrl()
2613 nvme_kill_queues(&dev->ctrl); in nvme_remove_dead_ctrl()
2614 if (!queue_work(nvme_wq, &dev->remove_work)) in nvme_remove_dead_ctrl()
2615 nvme_put_ctrl(&dev->ctrl); in nvme_remove_dead_ctrl()
2620 struct nvme_dev *dev = in nvme_reset_work() local
2621 container_of(work, struct nvme_dev, ctrl.reset_work); in nvme_reset_work()
2622 bool was_suspend = !!(dev->ctrl.ctrl_config & NVME_CC_SHN_NORMAL); in nvme_reset_work()
2625 if (dev->ctrl.state != NVME_CTRL_RESETTING) { in nvme_reset_work()
2626 dev_warn(dev->ctrl.device, "ctrl state %d is not RESETTING\n", in nvme_reset_work()
2627 dev->ctrl.state); in nvme_reset_work()
2628 result = -ENODEV; in nvme_reset_work()
2636 if (dev->ctrl.ctrl_config & NVME_CC_ENABLE) in nvme_reset_work()
2637 nvme_dev_disable(dev, false); in nvme_reset_work()
2638 nvme_sync_queues(&dev->ctrl); in nvme_reset_work()
2640 mutex_lock(&dev->shutdown_lock); in nvme_reset_work()
2641 result = nvme_pci_enable(dev); in nvme_reset_work()
2645 result = nvme_pci_configure_admin_queue(dev); in nvme_reset_work()
2649 result = nvme_alloc_admin_tags(dev); in nvme_reset_work()
2653 dma_set_min_align_mask(dev->dev, NVME_CTRL_PAGE_SIZE - 1); in nvme_reset_work()
2656 * Limit the max command size to prevent iod->sg allocations going in nvme_reset_work()
2659 dev->ctrl.max_hw_sectors = min_t(u32, in nvme_reset_work()
2660 NVME_MAX_KB_SZ << 1, dma_max_mapping_size(dev->dev) >> 9); in nvme_reset_work()
2661 dev->ctrl.max_segments = NVME_MAX_SEGS; in nvme_reset_work()
2666 dma_set_max_seg_size(dev->dev, 0xffffffff); in nvme_reset_work()
2668 mutex_unlock(&dev->shutdown_lock); in nvme_reset_work()
2671 * Introduce CONNECTING state from nvme-fc/rdma transports to mark the in nvme_reset_work()
2674 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_CONNECTING)) { in nvme_reset_work()
2675 dev_warn(dev->ctrl.device, in nvme_reset_work()
2677 result = -EBUSY; in nvme_reset_work()
2685 dev->ctrl.max_integrity_segments = 1; in nvme_reset_work()
2687 result = nvme_init_identify(&dev->ctrl); in nvme_reset_work()
2691 if (dev->ctrl.oacs & NVME_CTRL_OACS_SEC_SUPP) { in nvme_reset_work()
2692 if (!dev->ctrl.opal_dev) in nvme_reset_work()
2693 dev->ctrl.opal_dev = in nvme_reset_work()
2694 init_opal_dev(&dev->ctrl, &nvme_sec_submit); in nvme_reset_work()
2696 opal_unlock_from_suspend(dev->ctrl.opal_dev); in nvme_reset_work()
2698 free_opal_dev(dev->ctrl.opal_dev); in nvme_reset_work()
2699 dev->ctrl.opal_dev = NULL; in nvme_reset_work()
2702 if (dev->ctrl.oacs & NVME_CTRL_OACS_DBBUF_SUPP) { in nvme_reset_work()
2703 result = nvme_dbbuf_dma_alloc(dev); in nvme_reset_work()
2705 dev_warn(dev->dev, in nvme_reset_work()
2709 if (dev->ctrl.hmpre) { in nvme_reset_work()
2710 result = nvme_setup_host_mem(dev); in nvme_reset_work()
2715 result = nvme_setup_io_queues(dev); in nvme_reset_work()
2719 if (dev->ctrl.tagset) { in nvme_reset_work()
2726 if (dev->online_queues > 1) { in nvme_reset_work()
2727 nvme_start_queues(&dev->ctrl); in nvme_reset_work()
2728 nvme_wait_freeze(&dev->ctrl); in nvme_reset_work()
2729 if (!nvme_pci_update_nr_queues(dev)) in nvme_reset_work()
2731 nvme_dbbuf_set(dev); in nvme_reset_work()
2732 nvme_unfreeze(&dev->ctrl); in nvme_reset_work()
2734 dev_warn(dev->ctrl.device, "IO queues lost\n"); in nvme_reset_work()
2735 nvme_kill_queues(&dev->ctrl); in nvme_reset_work()
2736 nvme_remove_namespaces(&dev->ctrl); in nvme_reset_work()
2737 nvme_free_tagset(dev); in nvme_reset_work()
2744 if (dev->online_queues > 1) { in nvme_reset_work()
2745 nvme_pci_alloc_tag_set(dev); in nvme_reset_work()
2746 nvme_dbbuf_set(dev); in nvme_reset_work()
2748 dev_warn(dev->ctrl.device, "IO queues not created\n"); in nvme_reset_work()
2756 if (!nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_LIVE)) { in nvme_reset_work()
2757 dev_warn(dev->ctrl.device, in nvme_reset_work()
2759 result = -ENODEV; in nvme_reset_work()
2763 nvme_start_ctrl(&dev->ctrl); in nvme_reset_work()
2767 mutex_unlock(&dev->shutdown_lock); in nvme_reset_work()
2770 dev_warn(dev->ctrl.device, in nvme_reset_work()
2772 nvme_remove_dead_ctrl(dev); in nvme_reset_work()
2777 struct nvme_dev *dev = container_of(work, struct nvme_dev, remove_work); in nvme_remove_dead_ctrl_work() local
2778 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_remove_dead_ctrl_work()
2781 device_release_driver(&pdev->dev); in nvme_remove_dead_ctrl_work()
2782 nvme_put_ctrl(&dev->ctrl); in nvme_remove_dead_ctrl_work()
2785 static int nvme_pci_reg_read32(struct nvme_ctrl *ctrl, u32 off, u32 *val) in nvme_pci_reg_read32() argument
2787 *val = readl(to_nvme_dev(ctrl)->bar + off); in nvme_pci_reg_read32()
2791 static int nvme_pci_reg_write32(struct nvme_ctrl *ctrl, u32 off, u32 val) in nvme_pci_reg_write32() argument
2793 writel(val, to_nvme_dev(ctrl)->bar + off); in nvme_pci_reg_write32()
2797 static int nvme_pci_reg_read64(struct nvme_ctrl *ctrl, u32 off, u64 *val) in nvme_pci_reg_read64() argument
2799 *val = lo_hi_readq(to_nvme_dev(ctrl)->bar + off); in nvme_pci_reg_read64()
2803 static int nvme_pci_get_address(struct nvme_ctrl *ctrl, char *buf, int size) in nvme_pci_get_address() argument
2805 struct pci_dev *pdev = to_pci_dev(to_nvme_dev(ctrl)->dev); in nvme_pci_get_address()
2807 return snprintf(buf, size, "%s\n", dev_name(&pdev->dev)); in nvme_pci_get_address()
2823 static int nvme_dev_map(struct nvme_dev *dev) in nvme_dev_map() argument
2825 struct pci_dev *pdev = to_pci_dev(dev->dev); in nvme_dev_map()
2828 return -ENODEV; in nvme_dev_map()
2830 if (nvme_remap_bar(dev, NVME_REG_DBS + 4096)) in nvme_dev_map()
2836 return -ENODEV; in nvme_dev_map()
2841 if (pdev->vendor == 0x144d && pdev->device == 0xa802) { in check_vendor_combination_bug()
2854 } else if (pdev->vendor == 0x144d && pdev->device == 0xa804) { in check_vendor_combination_bug()
2857 * suspend on a Ryzen board, ASUS PRIME B350M-A, as well as in check_vendor_combination_bug()
2858 * within few minutes after bootup on a Coffee Lake board - in check_vendor_combination_bug()
2859 * ASUS PRIME Z370-A in check_vendor_combination_bug()
2862 (dmi_match(DMI_BOARD_NAME, "PRIME B350M-A") || in check_vendor_combination_bug()
2863 dmi_match(DMI_BOARD_NAME, "PRIME Z370-A"))) in check_vendor_combination_bug()
2865 } else if ((pdev->vendor == 0x144d && (pdev->device == 0xa801 || in check_vendor_combination_bug()
2866 pdev->device == 0xa808 || pdev->device == 0xa809)) || in check_vendor_combination_bug()
2867 (pdev->vendor == 0x1e0f && pdev->device == 0x0001)) { in check_vendor_combination_bug()
2884 struct nvme_dev *dev = data; in nvme_async_probe() local
2886 flush_work(&dev->ctrl.reset_work); in nvme_async_probe()
2887 flush_work(&dev->ctrl.scan_work); in nvme_async_probe()
2888 nvme_put_ctrl(&dev->ctrl); in nvme_async_probe()
2894 unsigned long quirks = id->driver_data; in nvme_pci_alloc_dev()
2895 int node = dev_to_node(&pdev->dev); in nvme_pci_alloc_dev()
2896 struct nvme_dev *dev; in nvme_pci_alloc_dev() local
2897 int ret = -ENOMEM; in nvme_pci_alloc_dev()
2899 dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node); in nvme_pci_alloc_dev()
2900 if (!dev) in nvme_pci_alloc_dev()
2901 return ERR_PTR(-ENOMEM); in nvme_pci_alloc_dev()
2902 INIT_WORK(&dev->ctrl.reset_work, nvme_reset_work); in nvme_pci_alloc_dev()
2903 INIT_WORK(&dev->remove_work, nvme_remove_dead_ctrl_work); in nvme_pci_alloc_dev()
2904 mutex_init(&dev->shutdown_lock); in nvme_pci_alloc_dev()
2906 dev->nr_write_queues = write_queues; in nvme_pci_alloc_dev()
2907 dev->nr_poll_queues = poll_queues; in nvme_pci_alloc_dev()
2908 dev->nr_allocated_queues = nvme_max_io_queues(dev) + 1; in nvme_pci_alloc_dev()
2909 dev->queues = kcalloc_node(dev->nr_allocated_queues, in nvme_pci_alloc_dev()
2911 if (!dev->queues) in nvme_pci_alloc_dev()
2914 dev->dev = get_device(&pdev->dev); in nvme_pci_alloc_dev()
2917 if (!noacpi && acpi_storage_d3(&pdev->dev)) { in nvme_pci_alloc_dev()
2922 dev_info(&pdev->dev, in nvme_pci_alloc_dev()
2926 ret = nvme_init_ctrl(&dev->ctrl, &pdev->dev, &nvme_pci_ctrl_ops, in nvme_pci_alloc_dev()
2930 return dev; in nvme_pci_alloc_dev()
2933 put_device(dev->dev); in nvme_pci_alloc_dev()
2934 kfree(dev->queues); in nvme_pci_alloc_dev()
2936 kfree(dev); in nvme_pci_alloc_dev()
2942 struct nvme_dev *dev; in nvme_probe() local
2943 int result = -ENOMEM; in nvme_probe()
2945 dev = nvme_pci_alloc_dev(pdev, id); in nvme_probe()
2946 if (IS_ERR(dev)) in nvme_probe()
2947 return PTR_ERR(dev); in nvme_probe()
2949 result = nvme_dev_map(dev); in nvme_probe()
2953 result = nvme_setup_prp_pools(dev); in nvme_probe()
2957 result = nvme_pci_alloc_iod_mempool(dev); in nvme_probe()
2961 dev_info(dev->ctrl.device, "pci function %s\n", dev_name(&pdev->dev)); in nvme_probe()
2962 pci_set_drvdata(pdev, dev); in nvme_probe()
2964 nvme_reset_ctrl(&dev->ctrl); in nvme_probe()
2965 async_schedule(nvme_async_probe, dev); in nvme_probe()
2969 nvme_release_prp_pools(dev); in nvme_probe()
2971 nvme_dev_unmap(dev); in nvme_probe()
2973 nvme_uninit_ctrl(&dev->ctrl); in nvme_probe()
2979 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_reset_prepare() local
2984 * with ->remove(). in nvme_reset_prepare()
2986 nvme_disable_prepare_reset(dev, false); in nvme_reset_prepare()
2987 nvme_sync_queues(&dev->ctrl); in nvme_reset_prepare()
2992 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_reset_done() local
2994 if (!nvme_try_sched_reset(&dev->ctrl)) in nvme_reset_done()
2995 flush_work(&dev->ctrl.reset_work); in nvme_reset_done()
3000 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_shutdown() local
3002 nvme_disable_prepare_reset(dev, true); in nvme_shutdown()
3012 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_remove() local
3014 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DELETING); in nvme_remove()
3018 nvme_change_ctrl_state(&dev->ctrl, NVME_CTRL_DEAD); in nvme_remove()
3019 nvme_dev_disable(dev, true); in nvme_remove()
3022 flush_work(&dev->ctrl.reset_work); in nvme_remove()
3023 nvme_stop_ctrl(&dev->ctrl); in nvme_remove()
3024 nvme_remove_namespaces(&dev->ctrl); in nvme_remove()
3025 nvme_dev_disable(dev, true); in nvme_remove()
3026 nvme_release_cmb(dev); in nvme_remove()
3027 nvme_free_host_mem(dev); in nvme_remove()
3028 nvme_dev_remove_admin(dev); in nvme_remove()
3029 nvme_free_queues(dev, 0); in nvme_remove()
3030 nvme_release_prp_pools(dev); in nvme_remove()
3031 nvme_dev_unmap(dev); in nvme_remove()
3032 nvme_uninit_ctrl(&dev->ctrl); in nvme_remove()
3036 static int nvme_get_power_state(struct nvme_ctrl *ctrl, u32 *ps) in nvme_get_power_state() argument
3038 return nvme_get_features(ctrl, NVME_FEAT_POWER_MGMT, 0, NULL, 0, ps); in nvme_get_power_state()
3041 static int nvme_set_power_state(struct nvme_ctrl *ctrl, u32 ps) in nvme_set_power_state() argument
3043 return nvme_set_features(ctrl, NVME_FEAT_POWER_MGMT, ps, NULL, 0, NULL); in nvme_set_power_state()
3046 static int nvme_resume(struct device *dev) in nvme_resume() argument
3048 struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev)); in nvme_resume()
3049 struct nvme_ctrl *ctrl = &ndev->ctrl; in nvme_resume() local
3051 if (ndev->last_ps == U32_MAX || in nvme_resume()
3052 nvme_set_power_state(ctrl, ndev->last_ps) != 0) in nvme_resume()
3053 return nvme_try_sched_reset(&ndev->ctrl); in nvme_resume()
3057 static int nvme_suspend(struct device *dev) in nvme_suspend() argument
3059 struct pci_dev *pdev = to_pci_dev(dev); in nvme_suspend()
3061 struct nvme_ctrl *ctrl = &ndev->ctrl; in nvme_suspend() local
3062 int ret = -EBUSY; in nvme_suspend()
3064 ndev->last_ps = U32_MAX; in nvme_suspend()
3071 * device does not support any non-default power states, shut down the in nvme_suspend()
3076 * down, so as to allow the platform to achieve its minimum low-power in nvme_suspend()
3084 if (pm_suspend_via_firmware() || !ctrl->npss || in nvme_suspend()
3086 ndev->nr_host_mem_descs || in nvme_suspend()
3087 (ndev->ctrl.quirks & NVME_QUIRK_SIMPLE_SUSPEND)) in nvme_suspend()
3090 nvme_start_freeze(ctrl); in nvme_suspend()
3091 nvme_wait_freeze(ctrl); in nvme_suspend()
3092 nvme_sync_queues(ctrl); in nvme_suspend()
3094 if (ctrl->state != NVME_CTRL_LIVE) in nvme_suspend()
3097 ret = nvme_get_power_state(ctrl, &ndev->last_ps); in nvme_suspend()
3108 ret = nvme_set_power_state(ctrl, ctrl->npss); in nvme_suspend()
3121 ctrl->npss = 0; in nvme_suspend()
3124 nvme_unfreeze(ctrl); in nvme_suspend()
3128 static int nvme_simple_suspend(struct device *dev) in nvme_simple_suspend() argument
3130 struct nvme_dev *ndev = pci_get_drvdata(to_pci_dev(dev)); in nvme_simple_suspend()
3135 static int nvme_simple_resume(struct device *dev) in nvme_simple_resume() argument
3137 struct pci_dev *pdev = to_pci_dev(dev); in nvme_simple_resume()
3140 return nvme_try_sched_reset(&ndev->ctrl); in nvme_simple_resume()
3156 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_error_detected() local
3167 dev_warn(dev->ctrl.device, in nvme_error_detected()
3169 nvme_dev_disable(dev, false); in nvme_error_detected()
3172 dev_warn(dev->ctrl.device, in nvme_error_detected()
3181 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_slot_reset() local
3183 dev_info(dev->ctrl.device, "restart after slot reset\n"); in nvme_slot_reset()
3185 nvme_reset_ctrl(&dev->ctrl); in nvme_slot_reset()
3191 struct nvme_dev *dev = pci_get_drvdata(pdev); in nvme_error_resume() local
3193 flush_work(&dev->ctrl.reset_work); in nvme_error_resume()