1 // SPDX-License-Identifier: GPL-2.0
32 	struct resource *res = dev->resource + resno;  in pci_std_update_resource()
34 	/* Per SR-IOV spec 3.4.1.11, VF BARs are RO zero */  in pci_std_update_resource()
35 	if (dev->is_virtfn)  in pci_std_update_resource()
42 	if (!res->flags)  in pci_std_update_resource()
45 	if (res->flags & IORESOURCE_UNSET)  in pci_std_update_resource()
49 	 * Ignore non-moveable resources.  This might be legacy resources for  in pci_std_update_resource()
53 	if (res->flags & IORESOURCE_PCI_FIXED)  in pci_std_update_resource()
56 	pcibios_resource_to_bus(dev->bus, &region, res);  in pci_std_update_resource()
59 	if (res->flags & IORESOURCE_IO) {  in pci_std_update_resource()
61 		new |= res->flags & ~PCI_BASE_ADDRESS_IO_MASK;  in pci_std_update_resource()
66 		new |= res->flags & ~PCI_BASE_ADDRESS_MEM_MASK;  in pci_std_update_resource()
79 		if (!(res->flags & IORESOURCE_ROM_ENABLE))  in pci_std_update_resource()
82 		reg = dev->rom_base_reg;  in pci_std_update_resource()
88 	 * We can't update a 64-bit BAR atomically, so when possible,  in pci_std_update_resource()
89 	 * disable decoding so that a half-updated BAR won't conflict  in pci_std_update_resource()
92 	disable = (res->flags & IORESOURCE_MEM_64) && !dev->mmio_always_on;  in pci_std_update_resource()
107 	if (res->flags & IORESOURCE_MEM_64) {  in pci_std_update_resource()
133 	struct resource *res = &dev->resource[resource];  in pci_claim_resource()
136 	if (res->flags & IORESOURCE_UNSET) {  in pci_claim_resource()
139 		return -EINVAL;  in pci_claim_resource()
147 	if (res->flags & IORESOURCE_ROM_SHADOW)  in pci_claim_resource()
154 		res->flags |= IORESOURCE_UNSET;  in pci_claim_resource()
155 		return -EINVAL;  in pci_claim_resource()
161 			 resource, res, conflict->name, conflict);  in pci_claim_resource()
162 		res->flags |= IORESOURCE_UNSET;  in pci_claim_resource()
163 		return -EBUSY;  in pci_claim_resource()
175 	/* Prefetchable MMIO Base/Limit */  in pci_disable_bridge_window()
186  * Can be over-ridden by architecture specific code that implements
203 		return -ENOMEM;  in pci_revert_fw_address()
205 	start = res->start;  in pci_revert_fw_address()
206 	end = res->end;  in pci_revert_fw_address()
207 	res->start = fw_addr;  in pci_revert_fw_address()
208 	res->end = res->start + size - 1;  in pci_revert_fw_address()
209 	res->flags &= ~IORESOURCE_UNSET;  in pci_revert_fw_address()
218 			return -ENXIO;  in pci_revert_fw_address()
224 		if (res->flags & IORESOURCE_IO)  in pci_revert_fw_address()
235 			 resno, res, conflict->name, conflict);  in pci_revert_fw_address()
236 		res->start = start;  in pci_revert_fw_address()
237 		res->end = end;  in pci_revert_fw_address()
238 		res->flags |= IORESOURCE_UNSET;  in pci_revert_fw_address()
239 		return -EBUSY;  in pci_revert_fw_address()
254        return res->start;  in pcibios_align_resource()
260 	struct resource *res = dev->resource + resno;  in __pci_assign_resource()
264 	min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;  in __pci_assign_resource()
267 	 * First, try exact prefetching match.  Even if a 64-bit  in __pci_assign_resource()
268 	 * prefetchable bridge window is below 4GB, we can't put a 32-bit  in __pci_assign_resource()
269 	 * prefetchable resource in it because pbus_size_mem() assumes a  in __pci_assign_resource()
270 	 * 64-bit window will contain no 32-bit resources.  If we assign  in __pci_assign_resource()
280 	 * If the prefetchable window is only 32 bits wide, we can put  in __pci_assign_resource()
281 	 * 64-bit prefetchable resources in it.  in __pci_assign_resource()
283 	if ((res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64)) ==  in __pci_assign_resource()
294 	 * in a non-prefetchable window.  If this resource is 32 bits and  in __pci_assign_resource()
295 	 * non-prefetchable, the first call already tried the only possibility  in __pci_assign_resource()
298 	if (res->flags & (IORESOURCE_PREFETCH | IORESOURCE_MEM_64))  in __pci_assign_resource()
311 	bus = dev->bus;  in _pci_assign_resource()
313 		if (!bus->parent || !bus->self->transparent)  in _pci_assign_resource()
315 		bus = bus->parent;  in _pci_assign_resource()
323 	struct resource *res = dev->resource + resno;  in pci_assign_resource()
327 	if (res->flags & IORESOURCE_PCI_FIXED)  in pci_assign_resource()
330 	res->flags |= IORESOURCE_UNSET;  in pci_assign_resource()
335 		return -EINVAL;  in pci_assign_resource()
356 	res->flags &= ~IORESOURCE_UNSET;  in pci_assign_resource()
357 	res->flags &= ~IORESOURCE_STARTALIGN;  in pci_assign_resource()
369 	struct resource *res = dev->resource + resno;  in pci_reassign_resource()
374 	if (res->flags & IORESOURCE_PCI_FIXED)  in pci_reassign_resource()
377 	flags = res->flags;  in pci_reassign_resource()
378 	res->flags |= IORESOURCE_UNSET;  in pci_reassign_resource()
379 	if (!res->parent) {  in pci_reassign_resource()
382 		return -EINVAL;  in pci_reassign_resource()
389 		res->flags = flags;  in pci_reassign_resource()
395 	res->flags &= ~IORESOURCE_UNSET;  in pci_reassign_resource()
396 	res->flags &= ~IORESOURCE_STARTALIGN;  in pci_reassign_resource()
407 	struct resource *res = dev->resource + resno;  in pci_release_resource()
411 	if (!res->parent)  in pci_release_resource()
415 	res->end = resource_size(res) - 1;  in pci_release_resource()
416 	res->start = 0;  in pci_release_resource()
417 	res->flags |= IORESOURCE_UNSET;  in pci_release_resource()
423 	struct resource *res = dev->resource + resno;  in pci_resize_resource()
430 	host = pci_find_host_bridge(dev->bus);  in pci_resize_resource()
431 	if (host->preserve_config)  in pci_resize_resource()
432 		return -ENOTSUPP;  in pci_resize_resource()
435 	if (!(res->flags & IORESOURCE_UNSET))  in pci_resize_resource()
436 		return -EBUSY;  in pci_resize_resource()
440 		return -EBUSY;  in pci_resize_resource()
444 		return -ENOTSUPP;  in pci_resize_resource()
447 		return -EINVAL;  in pci_resize_resource()
457 	res->end = res->start + pci_rebar_size_to_bytes(size) - 1;  in pci_resize_resource()
460 	if (dev->bus->self) {  in pci_resize_resource()
461 		ret = pci_reassign_bridge_resources(dev->bus->self, res->flags);  in pci_resize_resource()
469 	res->end = res->start + pci_rebar_size_to_bytes(old) - 1;  in pci_resize_resource()
487 		r = &dev->resource[i];  in pci_enable_resources()
489 		if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))  in pci_enable_resources()
492 				(!(r->flags & IORESOURCE_ROM_ENABLE)))  in pci_enable_resources()
495 		if (r->flags & IORESOURCE_UNSET) {  in pci_enable_resources()
498 			return -EINVAL;  in pci_enable_resources()
501 		if (!r->parent) {  in pci_enable_resources()
504 			return -EINVAL;  in pci_enable_resources()
507 		if (r->flags & IORESOURCE_IO)  in pci_enable_resources()
509 		if (r->flags & IORESOURCE_MEM)  in pci_enable_resources()
514 		pci_info(dev, "enabling device (%04x -> %04x)\n", old_cmd, cmd);  in pci_enable_resources()