Lines Matching +full:power +full:- +full:limits
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Common code for Intel Running Average Power Limit (RAPL) support.
27 #include <asm/intel-family.h>
79 #define NR_RAW_PRIMITIVES (NR_RAPL_PRIMITIVES - 2)
172 return -EIO; in get_energy_counter()
186 struct rapl_package *rp = rd->rp; in release_zone()
191 if (rd->id == RAPL_DOMAIN_PACKAGE) { in release_zone()
193 rp->domains = NULL; in release_zone()
205 if (rd->rpl[i].name) in find_nr_power_limit()
216 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) in set_domain_enable()
217 return -EACCES; in set_domain_enable()
221 if (rapl_defaults->set_floor_freq) in set_domain_enable()
222 rapl_defaults->set_floor_freq(rd, mode); in set_domain_enable()
233 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { in get_domain_enable()
240 return -EIO; in get_domain_enable()
293 * Constraint index used by powercap can be different than power limit (PL)
294 * index in that some PLs maybe missing due to non-existent MSRs. So we
302 if ((rd->rpl[i].name) && j++ == cid) { in contraint_to_pl()
307 pr_err("Cannot find matching power limit for constraint %d\n", cid); in contraint_to_pl()
309 return -EINVAL; in contraint_to_pl()
328 rp = rd->rp; in set_power_limit()
330 if (rd->state & DOMAIN_STATE_BIOS_LOCKED) { in set_power_limit()
331 dev_warn(&power_zone->dev, in set_power_limit()
332 "%s locked by BIOS, monitoring only\n", rd->name); in set_power_limit()
333 ret = -EACCES; in set_power_limit()
337 switch (rd->rpl[id].prim_id) { in set_power_limit()
348 ret = -EINVAL; in set_power_limit()
374 switch (rd->rpl[id].prim_id) { in get_current_power_limit()
386 return -EINVAL; in get_current_power_limit()
389 ret = -EIO; in get_current_power_limit()
414 switch (rd->rpl[id].prim_id) { in set_time_window()
422 ret = -EINVAL; in set_time_window()
446 switch (rd->rpl[id].prim_id) { in get_time_window()
462 return -EINVAL; in get_time_window()
482 return rd->rpl[id].name; in get_constraint_name()
496 switch (rd->rpl[id].prim_id) { in get_max_power()
508 return -EINVAL; in get_max_power()
511 ret = -EIO; in get_max_power()
516 if (rd->rpl[id].prim_id == PL4_ENABLE) in get_max_power()
538 struct rapl_domain *rd = rp->domains; in rapl_init_domains()
541 unsigned int mask = rp->domain_map & (1 << i); in rapl_init_domains()
546 rd->rp = rp; in rapl_init_domains()
548 if (i == RAPL_DOMAIN_PLATFORM && rp->id > 0) { in rapl_init_domains()
549 snprintf(rd->name, RAPL_DOMAIN_NAME_LENGTH, "psys-%d", in rapl_init_domains()
550 cpu_data(rp->lead_cpu).phys_proc_id); in rapl_init_domains()
552 snprintf(rd->name, RAPL_DOMAIN_NAME_LENGTH, "%s", in rapl_init_domains()
555 rd->id = i; in rapl_init_domains()
556 rd->rpl[0].prim_id = PL1_ENABLE; in rapl_init_domains()
557 rd->rpl[0].name = pl1_name; in rapl_init_domains()
560 * The PL2 power domain is applicable for limits two in rapl_init_domains()
561 * and limits three in rapl_init_domains()
563 if (rp->priv->limits[i] >= 2) { in rapl_init_domains()
564 rd->rpl[1].prim_id = PL2_ENABLE; in rapl_init_domains()
565 rd->rpl[1].name = pl2_name; in rapl_init_domains()
568 /* Enable PL4 domain if the total power limits are three */ in rapl_init_domains()
569 if (rp->priv->limits[i] == 3) { in rapl_init_domains()
570 rd->rpl[2].prim_id = PL4_ENABLE; in rapl_init_domains()
571 rd->rpl[2].name = pl4_name; in rapl_init_domains()
575 rd->regs[j] = rp->priv->regs[i][j]; in rapl_init_domains()
579 rd->domain_energy_unit = in rapl_init_domains()
580 rapl_defaults->dram_domain_energy_unit; in rapl_init_domains()
581 if (rd->domain_energy_unit) in rapl_init_domains()
583 rd->domain_energy_unit); in rapl_init_domains()
586 rd->domain_energy_unit = in rapl_init_domains()
587 rapl_defaults->psys_domain_energy_unit; in rapl_init_domains()
588 if (rd->domain_energy_unit) in rapl_init_domains()
590 rd->domain_energy_unit); in rapl_init_domains()
603 struct rapl_package *rp = rd->rp; in rapl_unit_xlate()
608 units = rp->power_unit; in rapl_unit_xlate()
613 if (rd->domain_energy_unit) in rapl_unit_xlate()
614 units = rd->domain_energy_unit; in rapl_unit_xlate()
616 units = rp->energy_unit; in rapl_unit_xlate()
619 return rapl_defaults->compute_time_window(rp, value, to_raw); in rapl_unit_xlate()
672 /* non-hardware */
680 * time, energy, and power.
681 * RAPL MSRs are non-architectual and are laid out not consistently across
685 * is pre-assigned based on RAPL unit MSRs read at init time.
686 * 63-------------------------- 31--------------------------- 0
688 * | |<- shift ----------------|
689 * 63-------------------------- 31--------------------------- 0
699 if (!rp->name || rp->flag & RAPL_PRIMITIVE_DUMMY) in rapl_read_data_raw()
700 return -EINVAL; in rapl_read_data_raw()
702 ra.reg = rd->regs[rp->id]; in rapl_read_data_raw()
704 return -EINVAL; in rapl_read_data_raw()
706 cpu = rd->rp->lead_cpu; in rapl_read_data_raw()
708 /* domain with 2 limits has different bit */ in rapl_read_data_raw()
709 if (prim == FW_LOCK && rd->rp->priv->limits[rd->id] == 2) { in rapl_read_data_raw()
710 rp->mask = POWER_HIGH_LOCK; in rapl_read_data_raw()
711 rp->shift = 63; in rapl_read_data_raw()
713 /* non-hardware data are collected by the polling thread */ in rapl_read_data_raw()
714 if (rp->flag & RAPL_PRIMITIVE_DERIVED) { in rapl_read_data_raw()
715 *data = rd->rdd.primitives[prim]; in rapl_read_data_raw()
719 ra.mask = rp->mask; in rapl_read_data_raw()
721 if (rd->rp->priv->read_raw(cpu, &ra)) { in rapl_read_data_raw()
723 return -EIO; in rapl_read_data_raw()
726 value = ra.value >> rp->shift; in rapl_read_data_raw()
729 *data = rapl_unit_xlate(rd, rp->unit, value, 0); in rapl_read_data_raw()
747 cpu = rd->rp->lead_cpu; in rapl_write_data_raw()
748 bits = rapl_unit_xlate(rd, rp->unit, value, 1); in rapl_write_data_raw()
749 bits <<= rp->shift; in rapl_write_data_raw()
750 bits &= rp->mask; in rapl_write_data_raw()
754 ra.reg = rd->regs[rp->id]; in rapl_write_data_raw()
755 ra.mask = rp->mask; in rapl_write_data_raw()
758 ret = rd->rp->priv->write_raw(cpu, &ra); in rapl_write_data_raw()
771 * power unit : microWatts : Represented in milliWatts by default
779 ra.reg = rp->priv->reg_unit; in rapl_check_unit_core()
781 if (rp->priv->read_raw(cpu, &ra)) { in rapl_check_unit_core()
782 pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n", in rapl_check_unit_core()
783 rp->priv->reg_unit, cpu); in rapl_check_unit_core()
784 return -ENODEV; in rapl_check_unit_core()
788 rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value); in rapl_check_unit_core()
791 rp->power_unit = 1000000 / (1 << value); in rapl_check_unit_core()
794 rp->time_unit = 1000000 / (1 << value); in rapl_check_unit_core()
796 pr_debug("Core CPU %s energy=%dpJ, time=%dus, power=%duW\n", in rapl_check_unit_core()
797 rp->name, rp->energy_unit, rp->time_unit, rp->power_unit); in rapl_check_unit_core()
807 ra.reg = rp->priv->reg_unit; in rapl_check_unit_atom()
809 if (rp->priv->read_raw(cpu, &ra)) { in rapl_check_unit_atom()
810 pr_err("Failed to read power unit REG 0x%llx on CPU %d, exit.\n", in rapl_check_unit_atom()
811 rp->priv->reg_unit, cpu); in rapl_check_unit_atom()
812 return -ENODEV; in rapl_check_unit_atom()
816 rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value; in rapl_check_unit_atom()
819 rp->power_unit = (1 << value) * 1000; in rapl_check_unit_atom()
822 rp->time_unit = 1000000 / (1 << value); in rapl_check_unit_atom()
824 pr_debug("Atom %s energy=%dpJ, time=%dus, power=%duW\n", in rapl_check_unit_atom()
825 rp->name, rp->energy_unit, rp->time_unit, rp->power_unit); in rapl_check_unit_atom()
837 if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) { in power_limit_irq_save_cpu()
838 rp->power_limit_irq = l & PACKAGE_THERM_INT_PLN_ENABLE; in power_limit_irq_save_cpu()
839 rp->power_limit_irq |= PACKAGE_PLN_INT_SAVED; in power_limit_irq_save_cpu()
846 * When package power limit is set artificially low by RAPL, LVT
847 * thermal interrupt for package power limit should be ignored
849 * is to avoid excessive interrupts while we are trying to save power.
860 smp_call_function_single(rp->lead_cpu, power_limit_irq_save_cpu, rp, 1); in package_power_limit_irq_save()
864 * Restore per package power limit interrupt enable state. Called from cpu
875 if (!(rp->power_limit_irq & PACKAGE_PLN_INT_SAVED)) in package_power_limit_irq_restore()
880 if (rp->power_limit_irq & PACKAGE_THERM_INT_PLN_ENABLE) in package_power_limit_irq_restore()
892 /* always enable clamp such that p-state can go below OS requested in set_floor_freq_default()
893 * range. power capping priority over guranteed frequency. in set_floor_freq_default()
909 if (!rapl_defaults->floor_freq_reg_addr) { in set_floor_freq_atom()
916 rapl_defaults->floor_freq_reg_addr, in set_floor_freq_atom()
924 rapl_defaults->floor_freq_reg_addr, mdata); in set_floor_freq_atom()
939 value = (1 << y) * (4 + f) * rp->time_unit / 4; in rapl_compute_time_window_core()
941 if (value < rp->time_unit) in rapl_compute_time_window_core()
944 do_div(value, rp->time_unit); in rapl_compute_time_window_core()
946 f = div64_u64(4 * (value - (1 << y)), 1 << y); in rapl_compute_time_window_core()
960 return (value) ? value *= rp->time_unit : rp->time_unit; in rapl_compute_time_window_atom()
962 value = div64_u64(value, rp->time_unit); in rapl_compute_time_window_atom()
1076 for (dmn = 0; dmn < rp->nr_domains; dmn++) { in rapl_update_domain_data()
1077 pr_debug("update %s domain %s data\n", rp->name, in rapl_update_domain_data()
1078 rp->domains[dmn].name); in rapl_update_domain_data()
1079 /* exclude non-raw primitives */ in rapl_update_domain_data()
1081 if (!rapl_read_data_raw(&rp->domains[dmn], prim, in rapl_update_domain_data()
1083 rp->domains[dmn].rdd.primitives[prim] = val; in rapl_update_domain_data()
1099 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { in rapl_package_register_powercap()
1100 if (rd->id == RAPL_DOMAIN_PACKAGE) { in rapl_package_register_powercap()
1102 pr_debug("register package domain %s\n", rp->name); in rapl_package_register_powercap()
1103 power_zone = powercap_register_zone(&rd->power_zone, in rapl_package_register_powercap()
1104 rp->priv->control_type, rp->name, in rapl_package_register_powercap()
1105 NULL, &zone_ops[rd->id], nr_pl, in rapl_package_register_powercap()
1108 pr_debug("failed to register power zone %s\n", in rapl_package_register_powercap()
1109 rp->name); in rapl_package_register_powercap()
1113 rp->power_zone = power_zone; in rapl_package_register_powercap()
1120 return -ENODEV; in rapl_package_register_powercap()
1123 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { in rapl_package_register_powercap()
1124 struct powercap_zone *parent = rp->power_zone; in rapl_package_register_powercap()
1126 if (rd->id == RAPL_DOMAIN_PACKAGE) in rapl_package_register_powercap()
1128 if (rd->id == RAPL_DOMAIN_PLATFORM) in rapl_package_register_powercap()
1130 /* number of power limits per domain varies */ in rapl_package_register_powercap()
1132 power_zone = powercap_register_zone(&rd->power_zone, in rapl_package_register_powercap()
1133 rp->priv->control_type, in rapl_package_register_powercap()
1134 rd->name, parent, in rapl_package_register_powercap()
1135 &zone_ops[rd->id], nr_pl, in rapl_package_register_powercap()
1140 rp->name, rd->name); in rapl_package_register_powercap()
1152 while (--rd >= rp->domains) { in rapl_package_register_powercap()
1153 pr_debug("unregister %s domain %s\n", rp->name, rd->name); in rapl_package_register_powercap()
1154 powercap_unregister_zone(rp->priv->control_type, in rapl_package_register_powercap()
1155 &rd->power_zone); in rapl_package_register_powercap()
1171 ra.reg = rp->priv->regs[domain][RAPL_DOMAIN_REG_STATUS]; in rapl_check_domain()
1175 return -EINVAL; in rapl_check_domain()
1177 /* make sure domain counters are available and contains non-zero in rapl_check_domain()
1182 if (rp->priv->read_raw(cpu, &ra) || !ra.value) in rapl_check_domain()
1183 return -ENODEV; in rapl_check_domain()
1189 * Check if power limits are available. Two cases when they are not available:
1190 * 1. Locked by BIOS, in this case we still provide read-only access so that
1206 rd->rp->name, rd->name); in rapl_detect_powerlimit()
1207 rd->state |= DOMAIN_STATE_BIOS_LOCKED; in rapl_detect_powerlimit()
1210 /* check if power limit MSR exists, otherwise domain is monitoring only */ in rapl_detect_powerlimit()
1212 int prim = rd->rpl[i].prim_id; in rapl_detect_powerlimit()
1215 rd->rpl[i].name = NULL; in rapl_detect_powerlimit()
1230 rp->domain_map |= 1 << i; in rapl_detect_domains()
1234 rp->nr_domains = bitmap_weight(&rp->domain_map, RAPL_DOMAIN_MAX); in rapl_detect_domains()
1235 if (!rp->nr_domains) { in rapl_detect_domains()
1236 pr_debug("no valid rapl domains found in %s\n", rp->name); in rapl_detect_domains()
1237 return -ENODEV; in rapl_detect_domains()
1239 pr_debug("found %d domains on %s\n", rp->nr_domains, rp->name); in rapl_detect_domains()
1241 rp->domains = kcalloc(rp->nr_domains + 1, sizeof(struct rapl_domain), in rapl_detect_domains()
1243 if (!rp->domains) in rapl_detect_domains()
1244 return -ENOMEM; in rapl_detect_domains()
1248 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) in rapl_detect_domains()
1261 for (rd = rp->domains; rd < rp->domains + rp->nr_domains; rd++) { in rapl_remove_package()
1269 if (rd->id == RAPL_DOMAIN_PACKAGE) { in rapl_remove_package()
1273 pr_debug("remove package, undo power limit on %s: %s\n", in rapl_remove_package()
1274 rp->name, rd->name); in rapl_remove_package()
1275 powercap_unregister_zone(rp->priv->control_type, in rapl_remove_package()
1276 &rd->power_zone); in rapl_remove_package()
1279 powercap_unregister_zone(rp->priv->control_type, in rapl_remove_package()
1280 &rd_package->power_zone); in rapl_remove_package()
1281 list_del(&rp->plist); in rapl_remove_package()
1293 if (rp->id == id in rapl_find_package_domain()
1294 && rp->priv->control_type == priv->control_type) in rapl_find_package_domain()
1311 return ERR_PTR(-ENODEV); in rapl_add_package()
1315 return ERR_PTR(-ENOMEM); in rapl_add_package()
1318 rp->id = id; in rapl_add_package()
1319 rp->lead_cpu = cpu; in rapl_add_package()
1320 rp->priv = priv; in rapl_add_package()
1323 snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH, in rapl_add_package()
1324 "package-%d-die-%d", c->phys_proc_id, c->cpu_die_id); in rapl_add_package()
1326 snprintf(rp->name, PACKAGE_DOMAIN_NAME_LENGTH, "package-%d", in rapl_add_package()
1327 c->phys_proc_id); in rapl_add_package()
1330 if (rapl_detect_domains(rp, cpu) || rapl_defaults->check_unit(rp, cpu)) { in rapl_add_package()
1331 ret = -ENODEV; in rapl_add_package()
1336 INIT_LIST_HEAD(&rp->plist); in rapl_add_package()
1337 list_add(&rp->plist, &rapl_packages); in rapl_add_package()
1342 kfree(rp->domains); in rapl_add_package()
1356 if (!rp->power_zone) in power_limit_state_save()
1358 rd = power_zone_to_rapl_domain(rp->power_zone); in power_limit_state_save()
1361 switch (rd->rpl[i].prim_id) { in power_limit_state_save()
1365 &rd->rpl[i].last_power_limit); in power_limit_state_save()
1367 rd->rpl[i].last_power_limit = 0; in power_limit_state_save()
1372 &rd->rpl[i].last_power_limit); in power_limit_state_save()
1374 rd->rpl[i].last_power_limit = 0; in power_limit_state_save()
1379 &rd->rpl[i].last_power_limit); in power_limit_state_save()
1381 rd->rpl[i].last_power_limit = 0; in power_limit_state_save()
1397 if (!rp->power_zone) in power_limit_state_restore()
1399 rd = power_zone_to_rapl_domain(rp->power_zone); in power_limit_state_restore()
1402 switch (rd->rpl[i].prim_id) { in power_limit_state_restore()
1404 if (rd->rpl[i].last_power_limit) in power_limit_state_restore()
1406 rd->rpl[i].last_power_limit); in power_limit_state_restore()
1409 if (rd->rpl[i].last_power_limit) in power_limit_state_restore()
1411 rd->rpl[i].last_power_limit); in power_limit_state_restore()
1414 if (rd->rpl[i].last_power_limit) in power_limit_state_restore()
1416 rd->rpl[i].last_power_limit); in power_limit_state_restore()
1454 return -ENODEV; in rapl_init()
1457 rapl_defaults = (struct rapl_defaults *)id->driver_data; in rapl_init()
1465 ret = -ENOMEM; in rapl_init()
1489 MODULE_DESCRIPTION("Intel Runtime Average Power Limit (RAPL) common code");