Lines Matching +full:7 +full:- +full:bit
1 /* SPDX-License-Identifier: GPL-2.0-only */
6 Copyright 1995-1998 by Leonard N. Zubkoff <lnz@dandelion.com>
12 Special thanks to Wayne Yen, Jin-Lon Hon, and Alex Win of BusLogic, whose
60 #define BLOGIC_MIN_AUTO_TAG_DEPTH 7
91 #define BLOGIC_CCB_GRP_ALLOCSIZE 7
160 (adapter->adapter_type == BLOGIC_MULTIMASTER)
163 (adapter->adapter_type == BLOGIC_FLASHPOINT)
189 BLOGIC_VESA_BUS, /* BT-4xx */
190 BLOGIC_ISA_BUS, /* BT-5xx */
191 BLOGIC_MCA_BUS, /* BT-6xx */
192 BLOGIC_EISA_BUS, /* BT-7xx */
193 BLOGIC_UNKNOWN_BUS, /* BT-8xx */
194 BLOGIC_PCI_BUS /* BT-9xx */
239 bool noprobe:1; /* Bit 0 */
240 bool noprobe_isa:1; /* Bit 1 */
241 bool noprobe_pci:1; /* Bit 2 */
242 bool nosort_pci:1; /* Bit 3 */
243 bool multimaster_first:1; /* Bit 4 */
244 bool flashpoint_first:1; /* Bit 5 */
245 bool limited_isa:1; /* Bit 6 */
246 bool probe330:1; /* Bit 7 */
247 bool probe334:1; /* Bit 8 */
248 bool probe230:1; /* Bit 9 */
249 bool probe234:1; /* Bit 10 */
250 bool probe130:1; /* Bit 11 */
251 bool probe134:1; /* Bit 12 */
259 bool trace_probe:1; /* Bit 0 */
260 bool trace_hw_reset:1; /* Bit 1 */
261 bool trace_config:1; /* Bit 2 */
262 bool trace_err:1; /* Bit 3 */
277 Define the structure of the write-only Control Register.
283 unsigned char:4; /* Bits 0-3 */
284 bool bus_reset:1; /* Bit 4 */
285 bool int_reset:1; /* Bit 5 */
286 bool soft_reset:1; /* Bit 6 */
287 bool hard_reset:1; /* Bit 7 */
292 Define the structure of the read-only Status Register.
298 bool cmd_invalid:1; /* Bit 0 */
299 bool rsvd:1; /* Bit 1 */
300 bool datain_ready:1; /* Bit 2 */
301 bool cmd_param_busy:1; /* Bit 3 */
302 bool adapter_ready:1; /* Bit 4 */
303 bool init_reqd:1; /* Bit 5 */
304 bool diag_failed:1; /* Bit 6 */
305 bool diag_active:1; /* Bit 7 */
310 Define the structure of the read-only Interrupt Register.
316 bool mailin_loaded:1; /* Bit 0 */
317 bool mailout_avail:1; /* Bit 1 */
318 bool cmd_complete:1; /* Bit 2 */
319 bool ext_busreset:1; /* Bit 3 */
320 unsigned char rsvd:3; /* Bits 4-6 */
321 bool int_valid:1; /* Bit 7 */
326 Define the structure of the read-only Geometry Register.
332 enum blogic_bios_diskgeometry d0_geo:2; /* Bits 0-1 */
333 enum blogic_bios_diskgeometry d1_geo:2; /* Bits 2-3 */
334 unsigned char:3; /* Bits 4-6 */
335 bool ext_trans_enable:1; /* Bit 7 */
406 unsigned char:5; /* Byte 0 Bits 0-4 */
407 bool dma_ch5:1; /* Byte 0 Bit 5 */
408 bool dma_ch6:1; /* Byte 0 Bit 6 */
409 bool dma_ch7:1; /* Byte 0 Bit 7 */
410 bool irq_ch9:1; /* Byte 1 Bit 0 */
411 bool irq_ch10:1; /* Byte 1 Bit 1 */
412 bool irq_ch11:1; /* Byte 1 Bit 2 */
413 bool irq_ch12:1; /* Byte 1 Bit 3 */
414 unsigned char:1; /* Byte 1 Bit 4 */
415 bool irq_ch14:1; /* Byte 1 Bit 5 */
416 bool irq_ch15:1; /* Byte 1 Bit 6 */
417 unsigned char:1; /* Byte 1 Bit 7 */
418 unsigned char id:4; /* Byte 2 Bits 0-3 */
419 unsigned char:4; /* Byte 2 Bits 4-7 */
427 unsigned char offset:4; /* Bits 0-3 */
428 unsigned char tx_period:3; /* Bits 4-6 */
429 bool sync:1; /* Bit 7 */
433 bool sync:1; /* Byte 0 Bit 0 */
434 bool parity:1; /* Byte 0 Bit 1 */
435 unsigned char:6; /* Byte 0 Bits 2-7 */
440 unsigned char mbox_addr[3]; /* Bytes 5-7 */
441 struct blogic_syncval sync0to7[8]; /* Bytes 8-15 */
448 struct blogic_syncval sync8to15[8]; /* Bytes 22-29 */
461 u32 base_mbox_addr; /* Bytes 1-4 */
479 BLOGIC_IO_DISABLE2 = 7
485 bool low_term:1; /* Byte 2 Bit 0 */
486 bool high_term:1; /* Byte 2 Bit 1 */
487 unsigned char:2; /* Byte 2 Bits 2-3 */
488 bool JP1:1; /* Byte 2 Bit 4 */
489 bool JP2:1; /* Byte 2 Bit 5 */
490 bool JP3:1; /* Byte 2 Bit 6 */
491 bool genericinfo_valid:1; /* Byte 2 Bit 7 */
502 unsigned short sg_limit; /* Bytes 2-3 */
504 u32 base_mbox_addr; /* Bytes 5-8 */
506 unsigned char:2; /* Byte 9 Bits 0-1 */
507 bool fast_on_eisa:1; /* Byte 9 Bit 2 */
508 unsigned char:3; /* Byte 9 Bits 3-5 */
509 bool level_int:1; /* Byte 9 Bit 6 */
510 unsigned char:1; /* Byte 9 Bit 7 */
512 unsigned char fw_rev[3]; /* Bytes 10-12 */
513 bool wide:1; /* Byte 13 Bit 0 */
514 bool differential:1; /* Byte 13 Bit 1 */
515 bool scam:1; /* Byte 13 Bit 2 */
516 bool ultra:1; /* Byte 13 Bit 3 */
517 bool smart_term:1; /* Byte 13 Bit 4 */
518 unsigned char:3; /* Byte 13 Bits 5-7 */
548 unsigned char factory_sig[2]; /* Bytes 0-1 */
550 unsigned char adapter_type[6]; /* Bytes 3-8 */
552 bool floppy:1; /* Byte 10 Bit 0 */
553 bool floppy_sec:1; /* Byte 10 Bit 1 */
554 bool level_int:1; /* Byte 10 Bit 2 */
555 unsigned char:2; /* Byte 10 Bits 3-4 */
556 unsigned char systemram_bios:3; /* Byte 10 Bits 5-7 */
557 unsigned char dma_ch:7; /* Byte 11 Bits 0-6 */
558 bool dma_autoconf:1; /* Byte 11 Bit 7 */
559 unsigned char irq_ch:7; /* Byte 12 Bits 0-6 */
560 bool irq_autoconf:1; /* Byte 12 Bit 7 */
563 bool low_term:1; /* Byte 15 Bit 0 */
564 bool parity:1; /* Byte 15 Bit 1 */
565 bool high_term:1; /* Byte 15 Bit 2 */
566 bool noisy_cable:1; /* Byte 15 Bit 3 */
567 bool fast_sync_neg:1; /* Byte 15 Bit 4 */
568 bool reset_enabled:1; /* Byte 15 Bit 5 */
569 bool:1; /* Byte 15 Bit 6 */
570 bool active_negation:1; /* Byte 15 Bit 7 */
573 bool bios_enabled:1; /* Byte 18 Bit 0 */
574 bool int19_redir_enabled:1; /* Byte 18 Bit 1 */
575 bool ext_trans_enable:1; /* Byte 18 Bit 2 */
576 bool removable_as_fixed:1; /* Byte 18 Bit 3 */
577 bool:1; /* Byte 18 Bit 4 */
578 bool morethan2_drives:1; /* Byte 18 Bit 5 */
579 bool bios_int:1; /* Byte 18 Bit 6 */
580 bool floptical:1; /* Byte 19 Bit 7 */
581 unsigned short dev_enabled; /* Bytes 19-20 */
582 unsigned short wide_ok; /* Bytes 21-22 */
583 unsigned short fast_ok; /* Bytes 23-24 */
584 unsigned short sync_ok; /* Bytes 25-26 */
585 unsigned short discon_ok; /* Bytes 27-28 */
586 unsigned short send_start_unit; /* Bytes 29-30 */
587 unsigned short ignore_bios_scan; /* Bytes 31-32 */
588 unsigned char pci_int_pin:2; /* Byte 33 Bits 0-1 */
589 unsigned char adapter_ioport:2; /* Byte 33 Bits 2-3 */
590 bool strict_rr_enabled:1; /* Byte 33 Bit 4 */
591 bool vesabus_33mhzplus:1; /* Byte 33 Bit 5 */
592 bool vesa_burst_write:1; /* Byte 33 Bit 6 */
593 bool vesa_burst_read:1; /* Byte 33 Bit 7 */
594 unsigned short ultra_ok; /* Bytes 34-35 */
595 unsigned int:32; /* Bytes 36-39 */
598 bool:1; /* Byte 42 Bit 0 */
599 bool scam_dominant:1; /* Byte 42 Bit 1 */
600 bool scam_enabled:1; /* Byte 42 Bit 2 */
601 bool scam_lev2:1; /* Byte 42 Bit 3 */
602 unsigned char:4; /* Byte 42 Bits 4-7 */
603 bool int13_exten:1; /* Byte 43 Bit 0 */
604 bool:1; /* Byte 43 Bit 1 */
605 bool cd_boot:1; /* Byte 43 Bit 2 */
606 unsigned char:5; /* Byte 43 Bits 3-7 */
607 unsigned char boot_id:4; /* Byte 44 Bits 0-3 */
608 unsigned char boot_ch:4; /* Byte 44 Bits 4-7 */
609 unsigned char force_scan_order:1; /* Byte 45 Bit 0 */
610 unsigned char:7; /* Byte 45 Bits 1-7 */
611 unsigned short nontagged_to_alt_ok; /* Bytes 46-47 */
612 unsigned short reneg_sync_on_check; /* Bytes 48-49 */
613 unsigned char rsvd[10]; /* Bytes 50-59 */
614 unsigned char manuf_diag[2]; /* Bytes 60-61 */
615 unsigned short cksum; /* Bytes 62-63 */
623 unsigned char force_scan_order:1; /* Bit 0 */
624 unsigned char:7; /* Bits 1-7 */
634 unsigned char tgt_idbit3:1; /* Bit 0 */
635 unsigned char:2; /* Bits 1-2 */
636 enum blogic_bios_diskgeometry diskgeom:2; /* Bits 3-4 */
637 unsigned char tgt_id:3; /* Bits 5-7 */
663 only uses codes 0 - 4. The FlashPoint SCCB Manager has no mailboxes, so
770 u32 segbytes; /* Bytes 0-3 */
771 u32 segdata; /* Bytes 4-7 */
787 Define the 32 Bit Mode Command Control Block (CCB) structure. The first 40
791 Driver. Extended LUN Format CCBs differ from Legacy LUN Format 32 Bit Mode
796 the SCSI-2 specification defines Bit 5 as LUNTAR. Extended LUN Format CCBs
810 unsigned char:3; /* Byte 1 Bits 0-2 */
811 enum blogic_datadir datadir:2; /* Byte 1 Bits 3-4 */
812 bool tag_enable:1; /* Byte 1 Bit 5 */
813 enum blogic_queuetag queuetag:2; /* Byte 1 Bits 6-7 */
816 u32 datalen; /* Bytes 4-7 */
817 u32 data; /* Bytes 8-11 */
823 unsigned char lun:5; /* Byte 17 Bits 0-4 */
824 bool legacytag_enable:1; /* Byte 17 Bit 5 */
825 enum blogic_queuetag legacy_tag:2; /* Byte 17 Bits 6-7 */
826 unsigned char cdb[BLOGIC_CDB_MAXLEN]; /* Bytes 18-29 */
829 u32 rsvd_int; /* Bytes 32-35 */
830 u32 sensedata; /* Bytes 36-39 */
834 void (*callback) (struct blogic_ccb *); /* Bytes 40-43 */
835 u32 base_addr; /* Bytes 44-47 */
839 u16 os_flags; /* Bytes 50-51 */
840 unsigned char private[24]; /* Bytes 52-99 */
861 Define the 32 Bit Mode Outgoing Mailbox structure.
865 u32 ccb; /* Bytes 0-3 */
866 u32:24; /* Bytes 4-6 */
867 enum blogic_action action; /* Byte 7 */
871 Define the 32 Bit Mode Incoming Mailbox structure.
875 u32 ccb; /* Bytes 0-3 */
879 enum blogic_cmplt_code comp_code; /* Byte 7 */
949 u32 base_addr; /* Bytes 0-3 */
953 unsigned char scsi_lun; /* Byte 7 */
954 u16 fw_rev; /* Bytes 8-9 */
955 u16 sync_ok; /* Bytes 10-11 */
956 u16 fast_ok; /* Bytes 12-13 */
957 u16 ultra_ok; /* Bytes 14-15 */
958 u16 discon_ok; /* Bytes 16-17 */
959 u16 wide_ok; /* Bytes 18-19 */
960 bool parity:1; /* Byte 20 Bit 0 */
961 bool wide:1; /* Byte 20 Bit 1 */
962 bool softreset:1; /* Byte 20 Bit 2 */
963 bool ext_trans_enable:1; /* Byte 20 Bit 3 */
964 bool low_term:1; /* Byte 20 Bit 4 */
965 bool high_term:1; /* Byte 20 Bit 5 */
966 bool report_underrun:1; /* Byte 20 Bit 6 */
967 bool scam_enabled:1; /* Byte 20 Bit 7 */
968 bool scam_lev2:1; /* Byte 21 Bit 0 */
969 unsigned char:7; /* Byte 21 Bits 1-7 */
972 unsigned char model[3]; /* Bytes 24-26 */
974 unsigned char rsvd[4]; /* Bytes 28-31 */
975 u32 os_rsvd; /* Bytes 32-35 */
976 unsigned char translation_info[4]; /* Bytes 36-39 */
977 u32 rsvd2[5]; /* Bytes 40-59 */
978 u32 sec_range; /* Bytes 60-63 */
1096 unsigned char devtype:5; /* Byte 0 Bits 0-4 */
1097 unsigned char dev_qual:3; /* Byte 0 Bits 5-7 */
1098 unsigned char dev_modifier:7; /* Byte 1 Bits 0-6 */
1099 bool rmb:1; /* Byte 1 Bit 7 */
1100 unsigned char ansi_ver:3; /* Byte 2 Bits 0-2 */
1101 unsigned char ecma_ver:3; /* Byte 2 Bits 3-5 */
1102 unsigned char iso_ver:2; /* Byte 2 Bits 6-7 */
1103 unsigned char resp_fmt:4; /* Byte 3 Bits 0-3 */
1104 unsigned char:2; /* Byte 3 Bits 4-5 */
1105 bool TrmIOP:1; /* Byte 3 Bit 6 */
1106 bool AENC:1; /* Byte 3 Bit 7 */
1110 bool SftRe:1; /* Byte 7 Bit 0 */
1111 bool CmdQue:1; /* Byte 7 Bit 1 */
1112 bool:1; /* Byte 7 Bit 2 */
1113 bool linked:1; /* Byte 7 Bit 3 */
1114 bool sync:1; /* Byte 7 Bit 4 */
1115 bool WBus16:1; /* Byte 7 Bit 5 */
1116 bool WBus32:1; /* Byte 7 Bit 6 */
1117 bool RelAdr:1; /* Byte 7 Bit 7 */
1118 unsigned char vendor[8]; /* Bytes 8-15 */
1119 unsigned char product[16]; /* Bytes 16-31 */
1120 unsigned char product_rev[4]; /* Bytes 32-35 */
1134 outb(cr.all, adapter->io_addr + BLOGIC_CNTRL_REG); in blogic_busreset()
1142 outb(cr.all, adapter->io_addr + BLOGIC_CNTRL_REG); in blogic_intreset()
1150 outb(cr.all, adapter->io_addr + BLOGIC_CNTRL_REG); in blogic_softreset()
1158 outb(cr.all, adapter->io_addr + BLOGIC_CNTRL_REG); in blogic_hardreset()
1163 return inb(adapter->io_addr + BLOGIC_STATUS_REG); in blogic_rdstatus()
1169 outb(value, adapter->io_addr + BLOGIC_CMD_PARM_REG); in blogic_setcmdparam()
1174 return inb(adapter->io_addr + BLOGIC_DATAIN_REG); in blogic_rddatain()
1179 return inb(adapter->io_addr + BLOGIC_INT_REG); in blogic_rdint()
1184 return inb(adapter->io_addr + BLOGIC_GEOMETRY_REG); in blogic_rdgeom()
1209 32 bit Kernel Virtual Addresses. This avoids compilation warnings
1210 on 64 bit architectures.
1236 bytecount->units += amount; in blogic_addcount()
1237 if (bytecount->units > 999999999) { in blogic_addcount()
1238 bytecount->units -= 1000000000; in blogic_addcount()
1239 bytecount->billions++; in blogic_addcount()
1260 index = (amount < 64 * 1024 ? 6 : 7); in blogic_incszbucket()