Lines Matching +full:shared +full:- +full:lrclk
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2010-2011,2013-2015 The Linux Foundation. All rights reserved.
5 * lpass-cpu.c -- ALSA SoC CPU DAI driver for QTi LPASS
18 #include <sound/soc-dai.h>
19 #include "lpass-lpaif-reg.h"
36 struct lpass_variant *v = drvdata->variant; in lpass_cpu_init_i2sctl_bitfields()
38 i2sctl->loopback = devm_regmap_field_alloc(dev, map, v->loopback); in lpass_cpu_init_i2sctl_bitfields()
39 i2sctl->spken = devm_regmap_field_alloc(dev, map, v->spken); in lpass_cpu_init_i2sctl_bitfields()
40 i2sctl->spkmode = devm_regmap_field_alloc(dev, map, v->spkmode); in lpass_cpu_init_i2sctl_bitfields()
41 i2sctl->spkmono = devm_regmap_field_alloc(dev, map, v->spkmono); in lpass_cpu_init_i2sctl_bitfields()
42 i2sctl->micen = devm_regmap_field_alloc(dev, map, v->micen); in lpass_cpu_init_i2sctl_bitfields()
43 i2sctl->micmode = devm_regmap_field_alloc(dev, map, v->micmode); in lpass_cpu_init_i2sctl_bitfields()
44 i2sctl->micmono = devm_regmap_field_alloc(dev, map, v->micmono); in lpass_cpu_init_i2sctl_bitfields()
45 i2sctl->wssrc = devm_regmap_field_alloc(dev, map, v->wssrc); in lpass_cpu_init_i2sctl_bitfields()
46 i2sctl->bitwidth = devm_regmap_field_alloc(dev, map, v->bitwidth); in lpass_cpu_init_i2sctl_bitfields()
48 if (IS_ERR(i2sctl->loopback) || IS_ERR(i2sctl->spken) || in lpass_cpu_init_i2sctl_bitfields()
49 IS_ERR(i2sctl->spkmode) || IS_ERR(i2sctl->spkmono) || in lpass_cpu_init_i2sctl_bitfields()
50 IS_ERR(i2sctl->micen) || IS_ERR(i2sctl->micmode) || in lpass_cpu_init_i2sctl_bitfields()
51 IS_ERR(i2sctl->micmono) || IS_ERR(i2sctl->wssrc) || in lpass_cpu_init_i2sctl_bitfields()
52 IS_ERR(i2sctl->bitwidth)) in lpass_cpu_init_i2sctl_bitfields()
53 return -EINVAL; in lpass_cpu_init_i2sctl_bitfields()
64 ret = clk_set_rate(drvdata->mi2s_osr_clk[dai->driver->id], freq); in lpass_cpu_daiops_set_sysclk()
66 dev_err(dai->dev, "error setting mi2s osrclk to %u: %d\n", in lpass_cpu_daiops_set_sysclk()
78 ret = clk_prepare_enable(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
80 dev_err(dai->dev, "error in enabling mi2s osr clk: %d\n", ret); in lpass_cpu_daiops_startup()
83 ret = clk_prepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
85 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_startup()
86 clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_startup()
96 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_shutdown()
97 unsigned int id = dai->driver->id; in lpass_cpu_daiops_shutdown()
99 clk_disable_unprepare(drvdata->mi2s_osr_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
101 * Ensure LRCLK is disabled even in device node validation. in lpass_cpu_daiops_shutdown()
105 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in lpass_cpu_daiops_shutdown()
106 regmap_fields_write(i2sctl->spken, id, LPAIF_I2SCTL_SPKEN_DISABLE); in lpass_cpu_daiops_shutdown()
108 regmap_fields_write(i2sctl->micen, id, LPAIF_I2SCTL_MICEN_DISABLE); in lpass_cpu_daiops_shutdown()
115 if (drvdata->mi2s_was_prepared[dai->driver->id]) { in lpass_cpu_daiops_shutdown()
116 drvdata->mi2s_was_prepared[dai->driver->id] = false; in lpass_cpu_daiops_shutdown()
117 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
120 clk_unprepare(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_shutdown()
127 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_hw_params()
128 unsigned int id = dai->driver->id; in lpass_cpu_daiops_hw_params()
138 dev_err(dai->dev, "invalid bit width given: %d\n", bitwidth); in lpass_cpu_daiops_hw_params()
142 ret = regmap_fields_write(i2sctl->loopback, id, in lpass_cpu_daiops_hw_params()
145 dev_err(dai->dev, "error updating loopback field: %d\n", ret); in lpass_cpu_daiops_hw_params()
149 ret = regmap_fields_write(i2sctl->wssrc, id, in lpass_cpu_daiops_hw_params()
152 dev_err(dai->dev, "error updating wssrc field: %d\n", ret); in lpass_cpu_daiops_hw_params()
167 dev_err(dai->dev, "invalid bitwidth given: %d\n", bitwidth); in lpass_cpu_daiops_hw_params()
168 return -EINVAL; in lpass_cpu_daiops_hw_params()
171 ret = regmap_fields_write(i2sctl->bitwidth, id, regval); in lpass_cpu_daiops_hw_params()
173 dev_err(dai->dev, "error updating bitwidth field: %d\n", ret); in lpass_cpu_daiops_hw_params()
177 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in lpass_cpu_daiops_hw_params()
178 mode = drvdata->mi2s_playback_sd_mode[id]; in lpass_cpu_daiops_hw_params()
180 mode = drvdata->mi2s_capture_sd_mode[id]; in lpass_cpu_daiops_hw_params()
183 dev_err(dai->dev, "no line is assigned\n"); in lpass_cpu_daiops_hw_params()
184 return -EINVAL; in lpass_cpu_daiops_hw_params()
204 dev_err(dai->dev, "cannot configure 4 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
206 return -EINVAL; in lpass_cpu_daiops_hw_params()
218 dev_err(dai->dev, "cannot configure 6 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
220 return -EINVAL; in lpass_cpu_daiops_hw_params()
231 dev_err(dai->dev, "cannot configure 8 channels with mode %d\n", in lpass_cpu_daiops_hw_params()
233 return -EINVAL; in lpass_cpu_daiops_hw_params()
237 dev_err(dai->dev, "invalid channels given: %u\n", channels); in lpass_cpu_daiops_hw_params()
238 return -EINVAL; in lpass_cpu_daiops_hw_params()
241 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_hw_params()
242 ret = regmap_fields_write(i2sctl->spkmode, id, in lpass_cpu_daiops_hw_params()
245 dev_err(dai->dev, "error writing to i2sctl spkr mode: %d\n", in lpass_cpu_daiops_hw_params()
250 ret = regmap_fields_write(i2sctl->spkmono, id, in lpass_cpu_daiops_hw_params()
253 ret = regmap_fields_write(i2sctl->spkmono, id, in lpass_cpu_daiops_hw_params()
256 ret = regmap_fields_write(i2sctl->micmode, id, in lpass_cpu_daiops_hw_params()
259 dev_err(dai->dev, "error writing to i2sctl mic mode: %d\n", in lpass_cpu_daiops_hw_params()
264 ret = regmap_fields_write(i2sctl->micmono, id, in lpass_cpu_daiops_hw_params()
267 ret = regmap_fields_write(i2sctl->micmono, id, in lpass_cpu_daiops_hw_params()
272 dev_err(dai->dev, "error writing to i2sctl channels mode: %d\n", in lpass_cpu_daiops_hw_params()
277 ret = clk_set_rate(drvdata->mi2s_bit_clk[id], in lpass_cpu_daiops_hw_params()
280 dev_err(dai->dev, "error setting mi2s bitclk to %u: %d\n", in lpass_cpu_daiops_hw_params()
292 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_trigger()
293 unsigned int id = dai->driver->id; in lpass_cpu_daiops_trigger()
294 int ret = -EINVAL; in lpass_cpu_daiops_trigger()
301 * Ensure lpass BCLK/LRCLK is enabled during in lpass_cpu_daiops_trigger()
307 * 2. the BCLK can be shared (ex: headset and headset mic), in lpass_cpu_daiops_trigger()
309 * turn off the shared BCLK while other devices are using in lpass_cpu_daiops_trigger()
312 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_trigger()
313 ret = regmap_fields_write(i2sctl->spken, id, in lpass_cpu_daiops_trigger()
316 ret = regmap_fields_write(i2sctl->micen, id, in lpass_cpu_daiops_trigger()
320 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", in lpass_cpu_daiops_trigger()
323 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_trigger()
325 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_trigger()
326 clk_disable(drvdata->mi2s_osr_clk[id]); in lpass_cpu_daiops_trigger()
334 * To ensure lpass BCLK/LRCLK is disabled during in lpass_cpu_daiops_trigger()
337 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) { in lpass_cpu_daiops_trigger()
338 ret = regmap_fields_write(i2sctl->spken, id, in lpass_cpu_daiops_trigger()
341 ret = regmap_fields_write(i2sctl->micen, id, in lpass_cpu_daiops_trigger()
345 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", in lpass_cpu_daiops_trigger()
348 clk_disable(drvdata->mi2s_bit_clk[dai->driver->id]); in lpass_cpu_daiops_trigger()
360 struct lpaif_i2sctl *i2sctl = drvdata->i2sctl; in lpass_cpu_daiops_prepare()
361 unsigned int id = dai->driver->id; in lpass_cpu_daiops_prepare()
365 * Ensure lpass BCLK/LRCLK is enabled bit before playback/capture in lpass_cpu_daiops_prepare()
370 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) in lpass_cpu_daiops_prepare()
371 ret = regmap_fields_write(i2sctl->spken, id, LPAIF_I2SCTL_SPKEN_ENABLE); in lpass_cpu_daiops_prepare()
373 ret = regmap_fields_write(i2sctl->micen, id, LPAIF_I2SCTL_MICEN_ENABLE); in lpass_cpu_daiops_prepare()
376 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); in lpass_cpu_daiops_prepare()
385 if (!drvdata->mi2s_was_prepared[dai->driver->id]) { in lpass_cpu_daiops_prepare()
386 ret = clk_enable(drvdata->mi2s_bit_clk[id]); in lpass_cpu_daiops_prepare()
388 dev_err(dai->dev, "error in enabling mi2s bit clk: %d\n", ret); in lpass_cpu_daiops_prepare()
391 drvdata->mi2s_was_prepared[dai->driver->id] = true; in lpass_cpu_daiops_prepare()
412 ret = regmap_write(drvdata->lpaif_map, in asoc_qcom_lpass_cpu_dai_probe()
413 LPAIF_I2SCTL_REG(drvdata->variant, dai->driver->id), 0); in asoc_qcom_lpass_cpu_dai_probe()
415 dev_err(dai->dev, "error writing to i2sctl reg: %d\n", ret); in asoc_qcom_lpass_cpu_dai_probe()
426 struct lpass_variant *variant = drvdata->variant; in asoc_qcom_of_xlate_dai_name()
427 int id = args->args[0]; in asoc_qcom_of_xlate_dai_name()
428 int ret = -EINVAL; in asoc_qcom_of_xlate_dai_name()
431 for (i = 0; i < variant->num_dai; i++) { in asoc_qcom_of_xlate_dai_name()
432 if (variant->dai_driver[i].id == id) { in asoc_qcom_of_xlate_dai_name()
433 *dai_name = variant->dai_driver[i].name; in asoc_qcom_of_xlate_dai_name()
443 .name = "lpass-cpu",
450 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_writeable()
453 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_writeable()
457 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_writeable()
464 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_writeable()
475 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_writeable()
476 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
478 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
480 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
482 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_writeable()
492 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_readable()
495 for (i = 0; i < v->i2s_ports; ++i) in lpass_cpu_regmap_readable()
499 for (i = 0; i < v->irq_ports; ++i) { in lpass_cpu_regmap_readable()
506 for (i = 0; i < v->rdma_channels; ++i) { in lpass_cpu_regmap_readable()
519 for (i = 0; i < v->wrdma_channels; ++i) { in lpass_cpu_regmap_readable()
520 if (reg == LPAIF_WRDMACTL_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
522 if (reg == LPAIF_WRDMABASE_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
524 if (reg == LPAIF_WRDMABUFF_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
526 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
528 if (reg == LPAIF_WRDMAPER_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_readable()
538 struct lpass_variant *v = drvdata->variant; in lpass_cpu_regmap_volatile()
541 for (i = 0; i < v->irq_ports; ++i) in lpass_cpu_regmap_volatile()
545 for (i = 0; i < v->rdma_channels; ++i) in lpass_cpu_regmap_volatile()
549 for (i = 0; i < v->wrdma_channels; ++i) in lpass_cpu_regmap_volatile()
550 if (reg == LPAIF_WRDMACURR_REG(v, i + v->wrdma_channel_start)) in lpass_cpu_regmap_volatile()
569 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_init_bitfields()
584 return -ENOMEM; in lpass_hdmi_init_bitfields()
586 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->soft_reset, tx_ctl->soft_reset); in lpass_hdmi_init_bitfields()
587 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->force_reset, tx_ctl->force_reset); in lpass_hdmi_init_bitfields()
588 drvdata->tx_ctl = tx_ctl; in lpass_hdmi_init_bitfields()
590 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->legacy_en, legacy_en); in lpass_hdmi_init_bitfields()
591 drvdata->hdmitx_legacy_en = legacy_en; in lpass_hdmi_init_bitfields()
595 return -ENOMEM; in lpass_hdmi_init_bitfields()
597 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->replace_vbit, vbit_ctl->replace_vbit); in lpass_hdmi_init_bitfields()
598 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->vbit_stream, vbit_ctl->vbit_stream); in lpass_hdmi_init_bitfields()
599 drvdata->vbit_ctl = vbit_ctl; in lpass_hdmi_init_bitfields()
602 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->calc_en, tx_parity); in lpass_hdmi_init_bitfields()
603 drvdata->hdmitx_parity_calc_en = tx_parity; in lpass_hdmi_init_bitfields()
607 return -ENOMEM; in lpass_hdmi_init_bitfields()
609 rval = devm_regmap_field_bulk_alloc(dev, map, &meta_ctl->mute, &v->mute, 7); in lpass_hdmi_init_bitfields()
612 drvdata->meta_ctl = meta_ctl; in lpass_hdmi_init_bitfields()
616 return -ENOMEM; in lpass_hdmi_init_bitfields()
618 rval = devm_regmap_field_bulk_alloc(dev, map, &sstream_ctl->sstream_en, &v->sstream_en, 9); in lpass_hdmi_init_bitfields()
622 drvdata->sstream_ctl = sstream_ctl; in lpass_hdmi_init_bitfields()
625 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->msb_bits, ch_msb); in lpass_hdmi_init_bitfields()
626 drvdata->hdmitx_ch_msb[i] = ch_msb; in lpass_hdmi_init_bitfields()
628 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->lsb_bits, ch_lsb); in lpass_hdmi_init_bitfields()
629 drvdata->hdmitx_ch_lsb[i] = ch_lsb; in lpass_hdmi_init_bitfields()
633 return -ENOMEM; in lpass_hdmi_init_bitfields()
635 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_chs, tx_dmactl->use_hw_chs); in lpass_hdmi_init_bitfields()
636 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->use_hw_usr, tx_dmactl->use_hw_usr); in lpass_hdmi_init_bitfields()
637 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_chs_sel, tx_dmactl->hw_chs_sel); in lpass_hdmi_init_bitfields()
638 QCOM_REGMAP_FIELD_ALLOC(dev, map, v->hw_usr_sel, tx_dmactl->hw_usr_sel); in lpass_hdmi_init_bitfields()
639 drvdata->hdmi_tx_dmactl[i] = tx_dmactl; in lpass_hdmi_init_bitfields()
647 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_writeable()
667 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_writeable()
676 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_writeable()
692 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_readable()
702 for (i = 0; i < v->hdmi_rdma_channels; i++) { in lpass_hdmi_regmap_readable()
722 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_readable()
741 struct lpass_variant *v = drvdata->variant; in lpass_hdmi_regmap_volatile()
753 for (i = 0; i < v->hdmi_rdma_channels; ++i) { in lpass_hdmi_regmap_volatile()
822 for (i = 0; i < data->variant->num_dai; i++) { in of_lpass_cpu_parse_dai_data()
823 id = data->variant->dai_driver[i].id; in of_lpass_cpu_parse_dai_data()
824 data->mi2s_playback_sd_mode[id] = LPAIF_I2SCTL_MODE_8CH; in of_lpass_cpu_parse_dai_data()
825 data->mi2s_capture_sd_mode[id] = LPAIF_I2SCTL_MODE_8CH; in of_lpass_cpu_parse_dai_data()
828 for_each_child_of_node(dev->of_node, node) { in of_lpass_cpu_parse_dai_data()
835 data->hdmi_port_enable = 1; in of_lpass_cpu_parse_dai_data()
837 data->mi2s_playback_sd_mode[id] = in of_lpass_cpu_parse_dai_data()
839 "qcom,playback-sd-lines"); in of_lpass_cpu_parse_dai_data()
840 data->mi2s_capture_sd_mode[id] = in of_lpass_cpu_parse_dai_data()
842 "qcom,capture-sd-lines"); in of_lpass_cpu_parse_dai_data()
853 struct device *dev = &pdev->dev; in asoc_qcom_lpass_cpu_platform_probe()
857 dsp_of_node = of_parse_phandle(pdev->dev.of_node, "qcom,adsp", 0); in asoc_qcom_lpass_cpu_platform_probe()
861 return -EBUSY; in asoc_qcom_lpass_cpu_platform_probe()
866 return -ENOMEM; in asoc_qcom_lpass_cpu_platform_probe()
869 match = of_match_device(dev->driver->of_match_table, dev); in asoc_qcom_lpass_cpu_platform_probe()
870 if (!match || !match->data) in asoc_qcom_lpass_cpu_platform_probe()
871 return -EINVAL; in asoc_qcom_lpass_cpu_platform_probe()
873 drvdata->variant = (struct lpass_variant *)match->data; in asoc_qcom_lpass_cpu_platform_probe()
874 variant = drvdata->variant; in asoc_qcom_lpass_cpu_platform_probe()
878 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-lpaif"); in asoc_qcom_lpass_cpu_platform_probe()
880 drvdata->lpaif = devm_ioremap_resource(dev, res); in asoc_qcom_lpass_cpu_platform_probe()
881 if (IS_ERR((void const __force *)drvdata->lpaif)) { in asoc_qcom_lpass_cpu_platform_probe()
883 PTR_ERR((void const __force *)drvdata->lpaif)); in asoc_qcom_lpass_cpu_platform_probe()
884 return PTR_ERR((void const __force *)drvdata->lpaif); in asoc_qcom_lpass_cpu_platform_probe()
888 variant->wrdma_channels + in asoc_qcom_lpass_cpu_platform_probe()
889 variant->wrdma_channel_start); in asoc_qcom_lpass_cpu_platform_probe()
891 drvdata->lpaif_map = devm_regmap_init_mmio(dev, drvdata->lpaif, in asoc_qcom_lpass_cpu_platform_probe()
893 if (IS_ERR(drvdata->lpaif_map)) { in asoc_qcom_lpass_cpu_platform_probe()
895 PTR_ERR(drvdata->lpaif_map)); in asoc_qcom_lpass_cpu_platform_probe()
896 return PTR_ERR(drvdata->lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
899 if (drvdata->hdmi_port_enable) { in asoc_qcom_lpass_cpu_platform_probe()
900 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "lpass-hdmiif"); in asoc_qcom_lpass_cpu_platform_probe()
902 drvdata->hdmiif = devm_ioremap_resource(dev, res); in asoc_qcom_lpass_cpu_platform_probe()
903 if (IS_ERR((void const __force *)drvdata->hdmiif)) { in asoc_qcom_lpass_cpu_platform_probe()
905 PTR_ERR((void const __force *)drvdata->hdmiif)); in asoc_qcom_lpass_cpu_platform_probe()
906 return PTR_ERR((void const __force *)drvdata->hdmiif); in asoc_qcom_lpass_cpu_platform_probe()
910 variant->hdmi_rdma_channels - 1); in asoc_qcom_lpass_cpu_platform_probe()
911 drvdata->hdmiif_map = devm_regmap_init_mmio(dev, drvdata->hdmiif, in asoc_qcom_lpass_cpu_platform_probe()
913 if (IS_ERR(drvdata->hdmiif_map)) { in asoc_qcom_lpass_cpu_platform_probe()
915 PTR_ERR(drvdata->hdmiif_map)); in asoc_qcom_lpass_cpu_platform_probe()
916 return PTR_ERR(drvdata->hdmiif_map); in asoc_qcom_lpass_cpu_platform_probe()
920 if (variant->init) { in asoc_qcom_lpass_cpu_platform_probe()
921 ret = variant->init(pdev); in asoc_qcom_lpass_cpu_platform_probe()
928 for (i = 0; i < variant->num_dai; i++) { in asoc_qcom_lpass_cpu_platform_probe()
929 dai_id = variant->dai_driver[i].id; in asoc_qcom_lpass_cpu_platform_probe()
933 drvdata->mi2s_osr_clk[dai_id] = devm_clk_get_optional(dev, in asoc_qcom_lpass_cpu_platform_probe()
934 variant->dai_osr_clk_names[i]); in asoc_qcom_lpass_cpu_platform_probe()
935 drvdata->mi2s_bit_clk[dai_id] = devm_clk_get(dev, in asoc_qcom_lpass_cpu_platform_probe()
936 variant->dai_bit_clk_names[i]); in asoc_qcom_lpass_cpu_platform_probe()
937 if (IS_ERR(drvdata->mi2s_bit_clk[dai_id])) { in asoc_qcom_lpass_cpu_platform_probe()
940 variant->dai_bit_clk_names[i], in asoc_qcom_lpass_cpu_platform_probe()
941 PTR_ERR(drvdata->mi2s_bit_clk[dai_id])); in asoc_qcom_lpass_cpu_platform_probe()
942 return PTR_ERR(drvdata->mi2s_bit_clk[dai_id]); in asoc_qcom_lpass_cpu_platform_probe()
947 drvdata->i2sctl = devm_kzalloc(&pdev->dev, sizeof(struct lpaif_i2sctl), in asoc_qcom_lpass_cpu_platform_probe()
951 ret = lpass_cpu_init_i2sctl_bitfields(dev, drvdata->i2sctl, in asoc_qcom_lpass_cpu_platform_probe()
952 drvdata->lpaif_map); in asoc_qcom_lpass_cpu_platform_probe()
958 if (drvdata->hdmi_port_enable) { in asoc_qcom_lpass_cpu_platform_probe()
959 ret = lpass_hdmi_init_bitfields(dev, drvdata->hdmiif_map); in asoc_qcom_lpass_cpu_platform_probe()
967 variant->dai_driver, in asoc_qcom_lpass_cpu_platform_probe()
968 variant->num_dai); in asoc_qcom_lpass_cpu_platform_probe()
989 if (drvdata->variant->exit) in asoc_qcom_lpass_cpu_platform_remove()
990 drvdata->variant->exit(pdev); in asoc_qcom_lpass_cpu_platform_remove()