Lines Matching +full:generic +full:- +full:ahci
1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * ahci.c - AHCI SATA support
6 * Please ALWAYS copy linux-ide@vger.kernel.org
9 * Copyright 2004-2005 Red Hat, Inc.
12 * as Documentation/driver-api/libata.rst
14 * AHCI hardware documentation:
25 #include <linux/dma-mapping.h>
32 #include <linux/ahci-remap.h>
33 #include <linux/io-64-nonatomic-lo-hi.h>
34 #include "ahci.h"
36 #define DRV_NAME "ahci"
106 AHCI_SHT("ahci"),
265 { PCI_VDEVICE(INTEL, 0x06d6), board_ahci }, /* Comet Lake PCH-H RAID */
275 { PCI_VDEVICE(INTEL, 0x27c6), board_ahci }, /* ICH7-M DH */
298 { PCI_VDEVICE(INTEL, 0x3b22), board_ahci }, /* PCH AHCI */
299 { PCI_VDEVICE(INTEL, 0x3b23), board_ahci }, /* PCH AHCI */
302 { PCI_VDEVICE(INTEL, 0x3b29), board_ahci_low_power }, /* PCH M AHCI */
305 { PCI_VDEVICE(INTEL, 0x3b2f), board_ahci }, /* PCH AHCI */
306 { PCI_VDEVICE(INTEL, 0x19b0), board_ahci_pcs7 }, /* DNV AHCI */
307 { PCI_VDEVICE(INTEL, 0x19b1), board_ahci_pcs7 }, /* DNV AHCI */
308 { PCI_VDEVICE(INTEL, 0x19b2), board_ahci_pcs7 }, /* DNV AHCI */
309 { PCI_VDEVICE(INTEL, 0x19b3), board_ahci_pcs7 }, /* DNV AHCI */
310 { PCI_VDEVICE(INTEL, 0x19b4), board_ahci_pcs7 }, /* DNV AHCI */
311 { PCI_VDEVICE(INTEL, 0x19b5), board_ahci_pcs7 }, /* DNV AHCI */
312 { PCI_VDEVICE(INTEL, 0x19b6), board_ahci_pcs7 }, /* DNV AHCI */
313 { PCI_VDEVICE(INTEL, 0x19b7), board_ahci_pcs7 }, /* DNV AHCI */
314 { PCI_VDEVICE(INTEL, 0x19bE), board_ahci_pcs7 }, /* DNV AHCI */
315 { PCI_VDEVICE(INTEL, 0x19bF), board_ahci_pcs7 }, /* DNV AHCI */
316 { PCI_VDEVICE(INTEL, 0x19c0), board_ahci_pcs7 }, /* DNV AHCI */
317 { PCI_VDEVICE(INTEL, 0x19c1), board_ahci_pcs7 }, /* DNV AHCI */
318 { PCI_VDEVICE(INTEL, 0x19c2), board_ahci_pcs7 }, /* DNV AHCI */
319 { PCI_VDEVICE(INTEL, 0x19c3), board_ahci_pcs7 }, /* DNV AHCI */
320 { PCI_VDEVICE(INTEL, 0x19c4), board_ahci_pcs7 }, /* DNV AHCI */
321 { PCI_VDEVICE(INTEL, 0x19c5), board_ahci_pcs7 }, /* DNV AHCI */
322 { PCI_VDEVICE(INTEL, 0x19c6), board_ahci_pcs7 }, /* DNV AHCI */
323 { PCI_VDEVICE(INTEL, 0x19c7), board_ahci_pcs7 }, /* DNV AHCI */
324 { PCI_VDEVICE(INTEL, 0x19cE), board_ahci_pcs7 }, /* DNV AHCI */
325 { PCI_VDEVICE(INTEL, 0x19cF), board_ahci_pcs7 }, /* DNV AHCI */
326 { PCI_VDEVICE(INTEL, 0x1c02), board_ahci }, /* CPT AHCI */
327 { PCI_VDEVICE(INTEL, 0x1c03), board_ahci_low_power }, /* CPT M AHCI */
332 { PCI_VDEVICE(INTEL, 0x1d02), board_ahci }, /* PBG AHCI */
335 { PCI_VDEVICE(INTEL, 0x2323), board_ahci }, /* DH89xxCC AHCI */
336 { PCI_VDEVICE(INTEL, 0x1e02), board_ahci }, /* Panther Point AHCI */
337 { PCI_VDEVICE(INTEL, 0x1e03), board_ahci_low_power }, /* Panther M AHCI */
343 { PCI_VDEVICE(INTEL, 0x8c02), board_ahci }, /* Lynx Point AHCI */
344 { PCI_VDEVICE(INTEL, 0x8c03), board_ahci_low_power }, /* Lynx M AHCI */
351 { PCI_VDEVICE(INTEL, 0x9c02), board_ahci_low_power }, /* Lynx LP AHCI */
352 { PCI_VDEVICE(INTEL, 0x9c03), board_ahci_low_power }, /* Lynx LP AHCI */
359 { PCI_VDEVICE(INTEL, 0x9dd3), board_ahci_low_power }, /* Cannon Lake PCH-LP AHCI */
360 { PCI_VDEVICE(INTEL, 0x1f22), board_ahci }, /* Avoton AHCI */
361 { PCI_VDEVICE(INTEL, 0x1f23), board_ahci }, /* Avoton AHCI */
368 { PCI_VDEVICE(INTEL, 0x1f32), board_ahci_avn }, /* Avoton AHCI */
369 { PCI_VDEVICE(INTEL, 0x1f33), board_ahci_avn }, /* Avoton AHCI */
376 { PCI_VDEVICE(INTEL, 0x2823), board_ahci }, /* Wellsburg/Lewisburg AHCI*/
380 { PCI_VDEVICE(INTEL, 0x43d4), board_ahci }, /* Rocket Lake PCH-H RAID */
381 { PCI_VDEVICE(INTEL, 0x43d5), board_ahci }, /* Rocket Lake PCH-H RAID */
382 { PCI_VDEVICE(INTEL, 0x43d6), board_ahci }, /* Rocket Lake PCH-H RAID */
383 { PCI_VDEVICE(INTEL, 0x43d7), board_ahci }, /* Rocket Lake PCH-H RAID */
384 { PCI_VDEVICE(INTEL, 0x8d02), board_ahci }, /* Wellsburg AHCI */
388 { PCI_VDEVICE(INTEL, 0x8d62), board_ahci }, /* Wellsburg AHCI */
392 { PCI_VDEVICE(INTEL, 0x23a3), board_ahci }, /* Coleto Creek AHCI */
393 { PCI_VDEVICE(INTEL, 0x9c83), board_ahci_low_power }, /* Wildcat LP AHCI */
397 { PCI_VDEVICE(INTEL, 0x8c82), board_ahci }, /* 9 Series AHCI */
398 { PCI_VDEVICE(INTEL, 0x8c83), board_ahci_low_power }, /* 9 Series M AHCI */
405 { PCI_VDEVICE(INTEL, 0x9d03), board_ahci_low_power }, /* Sunrise LP AHCI */
408 { PCI_VDEVICE(INTEL, 0xa102), board_ahci }, /* Sunrise Point-H AHCI */
409 { PCI_VDEVICE(INTEL, 0xa103), board_ahci_low_power }, /* Sunrise M AHCI */
410 { PCI_VDEVICE(INTEL, 0xa105), board_ahci }, /* Sunrise Point-H RAID */
411 { PCI_VDEVICE(INTEL, 0xa106), board_ahci }, /* Sunrise Point-H RAID */
413 { PCI_VDEVICE(INTEL, 0xa10f), board_ahci }, /* Sunrise Point-H RAID */
414 { PCI_VDEVICE(INTEL, 0xa182), board_ahci }, /* Lewisburg AHCI*/
418 { PCI_VDEVICE(INTEL, 0xa202), board_ahci }, /* Lewisburg AHCI*/
422 { PCI_VDEVICE(INTEL, 0xa356), board_ahci }, /* Cannon Lake PCH-H RAID */
423 { PCI_VDEVICE(INTEL, 0x06d7), board_ahci }, /* Comet Lake-H RAID */
424 { PCI_VDEVICE(INTEL, 0xa386), board_ahci }, /* Comet Lake PCH-V RAID */
425 { PCI_VDEVICE(INTEL, 0x0f22), board_ahci_low_power }, /* Bay Trail AHCI */
426 { PCI_VDEVICE(INTEL, 0x0f23), board_ahci_low_power }, /* Bay Trail AHCI */
427 { PCI_VDEVICE(INTEL, 0x22a3), board_ahci_low_power }, /* Cherry Tr. AHCI */
428 { PCI_VDEVICE(INTEL, 0x5ae3), board_ahci_low_power }, /* ApolloLake AHCI */
429 { PCI_VDEVICE(INTEL, 0x34d3), board_ahci_low_power }, /* Ice Lake LP AHCI */
430 { PCI_VDEVICE(INTEL, 0x02d3), board_ahci_low_power }, /* Comet Lake PCH-U AHCI */
432 /* Elkhart Lake IDs 0x4b60 & 0x4b62 https://sata-io.org/product/8803 not tested yet */
433 { PCI_VDEVICE(INTEL, 0x4b63), board_ahci_low_power }, /* Elkhart Lake AHCI */
438 /* JMicron 362B and 362C have an AHCI function with IDE class code */
458 { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
459 { PCI_VDEVICE(AMD, 0x7801), board_ahci_no_debounce_delay }, /* AMD Hudson-2 (AHCI mode) */
462 /* AMD is using RAID class only for ahci controllers */
605 { PCI_VDEVICE(PROMISE, 0x3781), board_ahci }, /* FastTrak TX8660 ahci-mode */
634 /* Generic, PCI class code for AHCI */
664 MODULE_PARM_DESC(marvell_enable, "Marvell SATA via AHCI (1 = enabled)");
666 static int mobile_lpm_policy = -1;
673 "32-bits port map masks to ignore controllers ports. "
675 "\"<mask>\" to apply the same mask to all AHCI controller "
678 "where <pci_dev> is the PCI ID of an AHCI controller in the "
691 hpriv->mask_port_map = mask; in ahci_apply_port_map_mask()
754 if (pdev->vendor == PCI_VENDOR_ID_JMICRON && pdev->device == 0x2361) { in ahci_pci_save_initial_config()
755 dev_info(&pdev->dev, "JMB361 has only one port\n"); in ahci_pci_save_initial_config()
756 hpriv->saved_port_map = 1; in ahci_pci_save_initial_config()
761 * is asserted through the standard AHCI port in ahci_pci_save_initial_config()
764 if (hpriv->flags & AHCI_HFLAG_MV_PATA) { in ahci_pci_save_initial_config()
765 if (pdev->device == 0x6121) in ahci_pci_save_initial_config()
766 hpriv->mask_port_map = 0x3; in ahci_pci_save_initial_config()
768 hpriv->mask_port_map = 0xf; in ahci_pci_save_initial_config()
769 dev_info(&pdev->dev, in ahci_pci_save_initial_config()
770 "Disabling your PATA port. Use the boot option 'ahci.marvell_enable=0' to avoid this.\n"); in ahci_pci_save_initial_config()
775 ahci_get_port_map_mask(&pdev->dev, hpriv); in ahci_pci_save_initial_config()
777 ahci_save_initial_config(&pdev->dev, hpriv); in ahci_pci_save_initial_config()
782 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_pci_reset_controller()
783 struct ahci_host_priv *hpriv = host->private_data; in ahci_pci_reset_controller()
801 struct ahci_host_priv *hpriv = host->private_data; in ahci_pci_init_controller()
802 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_pci_init_controller()
807 if (hpriv->flags & AHCI_HFLAG_MV_PATA) { in ahci_pci_init_controller()
808 if (pdev->device == 0x6121) in ahci_pci_init_controller()
818 dev_dbg(&pdev->dev, "PORT_IRQ_STAT 0x%x\n", tmp); in ahci_pci_init_controller()
829 struct ata_port *ap = link->ap; in ahci_vt8251_hardreset()
830 struct ahci_host_priv *hpriv = ap->host->private_data; in ahci_vt8251_hardreset()
834 hpriv->stop_engine(ap); in ahci_vt8251_hardreset()
836 rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), in ahci_vt8251_hardreset()
839 hpriv->start_engine(ap); in ahci_vt8251_hardreset()
842 * request follow-up softreset. in ahci_vt8251_hardreset()
844 return online ? -EAGAIN : rc; in ahci_vt8251_hardreset()
850 struct ata_port *ap = link->ap; in ahci_p5wdh_hardreset()
851 struct ahci_port_priv *pp = ap->private_data; in ahci_p5wdh_hardreset()
852 struct ahci_host_priv *hpriv = ap->host->private_data; in ahci_p5wdh_hardreset()
853 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; in ahci_p5wdh_hardreset()
858 hpriv->stop_engine(ap); in ahci_p5wdh_hardreset()
861 ata_tf_init(link->device, &tf); in ahci_p5wdh_hardreset()
865 rc = sata_link_hardreset(link, sata_ehc_deb_timing(&link->eh_context), in ahci_p5wdh_hardreset()
868 hpriv->start_engine(ap); in ahci_p5wdh_hardreset()
871 * ASUS P5W-DH Deluxe doesn't send signature FIS after in ahci_p5wdh_hardreset()
893 * ahci_avn_hardreset - attempt more aggressive recovery of Avoton ports.
897 * be recovered by a SATA-hard-reset alone. The failing signature is
903 * reset by bouncing "port enable" in the AHCI PCS configuration
910 const unsigned int *timing = sata_ehc_deb_timing(&link->eh_context); in ahci_avn_hardreset()
911 struct ata_port *ap = link->ap; in ahci_avn_hardreset()
912 struct ahci_port_priv *pp = ap->private_data; in ahci_avn_hardreset()
913 struct ahci_host_priv *hpriv = ap->host->private_data; in ahci_avn_hardreset()
914 u8 *d2h_fis = pp->rx_fis + RX_FIS_D2H_REG; in ahci_avn_hardreset()
915 unsigned long tmo = deadline - jiffies; in ahci_avn_hardreset()
920 hpriv->stop_engine(ap); in ahci_avn_hardreset()
925 int port = ap->port_no; in ahci_avn_hardreset()
926 struct ata_host *host = ap->host; in ahci_avn_hardreset()
927 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_avn_hardreset()
930 ata_tf_init(link->device, &tf); in ahci_avn_hardreset()
952 hpriv->start_engine(ap); in ahci_avn_hardreset()
964 struct ahci_host_priv *hpriv = host->private_data; in ahci_pci_disable_interrupts()
965 void __iomem *mmio = hpriv->mmio; in ahci_pci_disable_interrupts()
968 /* AHCI spec rev1.1 section 8.3.3: in ahci_pci_disable_interrupts()
1005 struct ahci_host_priv *hpriv = host->private_data; in ahci_pci_device_suspend()
1007 if (hpriv->flags & AHCI_HFLAG_NO_SUSPEND) { in ahci_pci_device_suspend()
1008 dev_err(&pdev->dev, in ahci_pci_device_suspend()
1010 return -EIO; in ahci_pci_device_suspend()
1028 if (pdev->dev.power.power_state.event == PM_EVENT_SUSPEND) { in ahci_pci_device_resume()
1050 if (hpriv->cap & HOST_CAP_64) { in ahci_configure_dma_masks()
1052 if (hpriv->flags & AHCI_HFLAG_43BIT_ONLY) in ahci_configure_dma_masks()
1059 * If the device fixup already set the dma_mask to some non-standard in ahci_configure_dma_masks()
1063 * bogus, platform code should use dev->bus_dma_limit instead.. in ahci_configure_dma_masks()
1065 if (pdev->dma_mask && pdev->dma_mask < DMA_BIT_MASK(32)) in ahci_configure_dma_masks()
1068 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(dma_bits)); in ahci_configure_dma_masks()
1070 dev_err(&pdev->dev, "DMA enable failed\n"); in ahci_configure_dma_masks()
1076 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_pci_print_info()
1094 * hardwired to on-board SIMG 4726. The chipset is ICH8 and doesn't
1109 * assumed without follow-up softreset.
1124 struct pci_dev *pdev = to_pci_dev(host->dev); in ahci_p5wdh_workaround()
1126 if (pdev->bus->number == 0 && pdev->devfn == PCI_DEVFN(0x1f, 2) && in ahci_p5wdh_workaround()
1128 struct ata_port *ap = host->ports[1]; in ahci_p5wdh_workaround()
1130 dev_info(&pdev->dev, in ahci_p5wdh_workaround()
1131 "enabling ASUS P5W DH Deluxe on-board SIMG4726 workaround\n"); in ahci_p5wdh_workaround()
1133 ap->ops = &ahci_p5wdh_ops; in ahci_p5wdh_workaround()
1134 ap->link.flags |= ATA_LFLAG_NO_SRST | ATA_LFLAG_ASSUME_ATA; in ahci_p5wdh_workaround()
1139 * Macbook7,1 firmware forcibly disables MCP89 AHCI and changes PCI ID when
1146 printk(KERN_INFO "ahci: enabling MCP89 AHCI mode\n"); in ahci_mcp89_apple_enable()
1174 return pdev->vendor == PCI_VENDOR_ID_NVIDIA && in is_mcp89_apple()
1175 pdev->device == PCI_DEVICE_ID_NVIDIA_NFORCE_MCP89_SATA && in is_mcp89_apple()
1176 pdev->subsystem_vendor == PCI_VENDOR_ID_APPLE && in is_mcp89_apple()
1177 pdev->subsystem_device == 0xcb89; in is_mcp89_apple()
1180 /* only some SB600 ahci controllers can do 64bit DMA */
1186 * working is 1501 which was released on 2007-10-26. in ahci_sb600_enable_64bit()
1192 .ident = "ASUS M2A-VM", in ahci_sb600_enable_64bit()
1196 DMI_MATCH(DMI_BOARD_NAME, "M2A-VM"), in ahci_sb600_enable_64bit()
1201 * All BIOS versions for the MSI K9A2 Platinum (MS-7376) in ahci_sb600_enable_64bit()
1205 * fields as "MICRO-STAR INTERANTIONAL CO.,LTD". in ahci_sb600_enable_64bit()
1208 * "MICRO-STAR INTERNATIONAL CO.,LTD". in ahci_sb600_enable_64bit()
1209 * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER". in ahci_sb600_enable_64bit()
1212 * DMI field of "MS-7376". This was changed to be in ahci_sb600_enable_64bit()
1213 * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still in ahci_sb600_enable_64bit()
1214 * match on DMI_BOARD_NAME of "MS-7376". in ahci_sb600_enable_64bit()
1220 "MICRO-STAR INTER"), in ahci_sb600_enable_64bit()
1221 DMI_MATCH(DMI_BOARD_NAME, "MS-7376"), in ahci_sb600_enable_64bit()
1225 * All BIOS versions for the MSI K9AGM2 (MS-7327) support in ahci_sb600_enable_64bit()
1230 * match on DMI_BOARD_VENDOR of "MICRO-STAR INTER" again. in ahci_sb600_enable_64bit()
1236 "MICRO-STAR INTER"), in ahci_sb600_enable_64bit()
1237 DMI_MATCH(DMI_BOARD_NAME, "MS-7327"), in ahci_sb600_enable_64bit()
1259 if (pdev->bus->number != 0 || pdev->devfn != PCI_DEVFN(0x12, 0) || in ahci_sb600_enable_64bit()
1263 if (!match->driver_data) in ahci_sb600_enable_64bit()
1269 if (strcmp(buf, match->driver_data) >= 0) in ahci_sb600_enable_64bit()
1272 dev_warn(&pdev->dev, in ahci_sb600_enable_64bit()
1274 match->ident); in ahci_sb600_enable_64bit()
1279 dev_warn(&pdev->dev, "%s: enabling 64bit DMA\n", match->ident); in ahci_sb600_enable_64bit()
1289 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_system_poweroff()
1298 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_system_poweroff()
1310 unsigned long slot = (unsigned long)dmi->driver_data; in ahci_broken_system_poweroff()
1311 /* apply the quirk only to on-board controllers */ in ahci_broken_system_poweroff()
1312 return slot == PCI_SLOT(pdev->devfn); in ahci_broken_system_poweroff()
1322 * On HP dv[4-6] and HDX18 with earlier BIOSen, link in ahci_broken_suspend()
1337 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1346 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1355 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1364 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), in ahci_broken_suspend()
1393 if (!dmi || pdev->bus->number || pdev->devfn != PCI_DEVFN(0x1f, 2)) in ahci_broken_suspend()
1399 return strcmp(buf, dmi->driver_data) < 0; in ahci_broken_suspend()
1452 return strcmp(buf, dmi->driver_data) < 0; in ahci_broken_lpm()
1474 .ident = "EP45-DQ6", in ahci_broken_online()
1478 DMI_MATCH(DMI_BOARD_NAME, "EP45-DQ6"), in ahci_broken_online()
1483 .ident = "EP45-DS5", in ahci_broken_online()
1487 DMI_MATCH(DMI_BOARD_NAME, "EP45-DS5"), in ahci_broken_online()
1500 val = (unsigned long)dmi->driver_data; in ahci_broken_online()
1502 return pdev->bus->number == (val >> 8) && pdev->devfn == (val & 0xff); in ahci_broken_online()
1524 * is FPDMA non-zero offset enable which when enabled in ahci_gtf_filter_workaround()
1545 filter = (unsigned long)dmi->driver_data; in ahci_gtf_filter_workaround()
1546 dev_info(host->dev, "applying extra ACPI _GTF filter 0x%x for %s\n", in ahci_gtf_filter_workaround()
1547 filter, dmi->ident); in ahci_gtf_filter_workaround()
1549 for (i = 0; i < host->n_ports; i++) { in ahci_gtf_filter_workaround()
1550 struct ata_port *ap = host->ports[i]; in ahci_gtf_filter_workaround()
1556 dev->gtf_filter |= filter; in ahci_gtf_filter_workaround()
1583 DMI_MATCH(DMI_PRODUCT_NAME, "Switch SA5-271") in acer_sa5_271_workaround()
1590 dev_info(&pdev->dev, "enabling Acer Switch Alpha 12 workaround\n"); in acer_sa5_271_workaround()
1591 if ((hpriv->saved_cap & 0xC734FF00) == 0xC734FF00) { in acer_sa5_271_workaround()
1592 hpriv->port_map = 0x7; in acer_sa5_271_workaround()
1593 hpriv->cap = 0xC734FF02; in acer_sa5_271_workaround()
1613 hpriv = host->private_data; in ahci_thunderx_irq_handler()
1614 mmio = hpriv->mmio; in ahci_thunderx_irq_handler()
1620 irq_masked = irq_stat & hpriv->port_map; in ahci_thunderx_irq_handler()
1621 spin_lock(&host->lock); in ahci_thunderx_irq_handler()
1627 spin_unlock(&host->lock); in ahci_thunderx_irq_handler()
1643 if (pdev->vendor != PCI_VENDOR_ID_INTEL || in ahci_remap_check()
1646 !(readl(hpriv->mmio + AHCI_VSCAP) & 1)) in ahci_remap_check()
1649 cap = readq(hpriv->mmio + AHCI_REMAP_CAP); in ahci_remap_check()
1653 if (readl(hpriv->mmio + ahci_remap_dcc(i)) in ahci_remap_check()
1658 hpriv->remapped_nvme++; in ahci_remap_check()
1661 if (!hpriv->remapped_nvme) in ahci_remap_check()
1664 dev_warn(&pdev->dev, "Found %u remapped NVMe devices.\n", in ahci_remap_check()
1665 hpriv->remapped_nvme); in ahci_remap_check()
1666 dev_warn(&pdev->dev, in ahci_remap_check()
1667 "Switch your BIOS from RAID to AHCI mode to use them.\n"); in ahci_remap_check()
1670 * Don't rely on the msi-x capability in the remap case, in ahci_remap_check()
1671 * share the legacy interrupt across ahci and remapped devices. in ahci_remap_check()
1673 hpriv->flags |= AHCI_HFLAG_NO_MSI; in ahci_remap_check()
1678 return pci_irq_vector(to_pci_dev(host->dev), port); in ahci_get_irq_vector()
1686 if (hpriv->flags & AHCI_HFLAG_NO_MSI) in ahci_init_msi()
1687 return -ENODEV; in ahci_init_msi()
1698 if (!(readl(hpriv->mmio + HOST_CTL) & HOST_MRSM)) { in ahci_init_msi()
1699 hpriv->get_irq_vector = ahci_get_irq_vector; in ahci_init_msi()
1700 hpriv->flags |= AHCI_HFLAG_MULTI_MSI; in ahci_init_msi()
1709 "ahci: MRSM is on, fallback to single MSI\n"); in ahci_init_msi()
1715 * If the host is not capable of supporting per-port vectors, fall in ahci_init_msi()
1716 * back to single MSI before finally attempting single MSI-X. in ahci_init_msi()
1731 if (!(hpriv->flags & AHCI_HFLAG_USE_LPM_POLICY)) in ahci_update_initial_lpm_policy()
1735 if (mobile_lpm_policy != -1) { in ahci_update_initial_lpm_policy()
1741 if (hpriv->cap & HOST_CAP_PART) in ahci_update_initial_lpm_policy()
1743 else if (hpriv->cap & HOST_CAP_SSC) in ahci_update_initial_lpm_policy()
1749 ap->target_lpm_policy = policy; in ahci_update_initial_lpm_policy()
1758 * Only apply the 6-port PCS quirk for known legacy platforms. in ahci_intel_pcs_quirk()
1760 if (!id || id->vendor != PCI_VENDOR_ID_INTEL) in ahci_intel_pcs_quirk()
1764 if (((enum board_ids) id->driver_data) >= board_ahci_pcs7) in ahci_intel_pcs_quirk()
1769 * implemented as write or write-once register. If the register in ahci_intel_pcs_quirk()
1770 * isn't programmed, ahci automatically generates it from number in ahci_intel_pcs_quirk()
1776 if ((tmp16 & hpriv->port_map) != hpriv->port_map) { in ahci_intel_pcs_quirk()
1777 tmp16 |= hpriv->port_map; in ahci_intel_pcs_quirk()
1787 struct ahci_host_priv *hpriv = host->private_data; in remapped_nvme_show()
1789 return sysfs_emit(buf, "%u\n", hpriv->remapped_nvme); in remapped_nvme_show()
1796 unsigned int board_id = ent->driver_data; in ahci_init_one()
1799 struct device *dev = &pdev->dev; in ahci_init_one()
1807 ata_print_version_once(&pdev->dev, DRV_VERSION); in ahci_init_one()
1809 /* The AHCI driver can only drive the SATA ports, the PATA driver in ahci_init_one()
1811 AHCI stays out of the way */ in ahci_init_one()
1812 if (pdev->vendor == PCI_VENDOR_ID_MARVELL && !marvell_enable) in ahci_init_one()
1813 return -ENODEV; in ahci_init_one()
1815 /* Apple BIOS on MCP89 prevents us using AHCI */ in ahci_init_one()
1819 /* Promise's PDC42819 is a SAS/SATA controller that has an AHCI mode. in ahci_init_one()
1820 * At the moment, we can only use the AHCI mode. Let the users know in ahci_init_one()
1823 if (pdev->vendor == PCI_VENDOR_ID_PROMISE) in ahci_init_one()
1824 dev_info(&pdev->dev, in ahci_init_one()
1827 /* Some devices use non-standard BARs */ in ahci_init_one()
1828 if (pdev->vendor == PCI_VENDOR_ID_STMICRO && pdev->device == 0xCC06) in ahci_init_one()
1830 else if (pdev->vendor == 0x1c44 && pdev->device == 0x8000) in ahci_init_one()
1832 else if (pdev->vendor == PCI_VENDOR_ID_CAVIUM) { in ahci_init_one()
1833 if (pdev->device == 0xa01c) in ahci_init_one()
1835 if (pdev->device == 0xa084) in ahci_init_one()
1837 } else if (pdev->vendor == PCI_VENDOR_ID_LOONGSON) { in ahci_init_one()
1838 if (pdev->device == 0x7a08) in ahci_init_one()
1847 if (pdev->vendor == PCI_VENDOR_ID_INTEL && in ahci_init_one()
1848 (pdev->device == 0x2652 || pdev->device == 0x2653)) { in ahci_init_one()
1851 /* ICH6s share the same PCI ID for both piix and ahci in ahci_init_one()
1852 * modes. Enabling ahci mode while MAP indicates in ahci_init_one()
1857 dev_info(&pdev->dev, in ahci_init_one()
1858 "controller is in combined mode, can't enable AHCI mode\n"); in ahci_init_one()
1859 return -ENODEV; in ahci_init_one()
1863 /* AHCI controllers often implement SFF compatible interface. in ahci_init_one()
1867 if (rc == -EBUSY) in ahci_init_one()
1874 return -ENOMEM; in ahci_init_one()
1875 hpriv->flags |= (unsigned long)pi.private_data; in ahci_init_one()
1879 (pdev->revision == 0xa1 || pdev->revision == 0xa2)) in ahci_init_one()
1880 hpriv->flags |= AHCI_HFLAG_NO_MSI; in ahci_init_one()
1883 if (board_id == board_ahci_sb700 && pdev->revision >= 0x40) in ahci_init_one()
1884 hpriv->flags &= ~AHCI_HFLAG_IGN_SERR_INTERNAL; in ahci_init_one()
1888 hpriv->flags &= ~AHCI_HFLAG_32BIT_ONLY; in ahci_init_one()
1890 hpriv->mmio = pcim_iomap_table(pdev)[ahci_pci_bar]; in ahci_init_one()
1895 sysfs_add_file_to_group(&pdev->dev.kobj, in ahci_init_one()
1901 hpriv->flags |= AHCI_HFLAG_NO_DEVSLP; in ahci_init_one()
1904 if (pdev->vendor == PCI_VENDOR_ID_HUAWEI && in ahci_init_one()
1905 pdev->device == 0xa235 && in ahci_init_one()
1906 pdev->revision < 0x30) in ahci_init_one()
1907 hpriv->flags |= AHCI_HFLAG_NO_SXS; in ahci_init_one()
1909 if (pdev->vendor == 0x177d && pdev->device == 0xa01c) in ahci_init_one()
1910 hpriv->irq_handler = ahci_thunderx_irq_handler; in ahci_init_one()
1917 if (hpriv->cap & HOST_CAP_NCQ) { in ahci_init_one()
1920 * Auto-activate optimization is supposed to be in ahci_init_one()
1921 * supported on all AHCI controllers indicating NCQ in ahci_init_one()
1925 if (!(hpriv->flags & AHCI_HFLAG_NO_FPDMA_AA)) in ahci_init_one()
1929 * All AHCI controllers should be forward-compatible in ahci_init_one()
1931 * conditionalized if any buggy AHCI controllers are in ahci_init_one()
1937 if (hpriv->cap & HOST_CAP_PMP) in ahci_init_one()
1944 dev_info(&pdev->dev, in ahci_init_one()
1950 dev_warn(&pdev->dev, in ahci_init_one()
1955 hpriv->flags |= AHCI_HFLAG_NO_SUSPEND; in ahci_init_one()
1956 dev_warn(&pdev->dev, in ahci_init_one()
1961 hpriv->flags |= AHCI_HFLAG_SRST_TOUT_IS_OFFLINE; in ahci_init_one()
1962 dev_info(&pdev->dev, in ahci_init_one()
1967 /* Acer SA5-271 workaround modifies private_data */ in ahci_init_one()
1975 n_ports = max(ahci_nr_ports(hpriv->cap), fls(hpriv->port_map)); in ahci_init_one()
1977 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports); in ahci_init_one()
1979 rc = -ENOMEM; in ahci_init_one()
1982 host->private_data = hpriv; in ahci_init_one()
1988 hpriv->irq = pci_irq_vector(pdev, 0); in ahci_init_one()
1990 if (!(hpriv->cap & HOST_CAP_SSS) || ahci_ignore_sss) in ahci_init_one()
1991 host->flags |= ATA_HOST_PARALLEL_SCAN; in ahci_init_one()
1993 dev_info(&pdev->dev, "SSS flag set, parallel bus scan disabled\n"); in ahci_init_one()
1995 if (!(hpriv->cap & HOST_CAP_PART)) in ahci_init_one()
1996 host->flags |= ATA_HOST_NO_PART; in ahci_init_one()
1998 if (!(hpriv->cap & HOST_CAP_SSC)) in ahci_init_one()
1999 host->flags |= ATA_HOST_NO_SSC; in ahci_init_one()
2001 if (!(hpriv->cap2 & HOST_CAP2_SDS)) in ahci_init_one()
2002 host->flags |= ATA_HOST_NO_DEVSLP; in ahci_init_one()
2007 for (i = 0; i < host->n_ports; i++) { in ahci_init_one()
2008 struct ata_port *ap = host->ports[i]; in ahci_init_one()
2010 ata_port_pbar_desc(ap, ahci_pci_bar, -1, "abar"); in ahci_init_one()
2012 0x100 + ap->port_no * 0x80, "port"); in ahci_init_one()
2015 if (ap->flags & ATA_FLAG_EM) in ahci_init_one()
2016 ap->em_message_type = hpriv->em_msg_type; in ahci_init_one()
2020 /* disabled/not-implemented port */ in ahci_init_one()
2021 if (!(hpriv->port_map & (1 << i))) in ahci_init_one()
2022 ap->ops = &ata_dummy_port_ops; in ahci_init_one()
2049 pm_runtime_put_noidle(&pdev->dev); in ahci_init_one()
2053 sysfs_remove_file_from_group(&pdev->dev.kobj, in ahci_init_one()
2065 sysfs_remove_file_from_group(&pdev->dev.kobj, in ahci_remove_one()
2068 pm_runtime_get_noresume(&pdev->dev); in ahci_remove_one()
2075 MODULE_DESCRIPTION("AHCI SATA low-level driver");