Lines Matching +full:i3c +full:- +full:master
1 // SPDX-License-Identifier: GPL-2.0
3 * Silvaco dual-role I3C master driver
14 #include <linux/i3c/master.h>
24 /* Master Mode Registers */
160 * struct svc_i3c_master - Silvaco I3C Master structure
161 * @base: I3C master controller
168 * @hj_work: Hot-join work
183 * @lock: Transfer lock, protect between IBI work thread and callbacks from master
220 * struct svc_i3c_i2c_dev_data - Device specific data
221 * @index: Index in the master tables corresponding to this device
222 * @ibi: IBI slot index in the master structure
231 static inline bool is_events_enabled(struct svc_i3c_master *master, u32 mask) in is_events_enabled() argument
233 return !!(master->enabled_events & mask); in is_events_enabled()
236 static bool svc_i3c_master_error(struct svc_i3c_master *master) in svc_i3c_master_error() argument
240 mstatus = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_error()
242 merrwarn = readl(master->regs + SVC_I3C_MERRWARN); in svc_i3c_master_error()
243 writel(merrwarn, master->regs + SVC_I3C_MERRWARN); in svc_i3c_master_error()
247 dev_dbg(master->dev, "Warning condition: MSTATUS 0x%08x, MERRWARN 0x%08x\n", in svc_i3c_master_error()
252 dev_err(master->dev, in svc_i3c_master_error()
262 static void svc_i3c_master_enable_interrupts(struct svc_i3c_master *master, u32 mask) in svc_i3c_master_enable_interrupts() argument
264 writel(mask, master->regs + SVC_I3C_MINTSET); in svc_i3c_master_enable_interrupts()
267 static void svc_i3c_master_disable_interrupts(struct svc_i3c_master *master) in svc_i3c_master_disable_interrupts() argument
269 u32 mask = readl(master->regs + SVC_I3C_MINTSET); in svc_i3c_master_disable_interrupts()
271 writel(mask, master->regs + SVC_I3C_MINTCLR); in svc_i3c_master_disable_interrupts()
274 static void svc_i3c_master_clear_merrwarn(struct svc_i3c_master *master) in svc_i3c_master_clear_merrwarn() argument
277 writel(readl(master->regs + SVC_I3C_MERRWARN), in svc_i3c_master_clear_merrwarn()
278 master->regs + SVC_I3C_MERRWARN); in svc_i3c_master_clear_merrwarn()
281 static void svc_i3c_master_flush_fifo(struct svc_i3c_master *master) in svc_i3c_master_flush_fifo() argument
285 master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_flush_fifo()
288 static void svc_i3c_master_reset_fifo_trigger(struct svc_i3c_master *master) in svc_i3c_master_reset_fifo_trigger() argument
298 writel(reg, master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_reset_fifo_trigger()
301 static void svc_i3c_master_reset(struct svc_i3c_master *master) in svc_i3c_master_reset() argument
303 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_reset()
304 svc_i3c_master_reset_fifo_trigger(master); in svc_i3c_master_reset()
305 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_reset()
309 to_svc_i3c_master(struct i3c_master_controller *master) in to_svc_i3c_master() argument
311 return container_of(master, struct svc_i3c_master, base); in to_svc_i3c_master()
316 struct svc_i3c_master *master; in svc_i3c_master_hj_work() local
318 master = container_of(work, struct svc_i3c_master, hj_work); in svc_i3c_master_hj_work()
319 i3c_master_do_daa(&master->base); in svc_i3c_master_hj_work()
323 svc_i3c_master_dev_from_addr(struct svc_i3c_master *master, in svc_i3c_master_dev_from_addr() argument
329 if (master->addrs[i] == ibiaddr) in svc_i3c_master_dev_from_addr()
335 return master->descs[i]; in svc_i3c_master_dev_from_addr()
338 static void svc_i3c_master_emit_stop(struct svc_i3c_master *master) in svc_i3c_master_emit_stop() argument
340 writel(SVC_I3C_MCTRL_REQUEST_STOP, master->regs + SVC_I3C_MCTRL); in svc_i3c_master_emit_stop()
351 static int svc_i3c_master_handle_ibi(struct svc_i3c_master *master, in svc_i3c_master_handle_ibi() argument
361 slot = i3c_generic_ibi_get_free_slot(data->ibi_pool); in svc_i3c_master_handle_ibi()
363 return -ENOSPC; in svc_i3c_master_handle_ibi()
365 slot->len = 0; in svc_i3c_master_handle_ibi()
366 buf = slot->data; in svc_i3c_master_handle_ibi()
368 ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val, in svc_i3c_master_handle_ibi()
371 dev_err(master->dev, "Timeout when polling for COMPLETE\n"); in svc_i3c_master_handle_ibi()
375 while (SVC_I3C_MSTATUS_RXPEND(readl(master->regs + SVC_I3C_MSTATUS)) && in svc_i3c_master_handle_ibi()
376 slot->len < SVC_I3C_FIFO_SIZE) { in svc_i3c_master_handle_ibi()
377 mdatactrl = readl(master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_handle_ibi()
379 readsl(master->regs + SVC_I3C_MRDATAB, buf, count); in svc_i3c_master_handle_ibi()
380 slot->len += count; in svc_i3c_master_handle_ibi()
384 master->ibi.tbq_slot = slot; in svc_i3c_master_handle_ibi()
389 static void svc_i3c_master_ack_ibi(struct svc_i3c_master *master, in svc_i3c_master_ack_ibi() argument
400 writel(ibi_ack_nack, master->regs + SVC_I3C_MCTRL); in svc_i3c_master_ack_ibi()
403 static void svc_i3c_master_nack_ibi(struct svc_i3c_master *master) in svc_i3c_master_nack_ibi() argument
407 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_nack_ibi()
412 struct svc_i3c_master *master = container_of(work, struct svc_i3c_master, ibi_work); in svc_i3c_master_ibi_work() local
419 mutex_lock(&master->lock); in svc_i3c_master_ibi_work()
431 writel(SVC_I3C_MINT_IBIWON, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_ibi_work()
436 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_ibi_work()
439 ret = readl_relaxed_poll_timeout(master->regs + SVC_I3C_MSTATUS, val, in svc_i3c_master_ibi_work()
442 dev_err(master->dev, "Timeout when polling for IBIWON\n"); in svc_i3c_master_ibi_work()
443 svc_i3c_master_emit_stop(master); in svc_i3c_master_ibi_work()
447 status = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_ibi_work()
454 dev = svc_i3c_master_dev_from_addr(master, ibiaddr); in svc_i3c_master_ibi_work()
455 if (!dev || !is_events_enabled(master, SVC_I3C_EVENT_IBI)) in svc_i3c_master_ibi_work()
456 svc_i3c_master_nack_ibi(master); in svc_i3c_master_ibi_work()
458 svc_i3c_master_handle_ibi(master, dev); in svc_i3c_master_ibi_work()
461 if (is_events_enabled(master, SVC_I3C_EVENT_HOTJOIN)) in svc_i3c_master_ibi_work()
462 svc_i3c_master_ack_ibi(master, false); in svc_i3c_master_ibi_work()
464 svc_i3c_master_nack_ibi(master); in svc_i3c_master_ibi_work()
467 svc_i3c_master_nack_ibi(master); in svc_i3c_master_ibi_work()
478 if (svc_i3c_master_error(master)) { in svc_i3c_master_ibi_work()
479 if (master->ibi.tbq_slot) { in svc_i3c_master_ibi_work()
481 i3c_generic_ibi_recycle_slot(data->ibi_pool, in svc_i3c_master_ibi_work()
482 master->ibi.tbq_slot); in svc_i3c_master_ibi_work()
483 master->ibi.tbq_slot = NULL; in svc_i3c_master_ibi_work()
486 svc_i3c_master_emit_stop(master); in svc_i3c_master_ibi_work()
495 i3c_master_queue_ibi(dev, master->ibi.tbq_slot); in svc_i3c_master_ibi_work()
496 master->ibi.tbq_slot = NULL; in svc_i3c_master_ibi_work()
498 svc_i3c_master_emit_stop(master); in svc_i3c_master_ibi_work()
501 svc_i3c_master_emit_stop(master); in svc_i3c_master_ibi_work()
502 if (is_events_enabled(master, SVC_I3C_EVENT_HOTJOIN)) in svc_i3c_master_ibi_work()
503 queue_work(master->base.wq, &master->hj_work); in svc_i3c_master_ibi_work()
511 svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART); in svc_i3c_master_ibi_work()
512 mutex_unlock(&master->lock); in svc_i3c_master_ibi_work()
517 struct svc_i3c_master *master = (struct svc_i3c_master *)dev_id; in svc_i3c_master_irq_handler() local
518 u32 active = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_irq_handler()
524 writel(SVC_I3C_MINT_SLVSTART, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_irq_handler()
526 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_irq_handler()
529 queue_work(master->base.wq, &master->ibi_work); in svc_i3c_master_irq_handler()
537 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_set_speed() local
538 struct i3c_bus *bus = i3c_master_get_bus(&master->base); in svc_i3c_master_set_speed()
543 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_set_speed()
545 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_set_speed()
551 fclk_rate = clk_get_rate(master->fclk); in svc_i3c_master_set_speed()
553 ret = -EINVAL; in svc_i3c_master_set_speed()
557 * Set 50% duty-cycle I2C speed to I3C OPEN-DRAIN mode, so the first in svc_i3c_master_set_speed()
558 * broadcast address is visible to all I2C/I3C devices on the I3C bus. in svc_i3c_master_set_speed()
559 * I3C device working as a I2C device will turn off its 50ns Spike in svc_i3c_master_set_speed()
560 * Filter to change to I3C mode. in svc_i3c_master_set_speed()
562 mconfig = master->mctrl_config; in svc_i3c_master_set_speed()
565 odbaud = DIV_ROUND_UP(fclk_rate, bus->scl_rate.i2c * (2 + 2 * ppbaud)) - 1; in svc_i3c_master_set_speed()
568 writel(mconfig, master->regs + SVC_I3C_MCONFIG); in svc_i3c_master_set_speed()
571 writel(master->mctrl_config, master->regs + SVC_I3C_MCONFIG); in svc_i3c_master_set_speed()
576 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_set_speed()
577 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_set_speed()
584 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_bus_init() local
592 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_bus_init()
594 dev_err(master->dev, in svc_i3c_master_bus_init()
595 "<%s> cannot resume i3c bus master, err: %d\n", in svc_i3c_master_bus_init()
601 fclk_rate = clk_get_rate(master->fclk); in svc_i3c_master_bus_init()
603 ret = -EINVAL; in svc_i3c_master_bus_init()
610 * Using I3C Push-Pull mode, target is 12.5MHz/80ns period. in svc_i3c_master_bus_init()
611 * Simplest configuration is using a 50% duty-cycle of 40ns. in svc_i3c_master_bus_init()
613 ppbaud = DIV_ROUND_UP(40, fclk_period_ns) - 1; in svc_i3c_master_bus_init()
617 * Using I3C Open-Drain mode, target is 4.17MHz/240ns with a in svc_i3c_master_bus_init()
618 * duty-cycle tuned so that high levels are filetered out by in svc_i3c_master_bus_init()
623 odbaud = DIV_ROUND_UP(240 - high_period_ns, high_period_ns) - 1; in svc_i3c_master_bus_init()
626 switch (bus->mode) { in svc_i3c_master_bus_init()
637 i2cbaud = DIV_ROUND_UP(1000, od_low_period_ns) - 2; in svc_i3c_master_bus_init()
645 i2cbaud = DIV_ROUND_UP(2500, od_low_period_ns) - 2; in svc_i3c_master_bus_init()
662 writel(reg, master->regs + SVC_I3C_MCONFIG); in svc_i3c_master_bus_init()
664 master->mctrl_config = reg; in svc_i3c_master_bus_init()
665 /* Master core's registration */ in svc_i3c_master_bus_init()
673 master->regs + SVC_I3C_MDYNADDR); in svc_i3c_master_bus_init()
675 ret = i3c_master_set_info(&master->base, &info); in svc_i3c_master_bus_init()
680 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_bus_init()
681 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_bus_init()
688 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_bus_cleanup() local
691 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_bus_cleanup()
693 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_bus_cleanup()
697 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_bus_cleanup()
699 /* Disable master */ in svc_i3c_master_bus_cleanup()
700 writel(0, master->regs + SVC_I3C_MCONFIG); in svc_i3c_master_bus_cleanup()
702 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_bus_cleanup()
703 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_bus_cleanup()
706 static int svc_i3c_master_reserve_slot(struct svc_i3c_master *master) in svc_i3c_master_reserve_slot() argument
710 if (!(master->free_slots & GENMASK(SVC_I3C_MAX_DEVS - 1, 0))) in svc_i3c_master_reserve_slot()
711 return -ENOSPC; in svc_i3c_master_reserve_slot()
713 slot = ffs(master->free_slots) - 1; in svc_i3c_master_reserve_slot()
715 master->free_slots &= ~BIT(slot); in svc_i3c_master_reserve_slot()
720 static void svc_i3c_master_release_slot(struct svc_i3c_master *master, in svc_i3c_master_release_slot() argument
723 master->free_slots |= BIT(slot); in svc_i3c_master_release_slot()
729 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_attach_i3c_dev() local
733 slot = svc_i3c_master_reserve_slot(master); in svc_i3c_master_attach_i3c_dev()
739 svc_i3c_master_release_slot(master, slot); in svc_i3c_master_attach_i3c_dev()
740 return -ENOMEM; in svc_i3c_master_attach_i3c_dev()
743 data->ibi = -1; in svc_i3c_master_attach_i3c_dev()
744 data->index = slot; in svc_i3c_master_attach_i3c_dev()
745 master->addrs[slot] = dev->info.dyn_addr ? dev->info.dyn_addr : in svc_i3c_master_attach_i3c_dev()
746 dev->info.static_addr; in svc_i3c_master_attach_i3c_dev()
747 master->descs[slot] = dev; in svc_i3c_master_attach_i3c_dev()
758 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_reattach_i3c_dev() local
761 master->addrs[data->index] = dev->info.dyn_addr ? dev->info.dyn_addr : in svc_i3c_master_reattach_i3c_dev()
762 dev->info.static_addr; in svc_i3c_master_reattach_i3c_dev()
771 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_detach_i3c_dev() local
773 master->addrs[data->index] = 0; in svc_i3c_master_detach_i3c_dev()
774 svc_i3c_master_release_slot(master, data->index); in svc_i3c_master_detach_i3c_dev()
782 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_attach_i2c_dev() local
786 slot = svc_i3c_master_reserve_slot(master); in svc_i3c_master_attach_i2c_dev()
792 svc_i3c_master_release_slot(master, slot); in svc_i3c_master_attach_i2c_dev()
793 return -ENOMEM; in svc_i3c_master_attach_i2c_dev()
796 data->index = slot; in svc_i3c_master_attach_i2c_dev()
797 master->addrs[slot] = dev->addr; in svc_i3c_master_attach_i2c_dev()
808 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_detach_i2c_dev() local
810 svc_i3c_master_release_slot(master, data->index); in svc_i3c_master_detach_i2c_dev()
815 static int svc_i3c_master_readb(struct svc_i3c_master *master, u8 *dst, in svc_i3c_master_readb() argument
822 ret = readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, in svc_i3c_master_readb()
829 dst[i] = readl(master->regs + SVC_I3C_MRDATAB); in svc_i3c_master_readb()
835 static int svc_i3c_master_do_daa_locked(struct svc_i3c_master *master, in svc_i3c_master_do_daa_locked() argument
849 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_do_daa_locked()
855 ret = readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, in svc_i3c_master_do_daa_locked()
867 * We only care about the 48-bit provisional ID yet to in svc_i3c_master_do_daa_locked()
871 ret = svc_i3c_master_readb(master, data, 6); in svc_i3c_master_do_daa_locked()
876 prov_id[dev_nb] |= (u64)(data[i]) << (8 * (5 - i)); in svc_i3c_master_do_daa_locked()
879 ret = svc_i3c_master_readb(master, data, 2); in svc_i3c_master_do_daa_locked()
892 /* No I3C devices attached */ in svc_i3c_master_do_daa_locked()
904 return -EIO; in svc_i3c_master_do_daa_locked()
906 dev_nb--; in svc_i3c_master_do_daa_locked()
908 svc_i3c_master_emit_stop(master); in svc_i3c_master_do_daa_locked()
912 return -EIO; in svc_i3c_master_do_daa_locked()
917 ret = readl_poll_timeout_atomic(master->regs + SVC_I3C_MSTATUS, in svc_i3c_master_do_daa_locked()
927 ret = i3c_master_get_free_addr(&master->base, last_addr + 1); in svc_i3c_master_do_daa_locked()
932 dev_dbg(master->dev, "DAA: device %d assigned to 0x%02x\n", in svc_i3c_master_do_daa_locked()
935 writel(addrs[dev_nb], master->regs + SVC_I3C_MWDATAB); in svc_i3c_master_do_daa_locked()
944 static int svc_i3c_update_ibirules(struct svc_i3c_master *master) in svc_i3c_update_ibirules() argument
953 i3c_bus_for_each_i3cdev(&master->base.bus, dev) { in svc_i3c_update_ibirules()
954 if (I3C_BCR_DEVICE_ROLE(dev->info.bcr) == I3C_BCR_I3C_MASTER) in svc_i3c_update_ibirules()
957 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD) { in svc_i3c_update_ibirules()
959 dev->info.dyn_addr); in svc_i3c_update_ibirules()
962 if (dev->info.dyn_addr & BIT(7)) in svc_i3c_update_ibirules()
968 dev->info.dyn_addr); in svc_i3c_update_ibirules()
971 if (dev->info.dyn_addr & BIT(7)) in svc_i3c_update_ibirules()
987 return -ERANGE; in svc_i3c_update_ibirules()
991 writel(reg_mbyte, master->regs + SVC_I3C_IBIRULES); in svc_i3c_update_ibirules()
993 writel(reg_nobyte, master->regs + SVC_I3C_IBIRULES); in svc_i3c_update_ibirules()
1000 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_do_daa() local
1006 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_do_daa()
1008 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_do_daa()
1012 spin_lock_irqsave(&master->xferqueue.lock, flags); in svc_i3c_master_do_daa()
1013 ret = svc_i3c_master_do_daa_locked(master, addrs, &dev_nb); in svc_i3c_master_do_daa()
1014 spin_unlock_irqrestore(&master->xferqueue.lock, flags); in svc_i3c_master_do_daa()
1016 svc_i3c_master_emit_stop(master); in svc_i3c_master_do_daa()
1017 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_do_daa()
1027 * registered on the bus. The I3C stack might still consider 0xb a free in svc_i3c_master_do_daa()
1029 * causing both devices A and B to use the same address 0xb, violating the I3C in svc_i3c_master_do_daa()
1033 * because subsequent steps will scan the entire I3C bus, independent of in svc_i3c_master_do_daa()
1043 /* Configure IBI auto-rules */ in svc_i3c_master_do_daa()
1044 ret = svc_i3c_update_ibirules(master); in svc_i3c_master_do_daa()
1046 dev_err(master->dev, "Cannot handle such a list of devices"); in svc_i3c_master_do_daa()
1049 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_do_daa()
1050 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_do_daa()
1055 static int svc_i3c_master_read(struct svc_i3c_master *master, in svc_i3c_master_read() argument
1065 mstatus = readl(master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_read()
1070 dev_dbg(master->dev, "I3C read timeout\n"); in svc_i3c_master_read()
1071 return -ETIMEDOUT; in svc_i3c_master_read()
1074 mdctrl = readl(master->regs + SVC_I3C_MDATACTRL); in svc_i3c_master_read()
1077 dev_err(master->dev, "I3C receive length too long!\n"); in svc_i3c_master_read()
1078 return -EINVAL; in svc_i3c_master_read()
1081 in[offset + i] = readl(master->regs + SVC_I3C_MRDATAB); in svc_i3c_master_read()
1089 static int svc_i3c_master_write(struct svc_i3c_master *master, in svc_i3c_master_write() argument
1096 ret = readl_poll_timeout(master->regs + SVC_I3C_MDATACTRL, in svc_i3c_master_write()
1107 if (likely(offset < (len - 1))) in svc_i3c_master_write()
1108 writel(out[offset++], master->regs + SVC_I3C_MWDATAB); in svc_i3c_master_write()
1110 writel(out[offset++], master->regs + SVC_I3C_MWDATABE); in svc_i3c_master_write()
1116 static int svc_i3c_master_xfer(struct svc_i3c_master *master, in svc_i3c_master_xfer() argument
1126 writel(SVC_I3C_MINT_IBIWON, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_xfer()
1129 while (retry--) { in svc_i3c_master_xfer()
1136 master->regs + SVC_I3C_MCTRL); in svc_i3c_master_xfer()
1138 ret = readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, in svc_i3c_master_xfer()
1143 if (readl(master->regs + SVC_I3C_MERRWARN) & SVC_I3C_MERRWARN_NACK) { in svc_i3c_master_xfer()
1145 * According to I3C Spec 1.1.1, 11-Jun-2021, section: 5.1.2.2.3. in svc_i3c_master_xfer()
1146 * If the Controller chooses to start an I3C Message with an I3C Dynamic in svc_i3c_master_xfer()
1147 * Address, then special provisions shall be made because that same I3C in svc_i3c_master_xfer()
1165 writel(SVC_I3C_MERRWARN_NACK, master->regs + SVC_I3C_MERRWARN); in svc_i3c_master_xfer()
1167 ret = -ENXIO; in svc_i3c_master_xfer()
1177 * According to I3C spec ver 1.1.1, 5.1.2.2.3 Consequence of Controller Starting a Frame in svc_i3c_master_xfer()
1178 * with I3C Target Address. in svc_i3c_master_xfer()
1180 * The I3C Controller normally should start a Frame, the Address may be arbitrated, and so in svc_i3c_master_xfer()
1181 * the Controller shall monitor to see whether an In-Band Interrupt request, a Controller in svc_i3c_master_xfer()
1183 * a Hot-Join Request has been made. in svc_i3c_master_xfer()
1189 ret = -EAGAIN; in svc_i3c_master_xfer()
1195 ret = svc_i3c_master_read(master, in, xfer_len); in svc_i3c_master_xfer()
1197 ret = svc_i3c_master_write(master, out, xfer_len); in svc_i3c_master_xfer()
1204 ret = readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, in svc_i3c_master_xfer()
1209 writel(SVC_I3C_MINT_COMPLETE, master->regs + SVC_I3C_MSTATUS); in svc_i3c_master_xfer()
1212 svc_i3c_master_emit_stop(master); in svc_i3c_master_xfer()
1215 readl_poll_timeout(master->regs + SVC_I3C_MSTATUS, reg, in svc_i3c_master_xfer()
1222 svc_i3c_master_emit_stop(master); in svc_i3c_master_xfer()
1223 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_xfer()
1229 svc_i3c_master_alloc_xfer(struct svc_i3c_master *master, unsigned int ncmds) in svc_i3c_master_alloc_xfer() argument
1237 INIT_LIST_HEAD(&xfer->node); in svc_i3c_master_alloc_xfer()
1238 xfer->ncmds = ncmds; in svc_i3c_master_alloc_xfer()
1239 xfer->ret = -ETIMEDOUT; in svc_i3c_master_alloc_xfer()
1249 static void svc_i3c_master_dequeue_xfer_locked(struct svc_i3c_master *master, in svc_i3c_master_dequeue_xfer_locked() argument
1252 if (master->xferqueue.cur == xfer) in svc_i3c_master_dequeue_xfer_locked()
1253 master->xferqueue.cur = NULL; in svc_i3c_master_dequeue_xfer_locked()
1255 list_del_init(&xfer->node); in svc_i3c_master_dequeue_xfer_locked()
1258 static void svc_i3c_master_dequeue_xfer(struct svc_i3c_master *master, in svc_i3c_master_dequeue_xfer() argument
1263 spin_lock_irqsave(&master->xferqueue.lock, flags); in svc_i3c_master_dequeue_xfer()
1264 svc_i3c_master_dequeue_xfer_locked(master, xfer); in svc_i3c_master_dequeue_xfer()
1265 spin_unlock_irqrestore(&master->xferqueue.lock, flags); in svc_i3c_master_dequeue_xfer()
1268 static void svc_i3c_master_start_xfer_locked(struct svc_i3c_master *master) in svc_i3c_master_start_xfer_locked() argument
1270 struct svc_i3c_xfer *xfer = master->xferqueue.cur; in svc_i3c_master_start_xfer_locked()
1276 svc_i3c_master_clear_merrwarn(master); in svc_i3c_master_start_xfer_locked()
1277 svc_i3c_master_flush_fifo(master); in svc_i3c_master_start_xfer_locked()
1279 for (i = 0; i < xfer->ncmds; i++) { in svc_i3c_master_start_xfer_locked()
1280 struct svc_i3c_cmd *cmd = &xfer->cmds[i]; in svc_i3c_master_start_xfer_locked()
1282 ret = svc_i3c_master_xfer(master, cmd->rnw, xfer->type, in svc_i3c_master_start_xfer_locked()
1283 cmd->addr, cmd->in, cmd->out, in svc_i3c_master_start_xfer_locked()
1284 cmd->len, &cmd->actual_len, in svc_i3c_master_start_xfer_locked()
1285 cmd->continued); in svc_i3c_master_start_xfer_locked()
1286 /* cmd->xfer is NULL if I2C or CCC transfer */ in svc_i3c_master_start_xfer_locked()
1287 if (cmd->xfer) in svc_i3c_master_start_xfer_locked()
1288 cmd->xfer->actual_len = cmd->actual_len; in svc_i3c_master_start_xfer_locked()
1294 xfer->ret = ret; in svc_i3c_master_start_xfer_locked()
1295 complete(&xfer->comp); in svc_i3c_master_start_xfer_locked()
1298 svc_i3c_master_dequeue_xfer_locked(master, xfer); in svc_i3c_master_start_xfer_locked()
1300 xfer = list_first_entry_or_null(&master->xferqueue.list, in svc_i3c_master_start_xfer_locked()
1304 list_del_init(&xfer->node); in svc_i3c_master_start_xfer_locked()
1306 master->xferqueue.cur = xfer; in svc_i3c_master_start_xfer_locked()
1307 svc_i3c_master_start_xfer_locked(master); in svc_i3c_master_start_xfer_locked()
1310 static void svc_i3c_master_enqueue_xfer(struct svc_i3c_master *master, in svc_i3c_master_enqueue_xfer() argument
1316 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_enqueue_xfer()
1318 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_enqueue_xfer()
1322 init_completion(&xfer->comp); in svc_i3c_master_enqueue_xfer()
1323 spin_lock_irqsave(&master->xferqueue.lock, flags); in svc_i3c_master_enqueue_xfer()
1324 if (master->xferqueue.cur) { in svc_i3c_master_enqueue_xfer()
1325 list_add_tail(&xfer->node, &master->xferqueue.list); in svc_i3c_master_enqueue_xfer()
1327 master->xferqueue.cur = xfer; in svc_i3c_master_enqueue_xfer()
1328 svc_i3c_master_start_xfer_locked(master); in svc_i3c_master_enqueue_xfer()
1330 spin_unlock_irqrestore(&master->xferqueue.lock, flags); in svc_i3c_master_enqueue_xfer()
1332 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_enqueue_xfer()
1333 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_enqueue_xfer()
1337 svc_i3c_master_supports_ccc_cmd(struct i3c_master_controller *master, in svc_i3c_master_supports_ccc_cmd() argument
1341 return (cmd->ndests == 1); in svc_i3c_master_supports_ccc_cmd()
1344 static int svc_i3c_master_send_bdcast_ccc_cmd(struct svc_i3c_master *master, in svc_i3c_master_send_bdcast_ccc_cmd() argument
1347 unsigned int xfer_len = ccc->dests[0].payload.len + 1; in svc_i3c_master_send_bdcast_ccc_cmd()
1353 xfer = svc_i3c_master_alloc_xfer(master, 1); in svc_i3c_master_send_bdcast_ccc_cmd()
1355 return -ENOMEM; in svc_i3c_master_send_bdcast_ccc_cmd()
1360 return -ENOMEM; in svc_i3c_master_send_bdcast_ccc_cmd()
1363 buf[0] = ccc->id; in svc_i3c_master_send_bdcast_ccc_cmd()
1364 memcpy(&buf[1], ccc->dests[0].payload.data, ccc->dests[0].payload.len); in svc_i3c_master_send_bdcast_ccc_cmd()
1366 xfer->type = SVC_I3C_MCTRL_TYPE_I3C; in svc_i3c_master_send_bdcast_ccc_cmd()
1368 cmd = &xfer->cmds[0]; in svc_i3c_master_send_bdcast_ccc_cmd()
1369 cmd->addr = ccc->dests[0].addr; in svc_i3c_master_send_bdcast_ccc_cmd()
1370 cmd->rnw = ccc->rnw; in svc_i3c_master_send_bdcast_ccc_cmd()
1371 cmd->in = NULL; in svc_i3c_master_send_bdcast_ccc_cmd()
1372 cmd->out = buf; in svc_i3c_master_send_bdcast_ccc_cmd()
1373 cmd->len = xfer_len; in svc_i3c_master_send_bdcast_ccc_cmd()
1374 cmd->actual_len = 0; in svc_i3c_master_send_bdcast_ccc_cmd()
1375 cmd->continued = false; in svc_i3c_master_send_bdcast_ccc_cmd()
1377 mutex_lock(&master->lock); in svc_i3c_master_send_bdcast_ccc_cmd()
1378 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_send_bdcast_ccc_cmd()
1379 if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000))) in svc_i3c_master_send_bdcast_ccc_cmd()
1380 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_send_bdcast_ccc_cmd()
1381 mutex_unlock(&master->lock); in svc_i3c_master_send_bdcast_ccc_cmd()
1383 ret = xfer->ret; in svc_i3c_master_send_bdcast_ccc_cmd()
1390 static int svc_i3c_master_send_direct_ccc_cmd(struct svc_i3c_master *master, in svc_i3c_master_send_direct_ccc_cmd() argument
1393 unsigned int xfer_len = ccc->dests[0].payload.len; in svc_i3c_master_send_direct_ccc_cmd()
1394 unsigned int actual_len = ccc->rnw ? xfer_len : 0; in svc_i3c_master_send_direct_ccc_cmd()
1399 xfer = svc_i3c_master_alloc_xfer(master, 2); in svc_i3c_master_send_direct_ccc_cmd()
1401 return -ENOMEM; in svc_i3c_master_send_direct_ccc_cmd()
1403 xfer->type = SVC_I3C_MCTRL_TYPE_I3C; in svc_i3c_master_send_direct_ccc_cmd()
1406 cmd = &xfer->cmds[0]; in svc_i3c_master_send_direct_ccc_cmd()
1407 cmd->addr = I3C_BROADCAST_ADDR; in svc_i3c_master_send_direct_ccc_cmd()
1408 cmd->rnw = 0; in svc_i3c_master_send_direct_ccc_cmd()
1409 cmd->in = NULL; in svc_i3c_master_send_direct_ccc_cmd()
1410 cmd->out = &ccc->id; in svc_i3c_master_send_direct_ccc_cmd()
1411 cmd->len = 1; in svc_i3c_master_send_direct_ccc_cmd()
1412 cmd->actual_len = 0; in svc_i3c_master_send_direct_ccc_cmd()
1413 cmd->continued = true; in svc_i3c_master_send_direct_ccc_cmd()
1416 cmd = &xfer->cmds[1]; in svc_i3c_master_send_direct_ccc_cmd()
1417 cmd->addr = ccc->dests[0].addr; in svc_i3c_master_send_direct_ccc_cmd()
1418 cmd->rnw = ccc->rnw; in svc_i3c_master_send_direct_ccc_cmd()
1419 cmd->in = ccc->rnw ? ccc->dests[0].payload.data : NULL; in svc_i3c_master_send_direct_ccc_cmd()
1420 cmd->out = ccc->rnw ? NULL : ccc->dests[0].payload.data, in svc_i3c_master_send_direct_ccc_cmd()
1421 cmd->len = xfer_len; in svc_i3c_master_send_direct_ccc_cmd()
1422 cmd->actual_len = actual_len; in svc_i3c_master_send_direct_ccc_cmd()
1423 cmd->continued = false; in svc_i3c_master_send_direct_ccc_cmd()
1425 mutex_lock(&master->lock); in svc_i3c_master_send_direct_ccc_cmd()
1426 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_send_direct_ccc_cmd()
1427 if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000))) in svc_i3c_master_send_direct_ccc_cmd()
1428 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_send_direct_ccc_cmd()
1429 mutex_unlock(&master->lock); in svc_i3c_master_send_direct_ccc_cmd()
1431 if (cmd->actual_len != xfer_len) in svc_i3c_master_send_direct_ccc_cmd()
1432 ccc->dests[0].payload.len = cmd->actual_len; in svc_i3c_master_send_direct_ccc_cmd()
1434 ret = xfer->ret; in svc_i3c_master_send_direct_ccc_cmd()
1443 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_send_ccc_cmd() local
1444 bool broadcast = cmd->id < 0x80; in svc_i3c_master_send_ccc_cmd()
1448 ret = svc_i3c_master_send_bdcast_ccc_cmd(master, cmd); in svc_i3c_master_send_ccc_cmd()
1450 ret = svc_i3c_master_send_direct_ccc_cmd(master, cmd); in svc_i3c_master_send_ccc_cmd()
1453 cmd->err = I3C_ERROR_M2; in svc_i3c_master_send_ccc_cmd()
1463 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_priv_xfers() local
1468 xfer = svc_i3c_master_alloc_xfer(master, nxfers); in svc_i3c_master_priv_xfers()
1470 return -ENOMEM; in svc_i3c_master_priv_xfers()
1472 xfer->type = SVC_I3C_MCTRL_TYPE_I3C; in svc_i3c_master_priv_xfers()
1475 struct svc_i3c_cmd *cmd = &xfer->cmds[i]; in svc_i3c_master_priv_xfers()
1477 cmd->xfer = &xfers[i]; in svc_i3c_master_priv_xfers()
1478 cmd->addr = master->addrs[data->index]; in svc_i3c_master_priv_xfers()
1479 cmd->rnw = xfers[i].rnw; in svc_i3c_master_priv_xfers()
1480 cmd->in = xfers[i].rnw ? xfers[i].data.in : NULL; in svc_i3c_master_priv_xfers()
1481 cmd->out = xfers[i].rnw ? NULL : xfers[i].data.out; in svc_i3c_master_priv_xfers()
1482 cmd->len = xfers[i].len; in svc_i3c_master_priv_xfers()
1483 cmd->actual_len = xfers[i].rnw ? xfers[i].len : 0; in svc_i3c_master_priv_xfers()
1484 cmd->continued = (i + 1) < nxfers; in svc_i3c_master_priv_xfers()
1487 mutex_lock(&master->lock); in svc_i3c_master_priv_xfers()
1488 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_priv_xfers()
1489 if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000))) in svc_i3c_master_priv_xfers()
1490 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_priv_xfers()
1491 mutex_unlock(&master->lock); in svc_i3c_master_priv_xfers()
1493 ret = xfer->ret; in svc_i3c_master_priv_xfers()
1504 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_i2c_xfers() local
1509 xfer = svc_i3c_master_alloc_xfer(master, nxfers); in svc_i3c_master_i2c_xfers()
1511 return -ENOMEM; in svc_i3c_master_i2c_xfers()
1513 xfer->type = SVC_I3C_MCTRL_TYPE_I2C; in svc_i3c_master_i2c_xfers()
1516 struct svc_i3c_cmd *cmd = &xfer->cmds[i]; in svc_i3c_master_i2c_xfers()
1518 cmd->addr = master->addrs[data->index]; in svc_i3c_master_i2c_xfers()
1519 cmd->rnw = xfers[i].flags & I2C_M_RD; in svc_i3c_master_i2c_xfers()
1520 cmd->in = cmd->rnw ? xfers[i].buf : NULL; in svc_i3c_master_i2c_xfers()
1521 cmd->out = cmd->rnw ? NULL : xfers[i].buf; in svc_i3c_master_i2c_xfers()
1522 cmd->len = xfers[i].len; in svc_i3c_master_i2c_xfers()
1523 cmd->actual_len = cmd->rnw ? xfers[i].len : 0; in svc_i3c_master_i2c_xfers()
1524 cmd->continued = (i + 1 < nxfers); in svc_i3c_master_i2c_xfers()
1527 mutex_lock(&master->lock); in svc_i3c_master_i2c_xfers()
1528 svc_i3c_master_enqueue_xfer(master, xfer); in svc_i3c_master_i2c_xfers()
1529 if (!wait_for_completion_timeout(&xfer->comp, msecs_to_jiffies(1000))) in svc_i3c_master_i2c_xfers()
1530 svc_i3c_master_dequeue_xfer(master, xfer); in svc_i3c_master_i2c_xfers()
1531 mutex_unlock(&master->lock); in svc_i3c_master_i2c_xfers()
1533 ret = xfer->ret; in svc_i3c_master_i2c_xfers()
1543 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_request_ibi() local
1548 if (dev->ibi->max_payload_len > SVC_I3C_FIFO_SIZE) { in svc_i3c_master_request_ibi()
1549 dev_err(master->dev, "IBI max payload %d should be < %d\n", in svc_i3c_master_request_ibi()
1550 dev->ibi->max_payload_len, SVC_I3C_FIFO_SIZE); in svc_i3c_master_request_ibi()
1551 return -ERANGE; in svc_i3c_master_request_ibi()
1554 data->ibi_pool = i3c_generic_ibi_alloc_pool(dev, req); in svc_i3c_master_request_ibi()
1555 if (IS_ERR(data->ibi_pool)) in svc_i3c_master_request_ibi()
1556 return PTR_ERR(data->ibi_pool); in svc_i3c_master_request_ibi()
1558 spin_lock_irqsave(&master->ibi.lock, flags); in svc_i3c_master_request_ibi()
1559 for (i = 0; i < master->ibi.num_slots; i++) { in svc_i3c_master_request_ibi()
1560 if (!master->ibi.slots[i]) { in svc_i3c_master_request_ibi()
1561 data->ibi = i; in svc_i3c_master_request_ibi()
1562 master->ibi.slots[i] = dev; in svc_i3c_master_request_ibi()
1566 spin_unlock_irqrestore(&master->ibi.lock, flags); in svc_i3c_master_request_ibi()
1568 if (i < master->ibi.num_slots) in svc_i3c_master_request_ibi()
1571 i3c_generic_ibi_free_pool(data->ibi_pool); in svc_i3c_master_request_ibi()
1572 data->ibi_pool = NULL; in svc_i3c_master_request_ibi()
1574 return -ENOSPC; in svc_i3c_master_request_ibi()
1580 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_free_ibi() local
1584 spin_lock_irqsave(&master->ibi.lock, flags); in svc_i3c_master_free_ibi()
1585 master->ibi.slots[data->ibi] = NULL; in svc_i3c_master_free_ibi()
1586 data->ibi = -1; in svc_i3c_master_free_ibi()
1587 spin_unlock_irqrestore(&master->ibi.lock, flags); in svc_i3c_master_free_ibi()
1589 i3c_generic_ibi_free_pool(data->ibi_pool); in svc_i3c_master_free_ibi()
1595 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_enable_ibi() local
1598 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_enable_ibi()
1600 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_enable_ibi()
1604 master->enabled_events++; in svc_i3c_master_enable_ibi()
1605 svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART); in svc_i3c_master_enable_ibi()
1607 return i3c_master_enec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); in svc_i3c_master_enable_ibi()
1613 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_disable_ibi() local
1616 master->enabled_events--; in svc_i3c_master_disable_ibi()
1617 if (!master->enabled_events) in svc_i3c_master_disable_ibi()
1618 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_disable_ibi()
1620 ret = i3c_master_disec_locked(m, dev->info.dyn_addr, I3C_CCC_EVENT_SIR); in svc_i3c_master_disable_ibi()
1622 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_disable_ibi()
1623 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_disable_ibi()
1630 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_enable_hotjoin() local
1633 ret = pm_runtime_resume_and_get(master->dev); in svc_i3c_master_enable_hotjoin()
1635 dev_err(master->dev, "<%s> Cannot get runtime PM.\n", __func__); in svc_i3c_master_enable_hotjoin()
1639 master->enabled_events |= SVC_I3C_EVENT_HOTJOIN; in svc_i3c_master_enable_hotjoin()
1641 svc_i3c_master_enable_interrupts(master, SVC_I3C_MINT_SLVSTART); in svc_i3c_master_enable_hotjoin()
1648 struct svc_i3c_master *master = to_svc_i3c_master(m); in svc_i3c_master_disable_hotjoin() local
1650 master->enabled_events &= ~SVC_I3C_EVENT_HOTJOIN; in svc_i3c_master_disable_hotjoin()
1652 if (!master->enabled_events) in svc_i3c_master_disable_hotjoin()
1653 svc_i3c_master_disable_interrupts(master); in svc_i3c_master_disable_hotjoin()
1655 pm_runtime_mark_last_busy(master->dev); in svc_i3c_master_disable_hotjoin()
1656 pm_runtime_put_autosuspend(master->dev); in svc_i3c_master_disable_hotjoin()
1666 i3c_generic_ibi_recycle_slot(data->ibi_pool, slot); in svc_i3c_master_recycle_ibi_slot()
1692 static int svc_i3c_master_prepare_clks(struct svc_i3c_master *master) in svc_i3c_master_prepare_clks() argument
1696 ret = clk_prepare_enable(master->pclk); in svc_i3c_master_prepare_clks()
1700 ret = clk_prepare_enable(master->fclk); in svc_i3c_master_prepare_clks()
1702 clk_disable_unprepare(master->pclk); in svc_i3c_master_prepare_clks()
1706 ret = clk_prepare_enable(master->sclk); in svc_i3c_master_prepare_clks()
1708 clk_disable_unprepare(master->pclk); in svc_i3c_master_prepare_clks()
1709 clk_disable_unprepare(master->fclk); in svc_i3c_master_prepare_clks()
1716 static void svc_i3c_master_unprepare_clks(struct svc_i3c_master *master) in svc_i3c_master_unprepare_clks() argument
1718 clk_disable_unprepare(master->pclk); in svc_i3c_master_unprepare_clks()
1719 clk_disable_unprepare(master->fclk); in svc_i3c_master_unprepare_clks()
1720 clk_disable_unprepare(master->sclk); in svc_i3c_master_unprepare_clks()
1725 struct device *dev = &pdev->dev; in svc_i3c_master_probe()
1726 struct svc_i3c_master *master; in svc_i3c_master_probe() local
1729 master = devm_kzalloc(dev, sizeof(*master), GFP_KERNEL); in svc_i3c_master_probe()
1730 if (!master) in svc_i3c_master_probe()
1731 return -ENOMEM; in svc_i3c_master_probe()
1733 master->regs = devm_platform_ioremap_resource(pdev, 0); in svc_i3c_master_probe()
1734 if (IS_ERR(master->regs)) in svc_i3c_master_probe()
1735 return PTR_ERR(master->regs); in svc_i3c_master_probe()
1737 master->pclk = devm_clk_get(dev, "pclk"); in svc_i3c_master_probe()
1738 if (IS_ERR(master->pclk)) in svc_i3c_master_probe()
1739 return PTR_ERR(master->pclk); in svc_i3c_master_probe()
1741 master->fclk = devm_clk_get(dev, "fast_clk"); in svc_i3c_master_probe()
1742 if (IS_ERR(master->fclk)) in svc_i3c_master_probe()
1743 return PTR_ERR(master->fclk); in svc_i3c_master_probe()
1745 master->sclk = devm_clk_get(dev, "slow_clk"); in svc_i3c_master_probe()
1746 if (IS_ERR(master->sclk)) in svc_i3c_master_probe()
1747 return PTR_ERR(master->sclk); in svc_i3c_master_probe()
1749 master->irq = platform_get_irq(pdev, 0); in svc_i3c_master_probe()
1750 if (master->irq < 0) in svc_i3c_master_probe()
1751 return master->irq; in svc_i3c_master_probe()
1753 master->dev = dev; in svc_i3c_master_probe()
1755 ret = svc_i3c_master_prepare_clks(master); in svc_i3c_master_probe()
1759 INIT_WORK(&master->hj_work, svc_i3c_master_hj_work); in svc_i3c_master_probe()
1760 INIT_WORK(&master->ibi_work, svc_i3c_master_ibi_work); in svc_i3c_master_probe()
1761 mutex_init(&master->lock); in svc_i3c_master_probe()
1763 ret = devm_request_irq(dev, master->irq, svc_i3c_master_irq_handler, in svc_i3c_master_probe()
1764 IRQF_NO_SUSPEND, "svc-i3c-irq", master); in svc_i3c_master_probe()
1768 master->free_slots = GENMASK(SVC_I3C_MAX_DEVS - 1, 0); in svc_i3c_master_probe()
1770 spin_lock_init(&master->xferqueue.lock); in svc_i3c_master_probe()
1771 INIT_LIST_HEAD(&master->xferqueue.list); in svc_i3c_master_probe()
1773 spin_lock_init(&master->ibi.lock); in svc_i3c_master_probe()
1774 master->ibi.num_slots = SVC_I3C_MAX_DEVS; in svc_i3c_master_probe()
1775 master->ibi.slots = devm_kcalloc(&pdev->dev, master->ibi.num_slots, in svc_i3c_master_probe()
1776 sizeof(*master->ibi.slots), in svc_i3c_master_probe()
1778 if (!master->ibi.slots) { in svc_i3c_master_probe()
1779 ret = -ENOMEM; in svc_i3c_master_probe()
1783 platform_set_drvdata(pdev, master); in svc_i3c_master_probe()
1785 pm_runtime_set_autosuspend_delay(&pdev->dev, SVC_I3C_PM_TIMEOUT_MS); in svc_i3c_master_probe()
1786 pm_runtime_use_autosuspend(&pdev->dev); in svc_i3c_master_probe()
1787 pm_runtime_get_noresume(&pdev->dev); in svc_i3c_master_probe()
1788 pm_runtime_set_active(&pdev->dev); in svc_i3c_master_probe()
1789 pm_runtime_enable(&pdev->dev); in svc_i3c_master_probe()
1791 svc_i3c_master_reset(master); in svc_i3c_master_probe()
1793 /* Register the master */ in svc_i3c_master_probe()
1794 ret = i3c_master_register(&master->base, &pdev->dev, in svc_i3c_master_probe()
1799 pm_runtime_mark_last_busy(&pdev->dev); in svc_i3c_master_probe()
1800 pm_runtime_put_autosuspend(&pdev->dev); in svc_i3c_master_probe()
1805 pm_runtime_dont_use_autosuspend(&pdev->dev); in svc_i3c_master_probe()
1806 pm_runtime_put_noidle(&pdev->dev); in svc_i3c_master_probe()
1807 pm_runtime_disable(&pdev->dev); in svc_i3c_master_probe()
1808 pm_runtime_set_suspended(&pdev->dev); in svc_i3c_master_probe()
1811 svc_i3c_master_unprepare_clks(master); in svc_i3c_master_probe()
1818 struct svc_i3c_master *master = platform_get_drvdata(pdev); in svc_i3c_master_remove() local
1820 cancel_work_sync(&master->hj_work); in svc_i3c_master_remove()
1821 i3c_master_unregister(&master->base); in svc_i3c_master_remove()
1823 pm_runtime_dont_use_autosuspend(&pdev->dev); in svc_i3c_master_remove()
1824 pm_runtime_disable(&pdev->dev); in svc_i3c_master_remove()
1827 static void svc_i3c_save_regs(struct svc_i3c_master *master) in svc_i3c_save_regs() argument
1829 master->saved_regs.mconfig = readl(master->regs + SVC_I3C_MCONFIG); in svc_i3c_save_regs()
1830 master->saved_regs.mdynaddr = readl(master->regs + SVC_I3C_MDYNADDR); in svc_i3c_save_regs()
1833 static void svc_i3c_restore_regs(struct svc_i3c_master *master) in svc_i3c_restore_regs() argument
1835 if (readl(master->regs + SVC_I3C_MDYNADDR) != in svc_i3c_restore_regs()
1836 master->saved_regs.mdynaddr) { in svc_i3c_restore_regs()
1837 writel(master->saved_regs.mconfig, in svc_i3c_restore_regs()
1838 master->regs + SVC_I3C_MCONFIG); in svc_i3c_restore_regs()
1839 writel(master->saved_regs.mdynaddr, in svc_i3c_restore_regs()
1840 master->regs + SVC_I3C_MDYNADDR); in svc_i3c_restore_regs()
1846 struct svc_i3c_master *master = dev_get_drvdata(dev); in svc_i3c_runtime_suspend() local
1848 svc_i3c_save_regs(master); in svc_i3c_runtime_suspend()
1849 svc_i3c_master_unprepare_clks(master); in svc_i3c_runtime_suspend()
1857 struct svc_i3c_master *master = dev_get_drvdata(dev); in svc_i3c_runtime_resume() local
1860 svc_i3c_master_prepare_clks(master); in svc_i3c_runtime_resume()
1862 svc_i3c_restore_regs(master); in svc_i3c_runtime_resume()
1875 { .compatible = "silvaco,i3c-master" },
1884 .name = "silvaco-i3c-master",
1893 MODULE_DESCRIPTION("Silvaco dual-role I3C master driver");