1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/interrupt.h>
19 /* Interrupt numbers per mbigen node supported */
22 /* 64 irqs (Pin0-pin63) are reserved for each mbigen chip */
45  * of interrupt
50  * offset of interrupt type register
51  * This register is used to configure interrupt
57  * struct mbigen_device - holds the information of mbigen device.
60  * @base:		mapped address of this mbigen chip.
64 	void __iomem		*base;  member
85 	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;  in get_mbigen_vec_reg()
97 	hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP;  in get_mbigen_type_reg()
118 	void __iomem *base = data->chip_data;  in mbigen_eoi_irq()  local
121 	get_mbigen_clear_reg(data->hwirq, &mask, &addr);  in mbigen_eoi_irq()
123 	writel_relaxed(mask, base + addr);  in mbigen_eoi_irq()
130 	void __iomem *base = data->chip_data;  in mbigen_set_type()  local
134 		return -EINVAL;  in mbigen_set_type()
136 	get_mbigen_type_reg(data->hwirq, &mask, &addr);  in mbigen_set_type()
138 	val = readl_relaxed(base + addr);  in mbigen_set_type()
145 	writel_relaxed(val, base + addr);  in mbigen_set_type()
151 	.name =			"mbigen-v2",
161 	struct irq_data *d = irq_get_irq_data(desc->irq);  in mbigen_write_msg()
162 	void __iomem *base = d->chip_data;  in mbigen_write_msg()  local
165 	if (!msg->address_lo && !msg->address_hi)  in mbigen_write_msg()
168 	base += get_mbigen_vec_reg(d->hwirq);  in mbigen_write_msg()
169 	val = readl_relaxed(base);  in mbigen_write_msg()
172 	val |= (msg->data << IRQ_EVENT_ID_SHIFT);  in mbigen_write_msg()
177 	writel_relaxed(val, base);  in mbigen_write_msg()
185 	if (is_of_node(fwspec->fwnode) || is_acpi_device_node(fwspec->fwnode)) {  in mbigen_domain_translate()
186 		if (fwspec->param_count != 2)  in mbigen_domain_translate()
187 			return -EINVAL;  in mbigen_domain_translate()
189 		if ((fwspec->param[0] > MAXIMUM_IRQ_PIN_NUM) ||  in mbigen_domain_translate()
190 			(fwspec->param[0] < RESERVED_IRQ_PER_MBIGEN_CHIP))  in mbigen_domain_translate()
191 			return -EINVAL;  in mbigen_domain_translate()
193 			*hwirq = fwspec->param[0];  in mbigen_domain_translate()
196 		if ((fwspec->param[1] == IRQ_TYPE_EDGE_RISING) ||  in mbigen_domain_translate()
197 			(fwspec->param[1] == IRQ_TYPE_LEVEL_HIGH))  in mbigen_domain_translate()
198 			*type = fwspec->param[1];  in mbigen_domain_translate()
200 			return -EINVAL;  in mbigen_domain_translate()
204 	return -EINVAL;  in mbigen_domain_translate()
230 				      &mbigen_irq_chip, mgn_chip->base);  in mbigen_irq_domain_alloc()
250 	struct platform_device *child;  in mbigen_of_create_domain()  local
256 	for_each_child_of_node(pdev->dev.of_node, np) {  in mbigen_of_create_domain()
257 		if (!of_property_read_bool(np, "interrupt-controller"))  in mbigen_of_create_domain()
260 		child = of_platform_device_create(np, NULL, NULL);  in mbigen_of_create_domain()
261 		if (!child) {  in mbigen_of_create_domain()
262 			ret = -ENOMEM;  in mbigen_of_create_domain()
266 		if (of_property_read_u32(child->dev.of_node, "num-pins",  in mbigen_of_create_domain()
268 			dev_err(&pdev->dev, "No num-pins property\n");  in mbigen_of_create_domain()
269 			ret = -EINVAL;  in mbigen_of_create_domain()
273 		domain = platform_msi_create_device_domain(&child->dev, num_pins,  in mbigen_of_create_domain()
278 			ret = -ENOMEM;  in mbigen_of_create_domain()
304 	 * "num-pins" is the total number of interrupt pins implemented in  in mbigen_acpi_create_domain()
305 	 * this mbigen instance, and mbigen is an interrupt controller  in mbigen_acpi_create_domain()
307 	 * use "num-pins" to alloc MSI vectors which are needed by client  in mbigen_acpi_create_domain()
319 	 *			ToUUID("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"),  in mbigen_acpi_create_domain()
321 	 *				Package () {"num-pins", 378}  in mbigen_acpi_create_domain()
326 	ret = device_property_read_u32(&pdev->dev, "num-pins", &num_pins);  in mbigen_acpi_create_domain()
328 		return -EINVAL;  in mbigen_acpi_create_domain()
330 	domain = platform_msi_create_device_domain(&pdev->dev, num_pins,  in mbigen_acpi_create_domain()
335 		return -ENOMEM;  in mbigen_acpi_create_domain()
343 	return -ENODEV;  in mbigen_acpi_create_domain()
353 	mgn_chip = devm_kzalloc(&pdev->dev, sizeof(*mgn_chip), GFP_KERNEL);  in mbigen_device_probe()
355 		return -ENOMEM;  in mbigen_device_probe()
357 	mgn_chip->pdev = pdev;  in mbigen_device_probe()
361 		return -EINVAL;  in mbigen_device_probe()
363 	mgn_chip->base = devm_ioremap(&pdev->dev, res->start,  in mbigen_device_probe()
365 	if (!mgn_chip->base) {  in mbigen_device_probe()
366 		dev_err(&pdev->dev, "failed to ioremap %pR\n", res);  in mbigen_device_probe()
367 		return -ENOMEM;  in mbigen_device_probe()
370 	if (IS_ENABLED(CONFIG_OF) && pdev->dev.of_node)  in mbigen_device_probe()
372 	else if (ACPI_COMPANION(&pdev->dev))  in mbigen_device_probe()
375 		err = -EINVAL;  in mbigen_device_probe()
378 		dev_err(&pdev->dev, "Failed to create mbi-gen irqdomain\n");  in mbigen_device_probe()
387 	{ .compatible = "hisilicon,mbigen-v2" },
394 		.name		= "Hisilicon MBIGEN-V2",