617 	struct ntb_transport_mw *mw;  in ntb_transport_setup_qp_mw()  local
629 	mw = &nt->mw_vec[mw_num];  in ntb_transport_setup_qp_mw()
631 	if (!mw->virt_addr)  in ntb_transport_setup_qp_mw()
639 	rx_size = (unsigned int)mw->xlat_size / num_qps_mw;  in ntb_transport_setup_qp_mw()
640 	qp->rx_buff = mw->virt_addr + rx_size * (qp_num / mw_count);  in ntb_transport_setup_qp_mw()
793 	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];  in ntb_free_mw()  local
796 	if (!mw->virt_addr)  in ntb_free_mw()
800 	dma_free_coherent(&pdev->dev, mw->alloc_size,  in ntb_free_mw()
801 			  mw->alloc_addr, mw->dma_addr);  in ntb_free_mw()
802 	mw->xlat_size = 0;  in ntb_free_mw()
803 	mw->buff_size = 0;  in ntb_free_mw()
804 	mw->alloc_size = 0;  in ntb_free_mw()
805 	mw->alloc_addr = NULL;  in ntb_free_mw()
806 	mw->virt_addr = NULL;  in ntb_free_mw()
809 static int ntb_alloc_mw_buffer(struct ntb_transport_mw *mw,  in ntb_alloc_mw_buffer()  argument
828 	alloc_addr = dma_alloc_attrs(ntb_dev, mw->alloc_size,  in ntb_alloc_mw_buffer()
832 		dev_err(ntb_dev, "Unable to alloc MW buff of size %zu\n",  in ntb_alloc_mw_buffer()
833 			mw->alloc_size);  in ntb_alloc_mw_buffer()
845 		if (mw->alloc_size > mw->buff_size) {  in ntb_alloc_mw_buffer()
854 	mw->alloc_addr = alloc_addr;  in ntb_alloc_mw_buffer()
855 	mw->virt_addr = virt_addr;  in ntb_alloc_mw_buffer()
856 	mw->dma_addr = dma_addr;  in ntb_alloc_mw_buffer()
861 	dma_free_coherent(ntb_dev, mw->alloc_size, alloc_addr, dma_addr);  in ntb_alloc_mw_buffer()
869 	struct ntb_transport_mw *mw = &nt->mw_vec[num_mw];  in ntb_set_mw()  local
888 	if (mw->xlat_size == xlat_size)  in ntb_set_mw()
891 	if (mw->buff_size)  in ntb_set_mw()
895 	mw->xlat_size = xlat_size;  in ntb_set_mw()
896 	mw->buff_size = buff_size;  in ntb_set_mw()
897 	mw->alloc_size = buff_size;  in ntb_set_mw()
899 	rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);  in ntb_set_mw()
901 		mw->alloc_size *= 2;  in ntb_set_mw()
902 		rc = ntb_alloc_mw_buffer(mw, &pdev->dev, xlat_align);  in ntb_set_mw()
905 				"Unable to alloc aligned MW buff\n");  in ntb_set_mw()
906 			mw->xlat_size = 0;  in ntb_set_mw()
907 			mw->buff_size = 0;  in ntb_set_mw()
908 			mw->alloc_size = 0;  in ntb_set_mw()
914 	rc = ntb_mw_set_trans(nt->ndev, PIDX, num_mw, mw->dma_addr,  in ntb_set_mw()
915 			      mw->xlat_size);  in ntb_set_mw()
917 		dev_err(&pdev->dev, "Unable to set mw%d translation", num_mw);  in ntb_set_mw()
1107 		dev_dbg(&pdev->dev, "Remote MW%d size = %#llx\n", i, val64);  in ntb_transport_link_work()
1264 	struct ntb_transport_mw *mw;  in ntb_transport_probe()  local
1273 		dev_err(&ndev->dev, "Inbound MW based NTB API is required\n");  in ntb_transport_probe()
1297 	 * we will reserve the last MW for the MSI window.  in ntb_transport_probe()
1309 	/* Limit the MW's based on the availability of scratchpads */  in ntb_transport_probe()
1330 		mw = &nt->mw_vec[i];  in ntb_transport_probe()
1332 		rc = ntb_peer_mw_get_addr(ndev, i, &mw->phys_addr,  in ntb_transport_probe()
1333 					  &mw->phys_size);  in ntb_transport_probe()
1337 		mw->vbase = ioremap_wc(mw->phys_addr, mw->phys_size);  in ntb_transport_probe()
1338 		if (!mw->vbase) {  in ntb_transport_probe()
1343 		mw->buff_size = 0;  in ntb_transport_probe()
1344 		mw->xlat_size = 0;  in ntb_transport_probe()
1345 		mw->virt_addr = NULL;  in ntb_transport_probe()
1346 		mw->dma_addr = 0;  in ntb_transport_probe()
1412 		mw = &nt->mw_vec[i];  in ntb_transport_probe()
1413 		iounmap(mw->vbase);  in ntb_transport_probe()