Lines Matching +full:read +full:- +full:1
1 /* SPDX-License-Identifier: GPL-2.0+ */
11 #include <linux/spi/spi-mem.h>
18 * requires a 4-byte (32-bit) address.
24 #define SPINOR_OP_RDSR 0x05 /* Read status register */
25 #define SPINOR_OP_WRSR 0x01 /* Write status register 1 byte */
26 #define SPINOR_OP_RDSR2 0x3f /* Read status register 2 */
28 #define SPINOR_OP_READ 0x03 /* Read data bytes (low frequency) */
29 #define SPINOR_OP_READ_FAST 0x0b /* Read data bytes (high frequency) */
30 #define SPINOR_OP_READ_1_1_2 0x3b /* Read data bytes (Dual Output SPI) */
31 #define SPINOR_OP_READ_1_2_2 0xbb /* Read data bytes (Dual I/O SPI) */
32 #define SPINOR_OP_READ_1_1_4 0x6b /* Read data bytes (Quad Output SPI) */
33 #define SPINOR_OP_READ_1_4_4 0xeb /* Read data bytes (Quad I/O SPI) */
34 #define SPINOR_OP_READ_1_1_8 0x8b /* Read data bytes (Octal Output SPI) */
35 #define SPINOR_OP_READ_1_8_8 0xcb /* Read data bytes (Octal I/O SPI) */
46 #define SPINOR_OP_RDID 0x9f /* Read JEDEC ID */
47 #define SPINOR_OP_RDSFDP 0x5a /* Read SFDP */
48 #define SPINOR_OP_RDCR 0x35 /* Read configuration register */
53 /* 4-byte address opcodes - used on Spansion and some Macronix flashes. */
54 #define SPINOR_OP_READ_4B 0x13 /* Read data bytes (low frequency) */
55 #define SPINOR_OP_READ_FAST_4B 0x0c /* Read data bytes (high frequency) */
56 #define SPINOR_OP_READ_1_1_2_4B 0x3c /* Read data bytes (Dual Output SPI) */
57 #define SPINOR_OP_READ_1_2_2_4B 0xbc /* Read data bytes (Dual I/O SPI) */
58 #define SPINOR_OP_READ_1_1_4_4B 0x6c /* Read data bytes (Quad Output SPI) */
59 #define SPINOR_OP_READ_1_4_4_4B 0xec /* Read data bytes (Quad I/O SPI) */
60 #define SPINOR_OP_READ_1_1_8_4B 0x7c /* Read data bytes (Octal Output SPI) */
61 #define SPINOR_OP_READ_1_8_8_4B 0xcc /* Read data bytes (Octal I/O SPI) */
71 /* Double Transfer Rate opcodes - defined in JEDEC JESD216B. */
85 #define SPINOR_OP_EN4B 0xb7 /* Enter 4-byte mode */
86 #define SPINOR_OP_EX4B 0xe9 /* Exit 4-byte mode */
92 #define SPINOR_OP_RD_EVCR 0x65 /* Read EVCR register */
98 #define SPINOR_OP_RSECR 0x48 /* Read Security registers */
102 #define SR_WEL BIT(1) /* Write enable latch */
105 #define SR_BP1 BIT(3) /* Block protect 1 */
124 #define SR2_QUAD_EN_BIT1 BIT(1)
125 #define SR2_LB1 BIT(3) /* Security Register Lock Bit 1 */
160 SNOR_PROTO_1_1_1 = SNOR_PROTO_STR(1, 1, 1),
161 SNOR_PROTO_1_1_2 = SNOR_PROTO_STR(1, 1, 2),
162 SNOR_PROTO_1_1_4 = SNOR_PROTO_STR(1, 1, 4),
163 SNOR_PROTO_1_1_8 = SNOR_PROTO_STR(1, 1, 8),
164 SNOR_PROTO_1_2_2 = SNOR_PROTO_STR(1, 2, 2),
165 SNOR_PROTO_1_4_4 = SNOR_PROTO_STR(1, 4, 4),
166 SNOR_PROTO_1_8_8 = SNOR_PROTO_STR(1, 8, 8),
171 SNOR_PROTO_1_1_1_DTR = SNOR_PROTO_DTR(1, 1, 1),
172 SNOR_PROTO_1_2_2_DTR = SNOR_PROTO_DTR(1, 2, 2),
173 SNOR_PROTO_1_4_4_DTR = SNOR_PROTO_DTR(1, 4, 4),
174 SNOR_PROTO_1_8_8_DTR = SNOR_PROTO_DTR(1, 8, 8),
207 * struct spi_nor_hwcaps - Structure for describing the hardware capabilies
216 *(Fast) Read capabilities.
219 * then Quad SPI protocols before Dual SPI protocols, Fast Read and lastly
220 * (Slow) Read.
224 #define SNOR_HWCAPS_READ_FAST BIT(1)
249 * Like (Fast) Read capabilities, Octal/Quad SPI protocols are preferred to the
250 * legacy SPI 1-1-1 protocol.
291 * struct spi_nor_controller_ops - SPI NOR controller driver specific
294 * read/write/erase/lock/unlock operations.
296 * read/write/erase/lock/unlock operations.
297 * @read_reg: read out the register.
299 * @read: read data from the SPI NOR.
312 ssize_t (*read)(struct spi_nor *nor, loff_t from, size_t len, u8 *buf); member
319 * enum spi_nor_cmd_ext - describes the command opcode extension in DTR mode
325 * combine to form a 16-bit opcode.
343 * struct spi_nor - Structure for defining the SPI NOR layer
345 * @lock: the lock for the read/write/erase/lock/unlock operations
346 * @rww: Read-While-Write (RWW) sync lock
349 * @rww.ongoing_rd: a read is ongoing on the chip
355 * layer is not DMA-able
363 * @read_opcode: the read opcode
364 * @read_dummy: the dummy needed by the read operation
369 * @read_proto: the SPI protocol for read operations
375 * @params: [FLASH-SPECIFIC] SPI NOR flash parameters and settings.
428 mtd_set_of_node(&nor->mtd, np); in spi_nor_set_flash_node()
433 return mtd_get_of_node(&nor->mtd); in spi_nor_get_flash_node()
437 * spi_nor_scan() - scan the SPI NOR