Lines Matching +full:codec +full:- +full:irq
1 // SPDX-License-Identifier: GPL-2.0-or-later
7 * This is modified (by Sasha Khapyorsky <sashak@alsa-project.org>) version
29 static int index = -2; /* Exclude the first card */
38 MODULE_PARM_DESC(ac97_clock, "AC'97 codec clock (0 = auto-detect).");
53 ICH_REG_##name##_BDBAR = base + 0x0, /* dword - buffer descriptor list base address */ \
54 ICH_REG_##name##_CIV = base + 0x04, /* byte - current index value */ \
55 ICH_REG_##name##_LVI = base + 0x05, /* byte - last valid index */ \
56 ICH_REG_##name##_SR = base + 0x06, /* byte - status register */ \
57 ICH_REG_##name##_PICB = base + 0x08, /* word - position in current buffer */ \
58 ICH_REG_##name##_PIV = base + 0x0a, /* byte - prefetched index value */ \
59 ICH_REG_##name##_CR = base + 0x0b, /* byte - control register */ \
89 #define ICH_REG_GLOB_CNT 0x3c /* dword - global control */
97 #define ICH_REG_GLOB_STA 0x40 /* dword - global status */
99 #define ICH_TCR 0x10000000 /* ICH4: tertiary (AC_SDIN2) codec ready */
102 #define ICH_P2INT 0x02000000 /* ICH4: PCM2-In interrupt */
103 #define ICH_M2INT 0x01000000 /* ICH4: Mic2-In interrupt */
105 #define ICH_MULTICHAN_CAP 0x00300000 /* ICH4: multi-channel capability bits (RO) */
114 #define ICH_SCR 0x00000200 /* secondary (AC_SDIN1) codec ready */
115 #define ICH_PCR 0x00000100 /* primary (AC_SDIN0) codec ready */
123 #define ICH_REG_ACC_SEMA 0x44 /* byte - codec write semaphore */
124 #define ICH_CAS 0x01 /* codec access semaphore */
136 #define get_ichdev(substream) (substream->runtime->private_data)
166 int irq; member
218 * Lowlevel I/O - busmaster
223 return ioread8(chip->bmaddr + offset); in igetbyte()
228 return ioread16(chip->bmaddr + offset); in igetword()
233 return ioread32(chip->bmaddr + offset); in igetdword()
238 iowrite8(val, chip->bmaddr + offset); in iputbyte()
243 iowrite16(val, chip->bmaddr + offset); in iputword()
248 iowrite32(val, chip->bmaddr + offset); in iputdword()
252 * Lowlevel I/O - AC'97 registers
257 return ioread16(chip->addr + offset); in iagetword()
262 iowrite16(val, chip->addr + offset); in iaputword()
270 * access to AC97 codec via normal i/o (for ICH and SIS7013)
273 /* return the GLOB_STA bit for the corresponding codec */
274 static unsigned int get_ich_codec_bit(struct intel8x0m *chip, unsigned int codec) in get_ich_codec_bit() argument
279 if (snd_BUG_ON(codec >= 3)) in get_ich_codec_bit()
281 return codec_bit[codec]; in get_ich_codec_bit()
284 static int snd_intel8x0m_codec_semaphore(struct intel8x0m *chip, unsigned int codec) in snd_intel8x0m_codec_semaphore() argument
288 if (codec > 1) in snd_intel8x0m_codec_semaphore()
289 return -EIO; in snd_intel8x0m_codec_semaphore()
290 codec = get_ich_codec_bit(chip, codec); in snd_intel8x0m_codec_semaphore()
292 /* codec ready ? */ in snd_intel8x0m_codec_semaphore()
293 if ((igetdword(chip, ICHREG(GLOB_STA)) & codec) == 0) in snd_intel8x0m_codec_semaphore()
294 return -EIO; in snd_intel8x0m_codec_semaphore()
302 } while (time--); in snd_intel8x0m_codec_semaphore()
307 dev_err(chip->card->dev, in snd_intel8x0m_codec_semaphore()
312 return -EBUSY; in snd_intel8x0m_codec_semaphore()
319 struct intel8x0m *chip = ac97->private_data; in snd_intel8x0m_codec_write()
321 if (snd_intel8x0m_codec_semaphore(chip, ac97->num) < 0) { in snd_intel8x0m_codec_write()
322 if (! chip->in_ac97_init) in snd_intel8x0m_codec_write()
323 dev_err(chip->card->dev, in snd_intel8x0m_codec_write()
325 ac97->num, reg); in snd_intel8x0m_codec_write()
327 iaputword(chip, reg + ac97->num * 0x80, val); in snd_intel8x0m_codec_write()
333 struct intel8x0m *chip = ac97->private_data; in snd_intel8x0m_codec_read()
337 if (snd_intel8x0m_codec_semaphore(chip, ac97->num) < 0) { in snd_intel8x0m_codec_read()
338 if (! chip->in_ac97_init) in snd_intel8x0m_codec_read()
339 dev_err(chip->card->dev, in snd_intel8x0m_codec_read()
341 ac97->num, reg); in snd_intel8x0m_codec_read()
344 res = iagetword(chip, reg + ac97->num * 0x80); in snd_intel8x0m_codec_read()
350 if (! chip->in_ac97_init) in snd_intel8x0m_codec_read()
351 dev_err(chip->card->dev, in snd_intel8x0m_codec_read()
353 ac97->num, reg); in snd_intel8x0m_codec_read()
369 __le32 *bdbar = ichdev->bdbar; in snd_intel8x0m_setup_periods()
370 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_setup_periods()
372 iputdword(chip, port + ICH_REG_OFF_BDBAR, ichdev->bdbar_addr); in snd_intel8x0m_setup_periods()
373 if (ichdev->size == ichdev->fragsize) { in snd_intel8x0m_setup_periods()
374 ichdev->ack_reload = ichdev->ack = 2; in snd_intel8x0m_setup_periods()
375 ichdev->fragsize1 = ichdev->fragsize >> 1; in snd_intel8x0m_setup_periods()
377 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf); in snd_intel8x0m_setup_periods()
379 ichdev->fragsize1 >> chip->pcm_pos_shift); in snd_intel8x0m_setup_periods()
380 bdbar[idx + 2] = cpu_to_le32(ichdev->physbuf + (ichdev->size >> 1)); in snd_intel8x0m_setup_periods()
382 ichdev->fragsize1 >> chip->pcm_pos_shift); in snd_intel8x0m_setup_periods()
384 ichdev->frags = 2; in snd_intel8x0m_setup_periods()
386 ichdev->ack_reload = ichdev->ack = 1; in snd_intel8x0m_setup_periods()
387 ichdev->fragsize1 = ichdev->fragsize; in snd_intel8x0m_setup_periods()
389 bdbar[idx + 0] = cpu_to_le32(ichdev->physbuf + (((idx >> 1) * ichdev->fragsize) % ichdev->size)); in snd_intel8x0m_setup_periods()
391 ichdev->fragsize >> chip->pcm_pos_shift); in snd_intel8x0m_setup_periods()
393 dev_dbg(chip->card->dev, "bdbar[%i] = 0x%x [0x%x]\n", in snd_intel8x0m_setup_periods()
397 ichdev->frags = ichdev->size / ichdev->fragsize; in snd_intel8x0m_setup_periods()
399 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi = ICH_REG_LVI_MASK); in snd_intel8x0m_setup_periods()
400 ichdev->civ = 0; in snd_intel8x0m_setup_periods()
402 ichdev->lvi_frag = ICH_REG_LVI_MASK % ichdev->frags; in snd_intel8x0m_setup_periods()
403 ichdev->position = 0; in snd_intel8x0m_setup_periods()
405 dev_dbg(chip->card->dev, in snd_intel8x0m_setup_periods()
407 ichdev->lvi_frag, ichdev->frags, ichdev->fragsize, in snd_intel8x0m_setup_periods()
408 ichdev->fragsize1); in snd_intel8x0m_setup_periods()
411 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_setup_periods()
420 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_update()
425 if (civ == ichdev->civ) { in snd_intel8x0m_update()
428 ichdev->civ++; in snd_intel8x0m_update()
429 ichdev->civ &= ICH_REG_LVI_MASK; in snd_intel8x0m_update()
431 step = civ - ichdev->civ; in snd_intel8x0m_update()
435 // snd_printd("step = %d, %d -> %d\n", step, ichdev->civ, civ); in snd_intel8x0m_update()
436 ichdev->civ = civ; in snd_intel8x0m_update()
439 ichdev->position += step * ichdev->fragsize1; in snd_intel8x0m_update()
440 ichdev->position %= ichdev->size; in snd_intel8x0m_update()
441 ichdev->lvi += step; in snd_intel8x0m_update()
442 ichdev->lvi &= ICH_REG_LVI_MASK; in snd_intel8x0m_update()
443 iputbyte(chip, port + ICH_REG_OFF_LVI, ichdev->lvi); in snd_intel8x0m_update()
445 ichdev->lvi_frag++; in snd_intel8x0m_update()
446 ichdev->lvi_frag %= ichdev->frags; in snd_intel8x0m_update()
447 ichdev->bdbar[ichdev->lvi * 2] = cpu_to_le32(ichdev->physbuf + in snd_intel8x0m_update()
448 ichdev->lvi_frag * in snd_intel8x0m_update()
449 ichdev->fragsize1); in snd_intel8x0m_update()
451 dev_dbg(chip->card->dev, in snd_intel8x0m_update()
453 ichdev->lvi * 2, ichdev->bdbar[ichdev->lvi * 2], in snd_intel8x0m_update()
454 ichdev->bdbar[ichdev->lvi * 2 + 1], inb(ICH_REG_OFF_PIV + port), in snd_intel8x0m_update()
457 if (--ichdev->ack == 0) { in snd_intel8x0m_update()
458 ichdev->ack = ichdev->ack_reload; in snd_intel8x0m_update()
462 if (ack && ichdev->substream) { in snd_intel8x0m_update()
463 spin_unlock(&chip->reg_lock); in snd_intel8x0m_update()
464 snd_pcm_period_elapsed(ichdev->substream); in snd_intel8x0m_update()
465 spin_lock(&chip->reg_lock); in snd_intel8x0m_update()
467 iputbyte(chip, port + ichdev->roff_sr, ICH_FIFOE | ICH_BCIS | ICH_LVBCI); in snd_intel8x0m_update()
470 static irqreturn_t snd_intel8x0m_interrupt(int irq, void *dev_id) in snd_intel8x0m_interrupt() argument
477 spin_lock(&chip->reg_lock); in snd_intel8x0m_interrupt()
478 status = igetdword(chip, chip->int_sta_reg); in snd_intel8x0m_interrupt()
480 spin_unlock(&chip->reg_lock); in snd_intel8x0m_interrupt()
483 if ((status & chip->int_sta_mask) == 0) { in snd_intel8x0m_interrupt()
485 iputdword(chip, chip->int_sta_reg, status); in snd_intel8x0m_interrupt()
486 spin_unlock(&chip->reg_lock); in snd_intel8x0m_interrupt()
490 for (i = 0; i < chip->bdbars_count; i++) { in snd_intel8x0m_interrupt()
491 ichdev = &chip->ichd[i]; in snd_intel8x0m_interrupt()
492 if (status & ichdev->int_sta_mask) in snd_intel8x0m_interrupt()
497 iputdword(chip, chip->int_sta_reg, status & chip->int_sta_mask); in snd_intel8x0m_interrupt()
498 spin_unlock(&chip->reg_lock); in snd_intel8x0m_interrupt()
512 unsigned long port = ichdev->reg_offset; in snd_intel8x0m_pcm_trigger()
530 return -EINVAL; in snd_intel8x0m_pcm_trigger()
535 while (!(igetbyte(chip, port + ichdev->roff_sr) & ICH_DCH)) ; in snd_intel8x0m_pcm_trigger()
548 ptr1 = igetword(chip, ichdev->reg_offset + ichdev->roff_picb) << chip->pcm_pos_shift; in snd_intel8x0m_pcm_pointer()
550 ptr = ichdev->fragsize1 - ptr1; in snd_intel8x0m_pcm_pointer()
553 ptr += ichdev->position; in snd_intel8x0m_pcm_pointer()
554 if (ptr >= ichdev->size) in snd_intel8x0m_pcm_pointer()
556 return bytes_to_frames(substream->runtime, ptr); in snd_intel8x0m_pcm_pointer()
562 struct snd_pcm_runtime *runtime = substream->runtime; in snd_intel8x0m_pcm_prepare()
565 ichdev->physbuf = runtime->dma_addr; in snd_intel8x0m_pcm_prepare()
566 ichdev->size = snd_pcm_lib_buffer_bytes(substream); in snd_intel8x0m_pcm_prepare()
567 ichdev->fragsize = snd_pcm_lib_period_bytes(substream); in snd_intel8x0m_pcm_prepare()
568 snd_ac97_write(ichdev->ac97, AC97_LINE1_RATE, runtime->rate); in snd_intel8x0m_pcm_prepare()
569 snd_ac97_write(ichdev->ac97, AC97_LINE1_LEVEL, 0); in snd_intel8x0m_pcm_prepare()
604 struct snd_pcm_runtime *runtime = substream->runtime; in snd_intel8x0m_pcm_open()
607 ichdev->substream = substream; in snd_intel8x0m_pcm_open()
608 runtime->hw = snd_intel8x0m_stream; in snd_intel8x0m_pcm_open()
613 runtime->private_data = ichdev; in snd_intel8x0m_pcm_open()
621 return snd_intel8x0m_pcm_open(substream, &chip->ichd[ICHD_MDMOUT]); in snd_intel8x0m_playback_open()
628 chip->ichd[ICHD_MDMOUT].substream = NULL; in snd_intel8x0m_playback_close()
636 return snd_intel8x0m_pcm_open(substream, &chip->ichd[ICHD_MDMIN]); in snd_intel8x0m_capture_open()
643 chip->ichd[ICHD_MDMIN].substream = NULL; in snd_intel8x0m_capture_close()
681 if (rec->suffix) in snd_intel8x0m_pcm1()
682 sprintf(name, "Intel ICH - %s", rec->suffix); in snd_intel8x0m_pcm1()
685 err = snd_pcm_new(chip->card, name, device, in snd_intel8x0m_pcm1()
686 rec->playback_ops ? 1 : 0, in snd_intel8x0m_pcm1()
687 rec->capture_ops ? 1 : 0, &pcm); in snd_intel8x0m_pcm1()
691 if (rec->playback_ops) in snd_intel8x0m_pcm1()
692 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, rec->playback_ops); in snd_intel8x0m_pcm1()
693 if (rec->capture_ops) in snd_intel8x0m_pcm1()
694 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, rec->capture_ops); in snd_intel8x0m_pcm1()
696 pcm->private_data = chip; in snd_intel8x0m_pcm1()
697 pcm->info_flags = 0; in snd_intel8x0m_pcm1()
698 pcm->dev_class = SNDRV_PCM_CLASS_MODEM; in snd_intel8x0m_pcm1()
699 if (rec->suffix) in snd_intel8x0m_pcm1()
700 sprintf(pcm->name, "%s - %s", chip->card->shortname, rec->suffix); in snd_intel8x0m_pcm1()
702 strcpy(pcm->name, chip->card->shortname); in snd_intel8x0m_pcm1()
703 chip->pcm[device] = pcm; in snd_intel8x0m_pcm1()
706 &chip->pci->dev, in snd_intel8x0m_pcm1()
707 rec->prealloc_size, in snd_intel8x0m_pcm1()
708 rec->prealloc_max_size); in snd_intel8x0m_pcm1()
732 switch (chip->device_type) { in snd_intel8x0m_pcm()
750 if (i > 0 && rec->ac97_idx) { in snd_intel8x0m_pcm()
751 /* activate PCM only when associated AC'97 codec */ in snd_intel8x0m_pcm()
752 if (! chip->ichd[rec->ac97_idx].ac97) in snd_intel8x0m_pcm()
761 chip->pcm_devs = device; in snd_intel8x0m_pcm()
772 struct intel8x0m *chip = bus->private_data; in snd_intel8x0m_mixer_free_ac97_bus()
773 chip->ac97_bus = NULL; in snd_intel8x0m_mixer_free_ac97_bus()
778 struct intel8x0m *chip = ac97->private_data; in snd_intel8x0m_mixer_free_ac97()
779 chip->ac97 = NULL; in snd_intel8x0m_mixer_free_ac97()
795 chip->in_ac97_init = 1; in snd_intel8x0m_mixer()
804 err = snd_ac97_bus(chip->card, 0, &ops, chip, &pbus); in snd_intel8x0m_mixer()
807 pbus->private_free = snd_intel8x0m_mixer_free_ac97_bus; in snd_intel8x0m_mixer()
809 pbus->clock = ac97_clock; in snd_intel8x0m_mixer()
810 chip->ac97_bus = pbus; in snd_intel8x0m_mixer()
812 ac97.pci = chip->pci; in snd_intel8x0m_mixer()
816 dev_err(chip->card->dev, in snd_intel8x0m_mixer()
817 "Unable to initialize codec #%d\n", ac97.num); in snd_intel8x0m_mixer()
822 chip->ac97 = x97; in snd_intel8x0m_mixer()
823 if(ac97_is_modem(x97) && !chip->ichd[ICHD_MDMIN].ac97) { in snd_intel8x0m_mixer()
824 chip->ichd[ICHD_MDMIN].ac97 = x97; in snd_intel8x0m_mixer()
825 chip->ichd[ICHD_MDMOUT].ac97 = x97; in snd_intel8x0m_mixer()
828 chip->in_ac97_init = 0; in snd_intel8x0m_mixer()
832 /* clear the cold-reset bit for the next chance */ in snd_intel8x0m_mixer()
833 if (chip->device_type != DEVICE_ALI) in snd_intel8x0m_mixer()
868 dev_err(chip->card->dev, "AC'97 warm reset still in progress? [0x%x]\n", in snd_intel8x0m_ich_chip_init()
870 return -EIO; in snd_intel8x0m_ich_chip_init()
874 /* wait for any codec ready status. in snd_intel8x0m_ich_chip_init()
887 /* no codec is found */ in snd_intel8x0m_ich_chip_init()
888 dev_err(chip->card->dev, in snd_intel8x0m_ich_chip_init()
889 "codec_ready: codec is not ready [0x%x]\n", in snd_intel8x0m_ich_chip_init()
891 return -EIO; in snd_intel8x0m_ich_chip_init()
907 if (chip->ac97) in snd_intel8x0m_ich_chip_init()
908 status |= get_ich_codec_bit(chip, chip->ac97->num); in snd_intel8x0m_ich_chip_init()
920 if (chip->device_type == DEVICE_SIS) { in snd_intel8x0m_ich_chip_init()
939 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_chip_init()
940 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); in snd_intel8x0m_chip_init()
942 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_chip_init()
943 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); in snd_intel8x0m_chip_init()
945 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_chip_init()
946 iputdword(chip, ICH_REG_OFF_BDBAR + chip->ichd[i].reg_offset, chip->ichd[i].bdbar_addr); in snd_intel8x0m_chip_init()
952 struct intel8x0m *chip = card->private_data; in snd_intel8x0m_free()
955 if (chip->irq < 0) in snd_intel8x0m_free()
958 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_free()
959 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, 0x00); in snd_intel8x0m_free()
961 for (i = 0; i < chip->bdbars_count; i++) in snd_intel8x0m_free()
962 iputbyte(chip, ICH_REG_OFF_CR + chip->ichd[i].reg_offset, ICH_RESETREGS); in snd_intel8x0m_free()
964 if (chip->irq >= 0) in snd_intel8x0m_free()
965 free_irq(chip->irq, chip); in snd_intel8x0m_free()
975 struct intel8x0m *chip = card->private_data; in intel8x0m_suspend()
978 snd_ac97_suspend(chip->ac97); in intel8x0m_suspend()
979 if (chip->irq >= 0) { in intel8x0m_suspend()
980 free_irq(chip->irq, chip); in intel8x0m_suspend()
981 chip->irq = -1; in intel8x0m_suspend()
982 card->sync_irq = -1; in intel8x0m_suspend()
991 struct intel8x0m *chip = card->private_data; in intel8x0m_resume()
993 if (request_irq(pci->irq, snd_intel8x0m_interrupt, in intel8x0m_resume()
995 dev_err(dev, "unable to grab IRQ %d, disabling device\n", in intel8x0m_resume()
996 pci->irq); in intel8x0m_resume()
998 return -EIO; in intel8x0m_resume()
1000 chip->irq = pci->irq; in intel8x0m_resume()
1001 card->sync_irq = chip->irq; in intel8x0m_resume()
1003 snd_ac97_resume(chip->ac97); in intel8x0m_resume()
1018 struct intel8x0m *chip = entry->private_data; in snd_intel8x0m_proc_read()
1022 if (chip->device_type == DEVICE_ALI) in snd_intel8x0m_proc_read()
1037 snd_card_ro_proc_new(chip->card, "intel8x0m", chip, in snd_intel8x0m_proc_init()
1050 struct intel8x0m *chip = card->private_data; in snd_intel8x0m_init()
1065 spin_lock_init(&chip->reg_lock); in snd_intel8x0m_init()
1066 chip->device_type = device_type; in snd_intel8x0m_init()
1067 chip->card = card; in snd_intel8x0m_init()
1068 chip->pci = pci; in snd_intel8x0m_init()
1069 chip->irq = -1; in snd_intel8x0m_init()
1071 err = pci_request_regions(pci, card->shortname); in snd_intel8x0m_init()
1077 chip->bmaddr = pcim_iomap(pci, 0, 0); in snd_intel8x0m_init()
1080 chip->addr = pcim_iomap(pci, 2, 0); in snd_intel8x0m_init()
1082 chip->addr = pcim_iomap(pci, 0, 0); in snd_intel8x0m_init()
1084 chip->bmaddr = pcim_iomap(pci, 3, 0); in snd_intel8x0m_init()
1086 chip->bmaddr = pcim_iomap(pci, 1, 0); in snd_intel8x0m_init()
1090 chip->bdbars_count = 2; in snd_intel8x0m_init()
1093 for (i = 0; i < chip->bdbars_count; i++) { in snd_intel8x0m_init()
1094 ichdev = &chip->ichd[i]; in snd_intel8x0m_init()
1095 ichdev->ichd = i; in snd_intel8x0m_init()
1096 ichdev->reg_offset = tbl[i].offset; in snd_intel8x0m_init()
1097 ichdev->int_sta_mask = tbl[i].int_sta_mask; in snd_intel8x0m_init()
1100 ichdev->roff_sr = ICH_REG_OFF_PICB; in snd_intel8x0m_init()
1101 ichdev->roff_picb = ICH_REG_OFF_SR; in snd_intel8x0m_init()
1103 ichdev->roff_sr = ICH_REG_OFF_SR; in snd_intel8x0m_init()
1104 ichdev->roff_picb = ICH_REG_OFF_PICB; in snd_intel8x0m_init()
1107 ichdev->ali_slot = (ichdev->reg_offset - 0x40) / 0x10; in snd_intel8x0m_init()
1110 chip->pcm_pos_shift = (device_type == DEVICE_SIS) ? 0 : 1; in snd_intel8x0m_init()
1114 chip->bdbars = snd_devm_alloc_pages(&pci->dev, SNDRV_DMA_TYPE_DEV, in snd_intel8x0m_init()
1115 chip->bdbars_count * sizeof(u32) * in snd_intel8x0m_init()
1117 if (!chip->bdbars) in snd_intel8x0m_init()
1118 return -ENOMEM; in snd_intel8x0m_init()
1123 for (i = 0; i < chip->bdbars_count; i++) { in snd_intel8x0m_init()
1124 ichdev = &chip->ichd[i]; in snd_intel8x0m_init()
1125 ichdev->bdbar = ((__le32 *)chip->bdbars->area) + (i * ICH_MAX_FRAGS * 2); in snd_intel8x0m_init()
1126 ichdev->bdbar_addr = chip->bdbars->addr + (i * sizeof(u32) * ICH_MAX_FRAGS * 2); in snd_intel8x0m_init()
1127 int_sta_masks |= ichdev->int_sta_mask; in snd_intel8x0m_init()
1129 chip->int_sta_reg = ICH_REG_GLOB_STA; in snd_intel8x0m_init()
1130 chip->int_sta_mask = int_sta_masks; in snd_intel8x0m_init()
1139 * re-acquired in PM callbacks. in snd_intel8x0m_init()
1142 if (request_irq(pci->irq, snd_intel8x0m_interrupt, IRQF_SHARED, in snd_intel8x0m_init()
1144 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq); in snd_intel8x0m_init()
1145 return -EBUSY; in snd_intel8x0m_init()
1147 chip->irq = pci->irq; in snd_intel8x0m_init()
1148 card->sync_irq = chip->irq; in snd_intel8x0m_init()
1150 card->private_free = snd_intel8x0m_free; in snd_intel8x0m_init()
1159 { PCI_DEVICE_ID_INTEL_82801AA_6, "Intel 82801AA-ICH" },
1160 { PCI_DEVICE_ID_INTEL_82801AB_6, "Intel 82901AB-ICH0" },
1161 { PCI_DEVICE_ID_INTEL_82801BA_6, "Intel 82801BA-ICH2" },
1163 { PCI_DEVICE_ID_INTEL_82801CA_6, "Intel 82801CA-ICH3" },
1164 { PCI_DEVICE_ID_INTEL_82801DB_6, "Intel 82801DB-ICH4" },
1189 err = snd_devm_card_new(&pci->dev, index, id, THIS_MODULE, in __snd_intel8x0m_probe()
1193 chip = card->private_data; in __snd_intel8x0m_probe()
1195 strcpy(card->driver, "ICH-MODEM"); in __snd_intel8x0m_probe()
1196 strcpy(card->shortname, "Intel ICH"); in __snd_intel8x0m_probe()
1197 for (name = shortnames; name->id; name++) { in __snd_intel8x0m_probe()
1198 if (pci->device == name->id) { in __snd_intel8x0m_probe()
1199 strcpy(card->shortname, name->s); in __snd_intel8x0m_probe()
1203 strcat(card->shortname," Modem"); in __snd_intel8x0m_probe()
1205 err = snd_intel8x0m_init(card, pci, pci_id->driver_data); in __snd_intel8x0m_probe()
1218 sprintf(card->longname, "%s at irq %i", in __snd_intel8x0m_probe()
1219 card->shortname, chip->irq); in __snd_intel8x0m_probe()
1231 return snd_card_free_on_error(&pci->dev, __snd_intel8x0m_probe(pci, pci_id)); in snd_intel8x0m_probe()