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Lines Matching +full:dsp +full:- +full:irq

1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
15 * Hardware interface for generic Intel audio DSP HDA IP
26 * tell DSP cmd is done - clear busy in hda_dsp_ipc_host_done()
27 * interrupt and send reply msg to dsp in hda_dsp_ipc_host_done()
44 * set DONE bit - tell DSP we have received the reply msg in hda_dsp_ipc_dsp_done()
45 * from DSP, and processed it, don't send more reply to host in hda_dsp_ipc_dsp_done()
61 /* send IPC message to DSP */ in hda_dsp_ipc_send_msg()
62 sof_mailbox_write(sdev, sdev->host_box.offset, msg->msg_data, in hda_dsp_ipc_send_msg()
63 msg->msg_size); in hda_dsp_ipc_send_msg()
86 struct sof_ipc4_msg *msg_data = msg->msg_data; in hda_dsp_ipc4_schedule_d0i3_work()
88 /* Schedule a delayed work for d0i3 entry after sending non-pm ipc msg */ in hda_dsp_ipc4_schedule_d0i3_work()
89 if (hda_dsp_ipc4_pm_msg(msg_data->primary)) in hda_dsp_ipc4_schedule_d0i3_work()
92 mod_delayed_work(system_wq, &hdev->d0i3_work, in hda_dsp_ipc4_schedule_d0i3_work()
98 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in hda_dsp_ipc4_send_msg()
99 struct sof_ipc4_msg *msg_data = msg->msg_data; in hda_dsp_ipc4_send_msg()
102 hdev->delayed_ipc_tx_msg = msg; in hda_dsp_ipc4_send_msg()
106 hdev->delayed_ipc_tx_msg = NULL; in hda_dsp_ipc4_send_msg()
109 if (msg_data->data_size) in hda_dsp_ipc4_send_msg()
110 sof_mailbox_write(sdev, sdev->host_box.offset, msg_data->data_ptr, in hda_dsp_ipc4_send_msg()
111 msg_data->data_size); in hda_dsp_ipc4_send_msg()
113 snd_sof_dsp_write(sdev, HDA_DSP_BAR, HDA_DSP_REG_HIPCIE, msg_data->extension); in hda_dsp_ipc4_send_msg()
115 msg_data->primary | HDA_DSP_REG_HIPCI_BUSY); in hda_dsp_ipc4_send_msg()
124 struct snd_sof_ipc_msg *msg = sdev->msg; in hda_dsp_ipc_get_reply()
134 dev_warn(sdev->dev, "unexpected ipc interrupt raised!\n"); in hda_dsp_ipc_get_reply()
138 hdr = msg->msg_data; in hda_dsp_ipc_get_reply()
139 if (hdr->cmd == (SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_CTX_SAVE) || in hda_dsp_ipc_get_reply()
140 hdr->cmd == (SOF_IPC_GLB_PM_MSG | SOF_IPC_PM_GATE)) { in hda_dsp_ipc_get_reply()
149 memcpy(msg->reply_data, &reply, sizeof(reply)); in hda_dsp_ipc_get_reply()
151 msg->reply_error = 0; in hda_dsp_ipc_get_reply()
157 irqreturn_t hda_dsp_ipc4_irq_thread(int irq, void *context) in hda_dsp_ipc4_irq_thread() argument
169 /* DSP received the message */ in hda_dsp_ipc4_irq_thread()
179 /* Message from DSP (reply or notification) */ in hda_dsp_ipc4_irq_thread()
191 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in hda_dsp_ipc4_irq_thread()
192 struct sof_ipc4_msg *data = sdev->ipc->msg.reply_data; in hda_dsp_ipc4_irq_thread()
194 data->primary = primary; in hda_dsp_ipc4_irq_thread()
195 data->extension = extension; in hda_dsp_ipc4_irq_thread()
197 spin_lock_irq(&sdev->ipc_lock); in hda_dsp_ipc4_irq_thread()
201 snd_sof_ipc_reply(sdev, data->primary); in hda_dsp_ipc4_irq_thread()
203 spin_unlock_irq(&sdev->ipc_lock); in hda_dsp_ipc4_irq_thread()
205 dev_dbg_ratelimited(sdev->dev, in hda_dsp_ipc4_irq_thread()
214 sdev->ipc->msg.rx_data = &notification_data; in hda_dsp_ipc4_irq_thread()
216 sdev->ipc->msg.rx_data = NULL; in hda_dsp_ipc4_irq_thread()
218 /* Let DSP know that we have finished processing the message */ in hda_dsp_ipc4_irq_thread()
227 dev_dbg_ratelimited(sdev->dev, "nothing to do in IPC IRQ thread\n"); in hda_dsp_ipc4_irq_thread()
230 struct sof_intel_hda_dev *hdev = sdev->pdata->hw_pdata; in hda_dsp_ipc4_irq_thread()
232 if (hdev->delayed_ipc_tx_msg) in hda_dsp_ipc4_irq_thread()
233 hda_dsp_ipc4_send_msg(sdev, hdev->delayed_ipc_tx_msg); in hda_dsp_ipc4_irq_thread()
240 irqreturn_t hda_dsp_ipc_irq_thread(int irq, void *context) in hda_dsp_ipc_irq_thread() argument
258 /* is this a reply message from the DSP */ in hda_dsp_ipc_irq_thread()
272 * waking up the sender and re-enabling the interrupt. Also in hda_dsp_ipc_irq_thread()
274 * if the DSP is fast enough to receive an IPC message, reply to in hda_dsp_ipc_irq_thread()
280 if (likely(sdev->fw_state == SOF_FW_BOOT_COMPLETE)) { in hda_dsp_ipc_irq_thread()
281 spin_lock_irq(&sdev->ipc_lock); in hda_dsp_ipc_irq_thread()
283 /* handle immediate reply from DSP core */ in hda_dsp_ipc_irq_thread()
290 spin_unlock_irq(&sdev->ipc_lock); in hda_dsp_ipc_irq_thread()
292 dev_dbg_ratelimited(sdev->dev, "IPC reply before FW_READY: %#x\n", in hda_dsp_ipc_irq_thread()
299 /* is this a new message from DSP */ in hda_dsp_ipc_irq_thread()
311 /* handle messages from DSP */ in hda_dsp_ipc_irq_thread()
313 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_ipc_irq_thread()
321 * to false as the DSP might be able to boot in the next in hda_dsp_ipc_irq_thread()
324 if (sdev->fw_state == SOF_FW_BOOT_IN_PROGRESS && in hda_dsp_ipc_irq_thread()
325 hda->boot_iteration < HDA_FW_BOOT_ATTEMPTS) in hda_dsp_ipc_irq_thread()
331 /* normal message - process normally */ in hda_dsp_ipc_irq_thread()
344 dev_dbg_ratelimited(sdev->dev, in hda_dsp_ipc_irq_thread()
345 "nothing to do in IPC IRQ thread\n"); in hda_dsp_ipc_irq_thread()
351 /* Check if an IPC IRQ occurred */
354 struct sof_intel_hda_dev *hda = sdev->pdata->hw_pdata; in hda_dsp_check_ipc_irq()
358 if (sdev->dspless_mode_selected) in hda_dsp_check_ipc_irq()
375 hda->code_loading = 0; in hda_dsp_check_ipc_irq()
376 wake_up(&hda->waitq); in hda_dsp_check_ipc_irq()
398 if (!sps || !sdev->stream_box.size) { in hda_ipc_msg_data()
399 sof_mailbox_read(sdev, sdev->dsp_box.offset, p, sz); in hda_ipc_msg_data()
401 struct snd_pcm_substream *substream = sps->substream; in hda_ipc_msg_data()
402 struct hdac_stream *hstream = substream->runtime->private_data; in hda_ipc_msg_data()
411 return -ESTRPIPE; in hda_ipc_msg_data()
413 sof_mailbox_read(sdev, hda_stream->sof_intel_stream.posn_offset, p, sz); in hda_ipc_msg_data()
423 struct snd_pcm_substream *substream = sps->substream; in hda_set_stream_data_offset()
424 struct hdac_stream *hstream = substream->runtime->private_data; in hda_set_stream_data_offset()
431 if (posn_offset > sdev->stream_box.size || in hda_set_stream_data_offset()
433 return -EINVAL; in hda_set_stream_data_offset()
435 hda_stream->sof_intel_stream.posn_offset = sdev->stream_box.offset + posn_offset; in hda_set_stream_data_offset()
437 dev_dbg(sdev->dev, "pcm: stream dir %d, posn mailbox offset is %zu", in hda_set_stream_data_offset()
438 substream->stream, hda_stream->sof_intel_stream.posn_offset); in hda_set_stream_data_offset()