27 #include "utils-vixl.h"
34 const double kFP64DefaultNaN = RawbitsToDouble(UINT64_C(0x7ff8000000000000));
35 const float kFP32DefaultNaN = RawbitsToFloat(0x7fc00000);
36 const Float16 kFP16DefaultNaN = RawbitsToFloat16(0x7e00);
38 // Floating-point zero values.
39 const Float16 kFP16PositiveZero = RawbitsToFloat16(0x0);
40 const Float16 kFP16NegativeZero = RawbitsToFloat16(0x8000);
42 // Floating-point infinity values.
43 const Float16 kFP16PositiveInfinity = RawbitsToFloat16(0x7c00);
44 const Float16 kFP16NegativeInfinity = RawbitsToFloat16(0xfc00);
45 const float kFP32PositiveInfinity = RawbitsToFloat(0x7f800000);
46 const float kFP32NegativeInfinity = RawbitsToFloat(0xff800000);
47 const double kFP64PositiveInfinity =
49 const double kFP64NegativeInfinity =
60 uint32_t FloatToRawbits(float value) {  in FloatToRawbits()
81 float RawbitsToFloat(uint32_t bits) {  in RawbitsToFloat()
82   float value = 0.0;  in RawbitsToFloat()
112 uint32_t FloatSign(float val) {  in FloatSign()
118 uint32_t FloatExp(float val) {  in FloatExp()
124 uint32_t FloatMantissa(float val) {  in FloatMantissa()
156 float FloatPack(uint32_t sign, uint32_t exp, uint32_t mantissa) {  in FloatPack()
168 int Float16Classify(Float16 value) {  in Float16Classify()
170   uint16_t exponent_max = (1 << 5) - 1;  in Float16Classify()
172   uint16_t mantissa_mask = (1 << 10) - 1;  in Float16Classify()
193   int count = 0;  in CountClearHalfWords()
204 int BitCount(uint64_t value) { return CountSetBits(value); }  in BitCount()
215 SimFloat16 SimFloat16::operator-() const {  in operator -()
220 SimFloat16 SimFloat16::operator+(SimFloat16 rhs) const {  in operator +()  argument
224 SimFloat16 SimFloat16::operator-(SimFloat16 rhs) const {  in operator -()  argument
225   return static_cast<double>(*this) - static_cast<double>(rhs);  in operator -()
228 SimFloat16 SimFloat16::operator*(SimFloat16 rhs) const {  in operator *()  argument
232 SimFloat16 SimFloat16::operator/(SimFloat16 rhs) const {  in operator /()  argument
236 bool SimFloat16::operator<(SimFloat16 rhs) const {  in operator <()  argument
240 bool SimFloat16::operator>(SimFloat16 rhs) const {  in operator >()  argument
244 bool SimFloat16::operator==(SimFloat16 rhs) const {  in operator ==()  argument
248     // +0 and -0 should be treated as equal.  in operator ==()
251   return this->rawbits_ == rhs.rawbits_;  in operator ==()
254 bool SimFloat16::operator!=(SimFloat16 rhs) const { return !(*this == rhs); }  in operator !=()  argument
256 bool SimFloat16::operator==(double rhs) const {  in operator ==()  argument
260 SimFloat16::operator double() const {  in operator double()
268 float FPToFloat(Float16 value, UseDefaultNaN DN, bool* exception) {  in FPToFloat()
272       ExtractUnsignedBitfield32(kFloat16MantissaBits + kFloat16ExponentBits - 1,  in FPToFloat()
276       ExtractUnsignedBitfield32(kFloat16MantissaBits - 1, 0, bits);  in FPToFloat()
280       return (sign == 0) ? 0.0f : -0.0f;  in FPToFloat()
286       // Calculate shift required to put mantissa into the most-significant bits  in FPToFloat()
288       int shift = CountLeadingZeros(mantissa << (32 - 10));  in FPToFloat()
290       // Shift mantissa and discard implicit '1'.  in FPToFloat()
291       mantissa <<= (kFloatMantissaBits - kFloat16MantissaBits) + shift + 1;  in FPToFloat()
292       mantissa &= (1 << kFloatMantissaBits) - 1;  in FPToFloat()
295       exponent = exponent - shift + (-15 + 127);  in FPToFloat()
308       //  - The sign is propagated.  in FPToFloat()
309       //  - The payload (mantissa) is transferred entirely, except that the top  in FPToFloat()
311       //    (low-order) payload bits are set to 0.  in FPToFloat()
312       exponent = (1 << kFloatExponentBits) - 1;  in FPToFloat()
314       // Increase bits in mantissa, making low-order bits 0.  in FPToFloat()
315       mantissa <<= (kFloatMantissaBits - kFloat16MantissaBits);  in FPToFloat()
320       // Increase bits in mantissa, making low-order bits 0.  in FPToFloat()
321       mantissa <<= (kFloatMantissaBits - kFloat16MantissaBits);  in FPToFloat()
324       exponent += (-15 + 127);  in FPToFloat()
335 float FPToFloat(double value,  in FPToFloat()
353       //  - The sign is propagated.  in FPToFloat()
354       //  - The payload (mantissa) is transferred as much as possible, except  in FPToFloat()
359       uint32_t exponent = (1 << 8) - 1;  in FPToFloat()
361           static_cast<uint32_t>(ExtractUnsignedBitfield64(50, 52 - 23, raw));  in FPToFloat()
370       // unchanged. This is always the case for +/-0.0 and infinities.  in FPToFloat()
371       return static_cast<float>(value);  in FPToFloat()
376       // Convert double-to-float as the processor would, assuming that FPCR.FZ  in FPToFloat()
377       // (flush-to-zero) is not set.  in FPToFloat()
379       // Extract the IEEE-754 double components.  in FPToFloat()
381       // Extract the exponent and remove the IEEE-754 encoding bias.  in FPToFloat()
383           static_cast<int32_t>(ExtractUnsignedBitfield64(62, 52, raw)) - 1023;  in FPToFloat()
384       // Extract the mantissa and add the implicit '1' bit.  in FPToFloat()
394   return static_cast<float>(value);  in FPToFloat()
398 // conversion function (for performance reasons).
400   // We can rely on implicit float to double conversion here.  in FPToDouble()
405 double FPToDouble(float value, UseDefaultNaN DN, bool* exception) {  in FPToDouble()
416       //  - The sign is propagated.  in FPToDouble()
417       //  - The payload (mantissa) is transferred entirely, except that the top  in FPToDouble()
419       //    (low-order) payload bits are set to 0.  in FPToDouble()
423       uint64_t exponent = (1 << 11) - 1;  in FPToDouble()
425       payload <<= (52 - 23);           // The unused low-order bits should be 0.  in FPToDouble()
436       // representable using an IEEE-754 float is also representable using an  in FPToDouble()
437       // IEEE-754 double.  in FPToDouble()
447 Float16 FPToFloat16(float value,  in FPToFloat16()
457   int32_t exponent = ExtractUnsignedBitfield32(30, 23, raw) - 127;  in FPToFloat16()
470       //  - The sign is propagated.  in FPToFloat16()
471       //  - The payload (mantissa) is transferred as much as possible, except  in FPToFloat16()
475       result |= mantissa >> (kFloatMantissaBits - kFloat16MantissaBits);  in FPToFloat16()
488       // Convert float-to-half as the processor would, assuming that FPCR.FZ  in FPToFloat16()
489       // (flush-to-zero) is not set.  in FPToFloat16()
491       // Add the implicit '1' bit to the mantissa.  in FPToFloat16()
512   int64_t exponent = ExtractUnsignedBitfield64(62, 52, raw) - 1023;  in FPToFloat16()
525       //  - The sign is propagated.  in FPToFloat16()
526       //  - The payload (mantissa) is transferred as much as possible, except  in FPToFloat16()
530       result |= mantissa >> (kDoubleMantissaBits - kFloat16MantissaBits);  in FPToFloat16()
542       // Convert double-to-half as the processor would, assuming that FPCR.FZ  in FPToFloat16()
543       // (flush-to-zero) is not set.  in FPToFloat16()
545       // Add the implicit '1' bit to the mantissa.  in FPToFloat16()