1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * 4 * (C) COPYRIGHT 2021 ARM Limited. All rights reserved. 5 * 6 * This program is free software and is provided to you under the terms of the 7 * GNU General Public License version 2 as published by the Free Software 8 * Foundation, and any use by you of this program is subject to the terms 9 * of such GNU license. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can access it online at 18 * http://www.gnu.org/licenses/gpl-2.0.html. 19 * 20 */ 21 22 /* 23 * Virtual interface for CSF hardware counter backend. 24 */ 25 26 #ifndef _KBASE_HWCNT_BACKEND_CSF_IF_H_ 27 #define _KBASE_HWCNT_BACKEND_CSF_IF_H_ 28 29 #include <linux/types.h> 30 31 struct kbase_hwcnt_backend_csf_if_ctx; 32 33 struct kbase_hwcnt_backend_csf_if_ring_buf; 34 35 /** 36 * struct kbase_hwcnt_backend_csf_if_enable - enable hardware counter collection 37 * structure. 38 * @fe_bm: Front End counters selection bitmask. 39 * @shader_bm: Shader counters selection bitmask. 40 * @tiler_bm: Tiler counters selection bitmask. 41 * @mmu_l2_bm: MMU_L2 counters selection bitmask. 42 * @counter_set: The performance counter set to enable. 43 * @clk_enable_map: An array of u64 bitfields, each bit of which enables cycle 44 * counter for a given clock domain. 45 */ 46 struct kbase_hwcnt_backend_csf_if_enable { 47 u32 fe_bm; 48 u32 shader_bm; 49 u32 tiler_bm; 50 u32 mmu_l2_bm; 51 u8 counter_set; 52 u64 clk_enable_map; 53 }; 54 55 /** 56 * struct kbase_hwcnt_backend_csf_if_prfcnt_info - Performance counter 57 * information. 58 * @dump_bytes: Bytes of GPU memory required to perform a performance 59 * counter dump. 60 * @prfcnt_block_size: Bytes of each performance counter block. 61 * @l2_count: The MMU L2 cache count. 62 * @core_mask: Shader core mask. 63 * @clk_cnt: Clock domain count in the system. 64 * @clearing_samples: Indicates whether counters are cleared after each sample 65 * is taken. 66 */ 67 struct kbase_hwcnt_backend_csf_if_prfcnt_info { 68 size_t dump_bytes; 69 size_t prfcnt_block_size; 70 size_t l2_count; 71 u64 core_mask; 72 u8 clk_cnt; 73 bool clearing_samples; 74 }; 75 76 /** 77 * typedef kbase_hwcnt_backend_csf_if_assert_lock_held_fn - Assert that the 78 * backend spinlock is 79 * held. 80 * @ctx: Non-NULL pointer to a CSF context. 81 */ 82 typedef void kbase_hwcnt_backend_csf_if_assert_lock_held_fn( 83 struct kbase_hwcnt_backend_csf_if_ctx *ctx); 84 85 /** 86 * typedef kbase_hwcnt_backend_csf_if_lock_fn - Acquire backend spinlock. 87 * 88 * @ctx: Non-NULL pointer to a CSF context. 89 * @flags: Pointer to the memory location that would store the previous 90 * interrupt state. 91 */ 92 typedef void kbase_hwcnt_backend_csf_if_lock_fn( 93 struct kbase_hwcnt_backend_csf_if_ctx *ctx, 94 unsigned long *flags); 95 96 /** 97 * typedef kbase_hwcnt_backend_csf_if_unlock_fn - Release backend spinlock. 98 * 99 * @ctx: Non-NULL pointer to a CSF context. 100 * @flags: Previously stored interrupt state when Scheduler interrupt 101 * spinlock was acquired. 102 */ 103 typedef void kbase_hwcnt_backend_csf_if_unlock_fn( 104 struct kbase_hwcnt_backend_csf_if_ctx *ctx, 105 unsigned long flags); 106 107 /** 108 * typedef kbase_hwcnt_backend_csf_if_get_prfcnt_info_fn - Get performance 109 * counter information. 110 * @ctx: Non-NULL pointer to a CSF context. 111 * @prfcnt_info: Non-NULL pointer to struct where performance counter 112 * information should be stored. 113 */ 114 typedef void kbase_hwcnt_backend_csf_if_get_prfcnt_info_fn( 115 struct kbase_hwcnt_backend_csf_if_ctx *ctx, 116 struct kbase_hwcnt_backend_csf_if_prfcnt_info *prfcnt_info); 117 118 /** 119 * typedef kbase_hwcnt_backend_csf_if_ring_buf_alloc_fn - Allocate a ring buffer 120 * for CSF interface. 121 * @ctx: Non-NULL pointer to a CSF context. 122 * @buf_count: The buffer count in the ring buffer to be allocated, 123 * MUST be power of 2. 124 * @cpu_dump_base: Non-NULL pointer to where ring buffer CPU base address is 125 * stored when success. 126 * @ring_buf: Non-NULL pointer to where ring buffer is stored when success. 127 * 128 * A ring buffer is needed by the CSF interface to do manual HWC sample and 129 * automatic HWC samples, the buffer count in the ring buffer MUST be power 130 * of 2 to meet the hardware requirement. 131 * 132 * Return: 0 on success, else error code. 133 */ 134 typedef int kbase_hwcnt_backend_csf_if_ring_buf_alloc_fn( 135 struct kbase_hwcnt_backend_csf_if_ctx *ctx, u32 buf_count, 136 void **cpu_dump_base, 137 struct kbase_hwcnt_backend_csf_if_ring_buf **ring_buf); 138 139 /** 140 * typedef kbase_hwcnt_backend_csf_if_ring_buf_sync_fn - Sync HWC dump buffers 141 * memory. 142 * @ctx: Non-NULL pointer to a CSF context. 143 * @ring_buf: Non-NULL pointer to the ring buffer. 144 * @buf_index_first: The first buffer index in the ring buffer to be synced, 145 * inclusive. 146 * @buf_index_last: The last buffer index in the ring buffer to be synced, 147 * exclusive. 148 * @for_cpu: The direction of sync to be applied, set to true when CPU 149 * cache needs invalidating before reading the buffer, and set 150 * to false after CPU writes to flush these before this memory 151 * is overwritten by the GPU. 152 * 153 * Flush cached HWC dump buffer data to ensure that all writes from GPU and CPU 154 * are correctly observed. 155 */ 156 typedef void kbase_hwcnt_backend_csf_if_ring_buf_sync_fn( 157 struct kbase_hwcnt_backend_csf_if_ctx *ctx, 158 struct kbase_hwcnt_backend_csf_if_ring_buf *ring_buf, 159 u32 buf_index_first, u32 buf_index_last, bool for_cpu); 160 161 /** 162 * typedef kbase_hwcnt_backend_csf_if_ring_buf_free_fn - Free a ring buffer for 163 * the CSF interface. 164 * 165 * @ctx: Non-NULL pointer to a CSF interface context. 166 * @ring_buf: Non-NULL pointer to the ring buffer which to be freed. 167 */ 168 typedef void kbase_hwcnt_backend_csf_if_ring_buf_free_fn( 169 struct kbase_hwcnt_backend_csf_if_ctx *ctx, 170 struct kbase_hwcnt_backend_csf_if_ring_buf *ring_buf); 171 172 /** 173 * typedef kbase_hwcnt_backend_csf_if_timestamp_ns_fn - Get the current 174 * timestamp of the CSF 175 * interface. 176 * @ctx: Non-NULL pointer to a CSF interface context. 177 * 178 * Return: CSF interface timestamp in nanoseconds. 179 */ 180 typedef u64 kbase_hwcnt_backend_csf_if_timestamp_ns_fn( 181 struct kbase_hwcnt_backend_csf_if_ctx *ctx); 182 183 /** 184 * typedef kbase_hwcnt_backend_csf_if_dump_enable_fn - Setup and enable hardware 185 * counter in CSF interface. 186 * @ctx: Non-NULL pointer to a CSF interface context. 187 * @ring_buf: Non-NULL pointer to the ring buffer which used to setup the HWC. 188 * @enable: Non-NULL pointer to the enable map of HWC. 189 * 190 * Requires lock to be taken before calling. 191 */ 192 typedef void kbase_hwcnt_backend_csf_if_dump_enable_fn( 193 struct kbase_hwcnt_backend_csf_if_ctx *ctx, 194 struct kbase_hwcnt_backend_csf_if_ring_buf *ring_buf, 195 struct kbase_hwcnt_backend_csf_if_enable *enable); 196 197 /** 198 * typedef kbase_hwcnt_backend_csf_if_dump_disable_fn - Disable hardware counter 199 * in CSF interface. 200 * @ctx: Non-NULL pointer to a CSF interface context. 201 * 202 * Requires lock to be taken before calling. 203 */ 204 typedef void kbase_hwcnt_backend_csf_if_dump_disable_fn( 205 struct kbase_hwcnt_backend_csf_if_ctx *ctx); 206 207 /** 208 * typedef kbase_hwcnt_backend_csf_if_dump_request_fn - Request a HWC dump. 209 * 210 * @ctx: Non-NULL pointer to the interface context. 211 * 212 * Requires lock to be taken before calling. 213 */ 214 typedef void kbase_hwcnt_backend_csf_if_dump_request_fn( 215 struct kbase_hwcnt_backend_csf_if_ctx *ctx); 216 217 /** 218 * typedef kbase_hwcnt_backend_csf_if_get_indexes_fn - Get current extract and 219 * insert indexes of the 220 * ring buffer. 221 * 222 * @ctx: Non-NULL pointer to a CSF interface context. 223 * @extract_index: Non-NULL pointer where current extract index to be saved. 224 * @insert_index: Non-NULL pointer where current insert index to be saved. 225 * 226 * Requires lock to be taken before calling. 227 */ 228 typedef void kbase_hwcnt_backend_csf_if_get_indexes_fn( 229 struct kbase_hwcnt_backend_csf_if_ctx *ctx, u32 *extract_index, 230 u32 *insert_index); 231 232 /** 233 * typedef kbase_hwcnt_backend_csf_if_set_extract_index_fn - Update the extract 234 * index of the ring 235 * buffer. 236 * 237 * @ctx: Non-NULL pointer to a CSF interface context. 238 * @extract_index: New extract index to be set. 239 * 240 * Requires lock to be taken before calling. 241 */ 242 typedef void kbase_hwcnt_backend_csf_if_set_extract_index_fn( 243 struct kbase_hwcnt_backend_csf_if_ctx *ctx, u32 extract_index); 244 245 /** 246 * typedef kbase_hwcnt_backend_csf_if_get_gpu_cycle_count_fn - Get the current 247 * GPU cycle count. 248 * @ctx: Non-NULL pointer to a CSF interface context. 249 * @cycle_counts: Non-NULL pointer to an array where cycle counts to be saved, 250 * the array size should be at least as big as the number of 251 * clock domains returned by get_prfcnt_info interface. 252 * @clk_enable_map: An array of bitfields, each bit specifies an enabled clock 253 * domain. 254 * 255 * Requires lock to be taken before calling. 256 */ 257 typedef void kbase_hwcnt_backend_csf_if_get_gpu_cycle_count_fn( 258 struct kbase_hwcnt_backend_csf_if_ctx *ctx, u64 *cycle_counts, 259 u64 clk_enable_map); 260 261 /** 262 * struct kbase_hwcnt_backend_csf_if - Hardware counter backend CSF virtual 263 * interface. 264 * @ctx: CSF interface context. 265 * @assert_lock_held: Function ptr to assert backend spinlock is held. 266 * @lock: Function ptr to acquire backend spinlock. 267 * @unlock: Function ptr to release backend spinlock. 268 * @get_prfcnt_info: Function ptr to get performance counter related 269 * information. 270 * @ring_buf_alloc: Function ptr to allocate ring buffer for CSF HWC. 271 * @ring_buf_sync: Function ptr to sync ring buffer to CPU. 272 * @ring_buf_free: Function ptr to free ring buffer for CSF HWC. 273 * @timestamp_ns: Function ptr to get the current CSF interface 274 * timestamp. 275 * @dump_enable: Function ptr to enable dumping. 276 * @dump_enable_nolock: Function ptr to enable dumping while the 277 * backend-specific spinlock is already held. 278 * @dump_disable: Function ptr to disable dumping. 279 * @dump_request: Function ptr to request a dump. 280 * @get_indexes: Function ptr to get extract and insert indexes of the 281 * ring buffer. 282 * @set_extract_index: Function ptr to set extract index of ring buffer. 283 * @get_gpu_cycle_count: Function ptr to get the GPU cycle count. 284 */ 285 struct kbase_hwcnt_backend_csf_if { 286 struct kbase_hwcnt_backend_csf_if_ctx *ctx; 287 kbase_hwcnt_backend_csf_if_assert_lock_held_fn *assert_lock_held; 288 kbase_hwcnt_backend_csf_if_lock_fn *lock; 289 kbase_hwcnt_backend_csf_if_unlock_fn *unlock; 290 kbase_hwcnt_backend_csf_if_get_prfcnt_info_fn *get_prfcnt_info; 291 kbase_hwcnt_backend_csf_if_ring_buf_alloc_fn *ring_buf_alloc; 292 kbase_hwcnt_backend_csf_if_ring_buf_sync_fn *ring_buf_sync; 293 kbase_hwcnt_backend_csf_if_ring_buf_free_fn *ring_buf_free; 294 kbase_hwcnt_backend_csf_if_timestamp_ns_fn *timestamp_ns; 295 kbase_hwcnt_backend_csf_if_dump_enable_fn *dump_enable; 296 kbase_hwcnt_backend_csf_if_dump_disable_fn *dump_disable; 297 kbase_hwcnt_backend_csf_if_dump_request_fn *dump_request; 298 kbase_hwcnt_backend_csf_if_get_indexes_fn *get_indexes; 299 kbase_hwcnt_backend_csf_if_set_extract_index_fn *set_extract_index; 300 kbase_hwcnt_backend_csf_if_get_gpu_cycle_count_fn *get_gpu_cycle_count; 301 }; 302 303 #endif /* #define _KBASE_HWCNT_BACKEND_CSF_IF_H_ */ 304