| /third_party/mesa3d/src/gallium/drivers/freedreno/ |
| D | freedreno_batch.c | 39 alloc_ring(struct fd_batch *batch, unsigned sz, enum fd_ringbuffer_flags flags) in alloc_ring() argument
41 struct fd_context *ctx = batch->ctx; in alloc_ring()
44 * have no option but to allocate large worst-case sizes so that in alloc_ring()
51 if ((fd_device_version(ctx->screen->dev) >= FD_VERSION_UNLIMITED_CMDS) && in alloc_ring()
57 return fd_submit_new_ringbuffer(batch->submit, sz, flags); in alloc_ring()
61 batch_init(struct fd_batch *batch) in batch_init() argument
63 struct fd_context *ctx = batch->ctx; in batch_init()
65 batch->submit = fd_submit_new(ctx->pipe); in batch_init()
66 if (batch->nondraw) { in batch_init()
67 batch->gmem = alloc_ring(batch, 0x1000, FD_RINGBUFFER_PRIMARY); in batch_init()
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| D | freedreno_draw.c | 46 resource_read(struct fd_batch *batch, struct pipe_resource *prsc) assert_dt in resource_read() argument
50 fd_batch_resource_read(batch, fd_resource(prsc)); in resource_read()
54 resource_written(struct fd_batch *batch, struct pipe_resource *prsc) assert_dt in resource_written() argument
58 fd_batch_resource_write(batch, fd_resource(prsc)); in resource_written()
62 batch_draw_tracking_for_dirty_bits(struct fd_batch *batch) assert_dt in batch_draw_tracking_for_dirty_bits() argument
64 struct fd_context *ctx = batch->ctx; in batch_draw_tracking_for_dirty_bits()
65 struct pipe_framebuffer_state *pfb = &batch->framebuffer; in batch_draw_tracking_for_dirty_bits()
68 if (ctx->dirty & (FD_DIRTY_FRAMEBUFFER | FD_DIRTY_ZSA)) { in batch_draw_tracking_for_dirty_bits()
70 if (fd_resource(pfb->zsbuf->texture)->valid) { in batch_draw_tracking_for_dirty_bits()
75 if (pfb->zsbuf->texture->format == PIPE_FORMAT_Z24_UNORM_S8_UINT) in batch_draw_tracking_for_dirty_bits()
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| D | freedreno_query_hw.c | 42 get_sample(struct fd_batch *batch, struct fd_ringbuffer *ring, in get_sample() argument
45 struct fd_context *ctx = batch->ctx; in get_sample()
51 if (!batch->sample_cache[idx]) { in get_sample()
53 ctx->hw_sample_providers[idx]->get_sample(batch, ring); in get_sample()
54 fd_hw_sample_reference(ctx, &batch->sample_cache[idx], new_samp); in get_sample()
55 util_dynarray_append(&batch->samples, struct fd_hw_sample *, new_samp); in get_sample()
56 fd_batch_needs_flush(batch); in get_sample()
59 fd_hw_sample_reference(ctx, &samp, batch->sample_cache[idx]); in get_sample()
65 clear_sample_cache(struct fd_batch *batch) in clear_sample_cache() argument
69 for (i = 0; i < ARRAY_SIZE(batch->sample_cache); i++) in clear_sample_cache()
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| D | freedreno_batch_cache.c | 41 * The batch cache provides lookup for mapping pipe_framebuffer_state
42 * to a batch.
47 * Batch Cache hashtable key:
54 * Batch:
56 * Each batch needs to hold a reference to each resource it depends on (ie.
61 * When a resource is destroyed, we need to remove entries in the batch
66 * When a batch has weak reference to no more resources (ie. all the
67 * surfaces it rendered to are destroyed) the batch can be destroyed.
70 * surfaces are destroyed before the batch is submitted.
72 * If (for example), batch writes to zsbuf but that surface is destroyed
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| D | freedreno_batch.h | 48 /* A batch tracks everything about a cmdstream batch/submit, including the
50 * fd_resource-s, etc.
55 unsigned idx; /* index into cache->batches[] */
68 * screen->lock.
93 /* is this a non-draw batch (ie compute/blit which has no pfb state)? */
97 bool tessellation : 1; /* tessellation used in batch */
107 * color_logic_Op (since those functions are disabled when by-
112 /* At submit time, once we've decided that this batch will use GMEM
117 /* A calculated "draw cost" value for the batch, which tries to
118 * estimate the bandwidth-per-sample of all the draws according
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| D | freedreno_gmem.c | 52 * to restore the previous tiles contents (system mem -> GMEM), and after all
54 * contents (GMEM -> system mem).
60 * +--<---<-- IB ---<---+---<---+---<---<---<--+
63 * ------------------------------------------------------
65 * ------------------------------------------------------
70 * Where the per-tile section handles scissor setup, mem2gmem restore (if
120 printf("{ .minx=%u, .miny=%u, .width=%u, .height=%u", key->minx, key->miny, in dump_gmem_key()
121 key->width, key->height); in dump_gmem_key()
122 printf(", .gmem_page_align=%u, .nr_cbufs=%u", key->gmem_page_align, in dump_gmem_key()
123 key->nr_cbufs); in dump_gmem_key()
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| D | freedreno_context.c | 50 struct fd_batch *batch = NULL; in fd_context_flush() local
52 /* We want to lookup current batch if it exists, but not create a new in fd_context_flush()
55 fd_batch_reference(&batch, ctx->batch); in fd_context_flush()
57 DBG("%p: flush: flags=%x, fencep=%p", batch, flags, fencep); in fd_context_flush()
59 if (fencep && !batch) { in fd_context_flush()
60 batch = fd_context_batch(ctx); in fd_context_flush()
61 } else if (!batch) { in fd_context_flush()
62 if (ctx->screen->reorder) in fd_context_flush()
64 fd_bc_dump(ctx, "%p: NULL batch, remaining:\n", ctx); in fd_context_flush()
68 /* With TC_FLUSH_ASYNC, the fence will have been pre-created from in fd_context_flush()
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| /third_party/mesa3d/src/gallium/drivers/iris/ |
| D | iris_batch.c | 29 * collect into a "batch buffer". Typically, many draw calls are grouped
30 * into a single batch to amortize command submission overhead.
36 * virtual memory address before executing our batch. If a BO is not in
46 #include "drm-uapi/i915_drm.h"
70 iris_batch_reset(struct iris_batch *batch);
73 num_fences(struct iris_batch *batch) in num_fences() argument
75 return util_dynarray_num_elements(&batch->exec_fences, in num_fences()
83 dump_fence_list(struct iris_batch *batch) in dump_fence_list() argument
85 fprintf(stderr, "Fence list (length %u): ", num_fences(batch)); in dump_fence_list()
87 util_dynarray_foreach(&batch->exec_fences, in dump_fence_list()
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| D | iris_batch.h | 34 #include "drm-uapi/i915_drm.h"
47 /* Terminating the batch takes either 4 bytes for MI_BATCH_BUFFER_END or 12
54 /* Our target batch size - flush approximately at this point. */
55 #define BATCH_SZ (64 * 1024 - BATCH_RESERVED)
69 /** What batch is this? (e.g. IRIS_BATCH_RENDER/COMPUTE) */
77 /** Size of the primary batch being submitted to execbuf (in bytes). */
90 /** A list of all BOs referenced by this batch */
94 /** Bitset of whether this batch writes to BO `i'. */
98 /** Whether INTEL_BLACKHOLE_RENDER is enabled in the batch (aka first
108 * A list of iris_syncobjs associated with this batch.
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| D | iris_fine_fence.c | 6 iris_fine_fence_reset(struct iris_batch *batch) in iris_fine_fence_reset() argument
8 u_upload_alloc(batch->fine_fences.uploader, in iris_fine_fence_reset()
10 &batch->fine_fences.ref.offset, &batch->fine_fences.ref.res, in iris_fine_fence_reset()
11 (void **)&batch->fine_fences.map); in iris_fine_fence_reset()
12 WRITE_ONCE(*batch->fine_fences.map, 0); in iris_fine_fence_reset()
13 batch->fine_fences.next++; in iris_fine_fence_reset()
17 iris_fine_fence_init(struct iris_batch *batch) in iris_fine_fence_init() argument
19 batch->fine_fences.ref.res = NULL; in iris_fine_fence_init()
20 batch->fine_fences.next = 0; in iris_fine_fence_init()
21 iris_fine_fence_reset(batch); in iris_fine_fence_init()
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| D | iris_blorp.c | 31 * on the 3D engine). This provides the driver-specific hooks needed to
49 stream_state(struct iris_batch *batch, in stream_state() argument
62 iris_use_pinned_bo(batch, bo, false, IRIS_DOMAIN_NONE); in stream_state()
64 iris_record_state_size(batch->state_sizes, in stream_state()
65 bo->address + *out_offset, size); in stream_state()
68 * adding bo->address (say, by handing an address to genxml). If not, in stream_state()
84 struct iris_batch *batch = blorp_batch->driver_batch; in blorp_emit_dwords() local
85 return iris_get_command_space(batch, n * sizeof(uint32_t)); in blorp_emit_dwords()
92 struct iris_batch *batch = blorp_batch->driver_batch; in combine_and_pin_address() local
95 iris_use_pinned_bo(batch, bo, addr.reloc_flags & RELOC_WRITE, in combine_and_pin_address()
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| /third_party/mesa3d/src/gallium/drivers/crocus/ |
| D | crocus_batch.c | 29 * collect into a "batch buffer". Typically, many draw calls are grouped
30 * into a single batch to amortize command submission overhead.
36 * virtual memory address before executing our batch. If a BO is not in
45 #include "drm-uapi/i915_drm.h"
65 /* Terminating the batch takes either 4 bytes for MI_BATCH_BUFFER_END
69 #define BATCH_RESERVED(devinfo) ((devinfo)->platform == INTEL_PLATFORM_HSW ? 32 : 16)
71 static void crocus_batch_reset(struct crocus_batch *batch);
74 num_fences(struct crocus_batch *batch) in num_fences() argument
76 return util_dynarray_num_elements(&batch->exec_fences, in num_fences()
84 dump_fence_list(struct crocus_batch *batch) in dump_fence_list() argument
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| D | crocus_blorp.c | 31 * on the 3D engine). This provides the driver-specific hooks needed to
53 stream_state(struct crocus_batch *batch, in stream_state() argument
59 uint32_t offset = ALIGN(batch->state.used, alignment); in stream_state()
61 if (offset + size >= STATE_SZ && !batch->no_wrap) { in stream_state()
62 crocus_batch_flush(batch); in stream_state()
63 offset = ALIGN(batch->state.used, alignment); in stream_state()
64 } else if (offset + size >= batch->state.bo->size) { in stream_state()
66 MIN2(batch->state.bo->size + batch->state.bo->size / 2, in stream_state()
68 crocus_grow_buffer(batch, true, batch->state.used, new_size); in stream_state()
69 assert(offset + size < batch->state.bo->size); in stream_state()
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| D | crocus_batch.h | 34 #include "drm-uapi/i915_drm.h"
49 /* Our target batch size - flush approximately at this point. */
89 /** What batch is this? (e.g. CROCUS_BATCH_RENDER/COMPUTE) */
95 /** Size of the primary batch if we've moved on to a secondary. */
114 /** Whether INTEL_BLACKHOLE_RENDER is enabled in the batch (aka first
120 * A list of crocus_syncobjs associated with this batch.
122 * The first list entry will always be a signalling sync-point, indicating
123 * that this batch has completed. The others are likely to be sync-points
124 * to wait on before executing the batch.
146 /** A seqno (and syncobj) for the last batch that was submitted. */
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| D | crocus_fine_fence.c | 6 crocus_fine_fence_reset(struct crocus_batch *batch) in crocus_fine_fence_reset() argument
8 u_upload_alloc(batch->fine_fences.uploader, in crocus_fine_fence_reset()
10 &batch->fine_fences.ref.offset, &batch->fine_fences.ref.res, in crocus_fine_fence_reset()
11 (void **)&batch->fine_fences.map); in crocus_fine_fence_reset()
12 WRITE_ONCE(*batch->fine_fences.map, 0); in crocus_fine_fence_reset()
13 batch->fine_fences.next++; in crocus_fine_fence_reset()
17 crocus_fine_fence_init(struct crocus_batch *batch) in crocus_fine_fence_init() argument
19 batch->fine_fences.ref.res = NULL; in crocus_fine_fence_init()
20 batch->fine_fences.next = 0; in crocus_fine_fence_init()
21 if (batch_has_fine_fence(batch)) in crocus_fine_fence_init()
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| /third_party/mesa3d/src/gallium/drivers/panfrost/ |
| D | pan_job.c | 2 * Copyright (C) 2019-2020 Collabora, Ltd.
4 * Copyright (C) 2014-2017 Broadcom
29 #include "drm-uapi/panfrost_drm.h"
43 BITSET_FOREACH_SET(idx, ctx->batches.active, PAN_MAX_BATCHES)
46 panfrost_batch_idx(struct panfrost_batch *batch) in panfrost_batch_idx() argument
48 return batch - batch->ctx->batches.slots; in panfrost_batch_idx()
51 /* Adds the BO backing surface to a batch if the surface is non-null */
54 panfrost_batch_add_surface(struct panfrost_batch *batch, struct pipe_surface *surf) in panfrost_batch_add_surface() argument
57 struct panfrost_resource *rsrc = pan_resource(surf->texture); in panfrost_batch_add_surface()
58 panfrost_batch_write_rsrc(batch, rsrc, PIPE_SHADER_FRAGMENT); in panfrost_batch_add_surface()
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| D | pan_cmdstream.c | 186 return !cso->compare_mode ? MALI_FUNC_NEVER : in panfrost_sampler_compare_func()
187 panfrost_flip_compare_func((enum mali_func) cso->compare_func); in panfrost_sampler_compare_func()
212 so->base = *cso; in panfrost_create_sampler_state()
214 bool using_nearest = cso->min_img_filter == PIPE_TEX_MIPFILTER_NEAREST; in panfrost_create_sampler_state()
216 pan_pack(&so->hw, SAMPLER, cfg) { in panfrost_create_sampler_state()
217 cfg.magnify_nearest = cso->mag_img_filter == PIPE_TEX_FILTER_NEAREST; in panfrost_create_sampler_state()
218 cfg.minify_nearest = cso->min_img_filter == PIPE_TEX_FILTER_NEAREST; in panfrost_create_sampler_state()
220 cfg.normalized_coordinates = cso->normalized_coords; in panfrost_create_sampler_state()
221 cfg.lod_bias = FIXED_16(cso->lod_bias, true); in panfrost_create_sampler_state()
222 cfg.minimum_lod = FIXED_16(cso->min_lod, false); in panfrost_create_sampler_state()
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| /third_party/mesa3d/src/gallium/drivers/d3d12/ |
| D | d3d12_batch.cpp | 41 d3d12_init_batch(struct d3d12_context *ctx, struct d3d12_batch *batch) in d3d12_init_batch() argument
43 struct d3d12_screen *screen = d3d12_screen(ctx->base.screen); in d3d12_init_batch()
45 batch->bos = _mesa_hash_table_create(NULL, _mesa_hash_pointer, in d3d12_init_batch()
47 batch->sampler_views = _mesa_set_create(NULL, _mesa_hash_pointer, in d3d12_init_batch()
49 batch->surfaces = _mesa_set_create(NULL, _mesa_hash_pointer, in d3d12_init_batch()
51 batch->objects = _mesa_set_create(NULL, in d3d12_init_batch()
55 if (!batch->bos || !batch->sampler_views || !batch->surfaces || !batch->objects) in d3d12_init_batch()
58 util_dynarray_init(&batch->zombie_samplers, NULL); in d3d12_init_batch()
60 if (FAILED(screen->dev->CreateCommandAllocator(D3D12_COMMAND_LIST_TYPE_DIRECT, in d3d12_init_batch()
61 IID_PPV_ARGS(&batch->cmdalloc)))) in d3d12_init_batch()
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| /third_party/mesa3d/src/gallium/winsys/i915/drm/ |
| D | i915_drm_batchbuffer.c | 5 #include "drm-uapi/i915_drm.h"
30 i915_drm_batchbuffer(struct i915_winsys_batchbuffer *batch) in i915_drm_batchbuffer() argument
32 return (struct i915_drm_batchbuffer *)batch; in i915_drm_batchbuffer()
36 i915_drm_batchbuffer_reset(struct i915_drm_batchbuffer *batch) in i915_drm_batchbuffer_reset() argument
38 struct i915_drm_winsys *idws = i915_drm_winsys(batch->base.iws); in i915_drm_batchbuffer_reset()
40 if (batch->bo) in i915_drm_batchbuffer_reset()
41 drm_intel_bo_unreference(batch->bo); in i915_drm_batchbuffer_reset()
42 batch->bo = drm_intel_bo_alloc(idws->gem_manager, in i915_drm_batchbuffer_reset()
44 batch->actual_size, in i915_drm_batchbuffer_reset()
47 memset(batch->base.map, 0, batch->actual_size); in i915_drm_batchbuffer_reset()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a6xx/ |
| D | fd6_gmem.c | 60 OUT_RELOC(ring, rsc->bo, fd_resource_ubwc_offset(rsc, level, layer), 0, in fd6_emit_flag_reference()
63 fdl_ubwc_pitch(&rsc->layout, level)) | in fd6_emit_flag_reference()
65 rsc->layout.ubwc_layer_size >> 2)); in fd6_emit_flag_reference()
87 for (i = 0; i < pfb->nr_cbufs; i++) { in emit_mrt()
96 if (!pfb->cbufs[i]) in emit_mrt()
99 struct pipe_surface *psurf = pfb->cbufs[i]; in emit_mrt()
100 enum pipe_format pformat = psurf->format; in emit_mrt()
101 rsc = fd_resource(psurf->texture); in emit_mrt()
102 if (!rsc->bo) in emit_mrt()
105 uint32_t base = gmem ? gmem->cbuf_base[i] : 0; in emit_mrt()
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| /third_party/mesa3d/src/intel/blorp/ |
| D | blorp_genX_exec.h | 49 blorp_emit_dwords(struct blorp_batch *batch, unsigned n);
52 blorp_emit_reloc(struct blorp_batch *batch,
56 blorp_measure_start(struct blorp_batch *batch,
60 blorp_measure_end(struct blorp_batch *batch,
64 blorp_alloc_dynamic_state(struct blorp_batch *batch,
70 blorp_alloc_general_state(struct blorp_batch *batch,
76 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
79 blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch,
85 blorp_get_workaround_address(struct blorp_batch *batch);
88 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
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| /third_party/mesa3d/src/gallium/drivers/zink/ |
| D | zink_batch.c | 32 struct zink_screen *screen = zink_screen(ctx->base.screen); in zink_reset_batch_state()
34 VkResult result = VKSCR(ResetCommandPool)(screen->dev, bs->cmdpool, 0); in zink_reset_batch_state()
39 set_foreach_remove(bs->resources, entry) { in zink_reset_batch_state()
40 struct zink_resource_object *obj = (struct zink_resource_object *)entry->key; in zink_reset_batch_state()
42 obj->unordered_read = obj->unordered_write = false; in zink_reset_batch_state()
43 obj->access = 0; in zink_reset_batch_state()
44 obj->access_stage = 0; in zink_reset_batch_state()
46 util_dynarray_append(&bs->unref_resources, struct zink_resource_object*, obj); in zink_reset_batch_state()
50 while (util_dynarray_contains(&bs->bindless_releases[i], uint32_t)) { in zink_reset_batch_state()
51 uint32_t handle = util_dynarray_pop(&bs->bindless_releases[i], uint32_t); in zink_reset_batch_state()
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| /third_party/mesa3d/src/gallium/drivers/freedreno/a5xx/ |
| D | fd5_gmem.c | 70 enum pipe_format pformat = psurf->format; in emit_mrt()
72 rsc = fd_resource(psurf->texture); in emit_mrt()
80 assert(psurf->u.tex.first_layer == psurf->u.tex.last_layer); in emit_mrt()
82 offset = fd_resource_offset(rsc, psurf->u.tex.level, in emit_mrt()
83 psurf->u.tex.first_layer); in emit_mrt()
86 stride = gmem->bin_w * gmem->cbuf_cpp[i]; in emit_mrt()
87 size = stride * gmem->bin_h; in emit_mrt()
88 base = gmem->cbuf_base[i]; in emit_mrt()
90 stride = fd_resource_pitch(rsc, psurf->u.tex.level); in emit_mrt()
91 size = fd_resource_layer_stride(rsc, psurf->u.tex.level); in emit_mrt()
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | genX_blorp_exec.c | 42 struct anv_cmd_buffer *cmd_buffer = _batch->driver_batch; in blorp_measure_start()
43 trace_intel_begin_blorp(&cmd_buffer->trace); in blorp_measure_start()
45 params->snapshot_type, in blorp_measure_start()
52 struct anv_cmd_buffer *cmd_buffer = _batch->driver_batch; in blorp_measure_end()
53 trace_intel_end_blorp(&cmd_buffer->trace, in blorp_measure_end()
54 params->x1 - params->x0, in blorp_measure_end()
55 params->y1 - params->y0, in blorp_measure_end()
56 params->hiz_op, in blorp_measure_end()
57 params->fast_clear_op, in blorp_measure_end()
58 params->shader_type, in blorp_measure_end()
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| /third_party/mesa3d/src/panfrost/vulkan/ |
| D | panvk_vX_cmd_buffer.c | 47 device->physical_device->instance->debug_flags; in panvk_debug_adjust_bo_flags()
58 const struct pan_fb_info *fbinfo = &cmdbuf->state.fb.info; in panvk_cmd_prepare_fragment_job()
59 struct panvk_batch *batch = cmdbuf->state.batch; in panvk_cmd_prepare_fragment_job() local
61 pan_pool_alloc_desc(&cmdbuf->desc_pool.base, FRAGMENT_JOB); in panvk_cmd_prepare_fragment_job()
63 GENX(pan_emit_fragment_job)(fbinfo, batch->fb.desc.gpu, job_ptr.cpu), in panvk_cmd_prepare_fragment_job()
64 batch->fragment_job = job_ptr.gpu; in panvk_cmd_prepare_fragment_job()
65 util_dynarray_append(&batch->jobs, void *, job_ptr.cpu); in panvk_cmd_prepare_fragment_job()
71 struct panvk_batch *batch = cmdbuf->state.batch; in panvk_per_arch() local
73 if (!batch) in panvk_per_arch()
76 const struct pan_fb_info *fbinfo = &cmdbuf->state.fb.info; in panvk_per_arch()
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