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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Dpalmbus.yaml19 pattern: "^palmbus(@[0-9a-f]+)?$"
37 "@[0-9a-f]+$":
62 reg = <0x1e000000 0x100000>;
65 ranges = <0x0 0x1e000000 0x0fffff>;
72 gpio-ranges = <&pinctrl 0 0 95>;
74 reg = <0x600 0x100>;
/kernel/linux/linux-5.10/arch/mips/include/asm/mach-ralink/
Dmt7621.h10 #define MT7621_PALMBUS_BASE 0x1C000000
11 #define MT7621_PALMBUS_SIZE 0x03FFFFFF
13 #define MT7621_SYSC_BASE 0x1E000000
15 #define SYSC_REG_CHIP_NAME0 0x00
16 #define SYSC_REG_CHIP_NAME1 0x04
17 #define SYSC_REG_CHIP_REV 0x0c
18 #define SYSC_REG_SYSTEM_CONFIG0 0x10
19 #define SYSC_REG_SYSTEM_CONFIG1 0x14
21 #define CHIP_REV_PKG_MASK 0x1
23 #define CHIP_REV_VER_MASK 0xf
[all …]
/kernel/linux/linux-6.6/arch/mips/include/asm/mach-ralink/
Dmt7621.h12 #define MT7621_PALMBUS_BASE 0x1C000000
13 #define MT7621_PALMBUS_SIZE 0x03FFFFFF
15 #define MT7621_SYSC_BASE IOMEM(0x1E000000)
17 #define SYSC_REG_CHIP_NAME0 0x00
18 #define SYSC_REG_CHIP_NAME1 0x04
19 #define SYSC_REG_CHIP_REV 0x0c
20 #define SYSC_REG_SYSTEM_CONFIG0 0x10
21 #define SYSC_REG_SYSTEM_CONFIG1 0x14
23 #define CHIP_REV_PKG_MASK 0x1
25 #define CHIP_REV_VER_MASK 0xf
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/partitions/
Dbrcm,bcm963xx-imagetag.txt18 reg = <0x1e000000 0x2000000>;
26 cfe@0 {
27 reg = <0x0 0x10000>;
32 reg = <0x10000 0x7d0000>;
37 reg = <0x7e0000 0x10000>;
42 reg = <0x7f0000 0x10000>;
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/partitions/
Dbrcm,bcm963xx-imagetag.txt18 reg = <0x1e000000 0x2000000>;
26 cfe@0 {
27 reg = <0x0 0x10000>;
32 reg = <0x10000 0x7d0000>;
37 reg = <0x7e0000 0x10000>;
42 reg = <0x7f0000 0x10000>;
/kernel/linux/linux-5.10/drivers/staging/mt7621-dts/
Dmt7621.dtsi10 cpu@0 {
19 cpuintc: cpuintc@0 {
20 #address-cells = <0>;
30 cpuclock: cpuclock@0 {
31 #clock-cells = <0>;
38 sysclock: sysclock@0 {
39 #clock-cells = <0>;
46 mmc_clock: mmc_clock@0 {
47 #clock-cells = <0>;
52 mmc_fixed_3v3: fixedregulator@0 {
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-shmobile/
Dsmp-emev2.c20 #define EMEV2_SCU_BASE 0x1e000000
21 #define EMEV2_SMU_BASE 0xe0110000
22 #define SMU_GENERAL_REG0 0x7c0
27 return 0; in emev2_boot_secondary()
/kernel/linux/linux-6.6/arch/arm/mach-shmobile/
Dsmp-emev2.c20 #define EMEV2_SCU_BASE 0x1e000000
21 #define EMEV2_SMU_BASE 0xe0110000
22 #define SMU_GENERAL_REG0 0x7c0
27 return 0; in emev2_boot_secondary()
/kernel/linux/linux-6.6/drivers/gpu/drm/i915/gt/
Dgen9_renderstate.c11 0x000007a8,
12 0x000007b4,
13 0x000007bc,
14 0x000007cc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
Dgen8_renderstate.c11 0x00000798,
12 0x000007a4,
13 0x000007ac,
14 0x000007bc,
19 0x7a000004,
20 0x01000000,
21 0x00000000,
22 0x00000000,
23 0x00000000,
24 0x00000000,
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/
Dgen9_renderstate.c29 0x000007a8,
30 0x000007b4,
31 0x000007bc,
32 0x000007cc,
37 0x7a000004,
38 0x01000000,
39 0x00000000,
40 0x00000000,
41 0x00000000,
42 0x00000000,
[all …]
Dgen8_renderstate.c29 0x00000798,
30 0x000007a4,
31 0x000007ac,
32 0x000007bc,
37 0x7a000004,
38 0x01000000,
39 0x00000000,
40 0x00000000,
41 0x00000000,
42 0x00000000,
[all …]
/kernel/linux/linux-5.10/arch/mips/txx9/rbtx4938/
Dsetup.c54 writeb(0, rbtx4938_pcireset_addr); in rbtx4938_pci_setup()
70 txx9_pci66_check(c, 0, 0)) { in rbtx4938_pci_setup()
72 writeb(0, rbtx4938_pcireset_addr); in rbtx4938_pci_setup()
90 /* PCI1DMD==0 => PCI1CLK==GBUSCLK/2 => PCI66 */ in rbtx4938_pci_setup()
100 c = txx9_alloc_pci_controller(NULL, 0, 0x10000, 0, 0x10000); in rbtx4938_pci_setup()
102 tx4927_pcic_setup(tx4938_pcic1ptr, c, 0); in rbtx4938_pci_setup()
112 #define SEEPROM2_CS 0 /* IOC */
115 #define SPI_BUSNO 0
124 /* 0-3: "MAC\0", 4-9:eth0, 10-15:eth1, 16:sum */ in rbtx4938_ethaddr_init()
125 if (spi_eeprom_read(SPI_BUSNO, SEEPROM1_CS, 0, dat, sizeof(dat))) { in rbtx4938_ethaddr_init()
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/mti/
Dmalta.dts7 /memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
8 /memreserve/ 0x00001000 0x000ef000; /* YAMON */
9 /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
25 reg = <0x1bdc0000 0x20000>;
56 reg = <0x1e000000 0x400000>;
66 yamon@0 {
68 reg = <0x0 0x100000>;
74 reg = <0x100000 0x2e0000>;
79 reg = <0x3e0000 0x20000>;
87 reg = <0x1f000000 0x1000>;
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/mti/
Dmalta.dts7 /memreserve/ 0x00000000 0x00001000; /* YAMON exception vectors */
8 /memreserve/ 0x00001000 0x000ef000; /* YAMON */
9 /memreserve/ 0x000f0000 0x00010000; /* PIIX4 ISA memory */
25 reg = <0x1bdc0000 0x20000>;
56 reg = <0x1e000000 0x400000>;
66 yamon@0 {
68 reg = <0x0 0x100000>;
74 reg = <0x100000 0x2e0000>;
79 reg = <0x3e0000 0x20000>;
87 reg = <0x1f000000 0x1000>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm53016-dlink-dwl-8610ap.dts13 memory@0 {
16 reg = <0x00000000 0x08000000>,
17 <0x88000000 0x08000000>;
26 gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
66 * Flash memory at 0x1e000000-0x1fffffff
72 reg = <0x1e080000 0x00020000>;
112 trx@0 {
114 reg = <0x00000000 0x02800000>;
121 reg = <0x02800000 0x02800000>;
128 reg = <0x05000000 0x03000000>;
Dbcm47094-dlink-dir-890l.dts31 memory@0 {
33 reg = <0x00000000 0x08000000>,
34 <0x88000000 0x08000000>;
46 gpios = <&chipcommon 0 GPIO_ACTIVE_LOW>;
108 * The flash memory is memory mapped at 0x1e000000-0x1fffffff
114 reg = <0x1e1f0000 0x00010000>;
151 firmware@0 {
154 reg = <0x00000000 0x08000000>;
175 port@0 {
/kernel/linux/linux-6.6/arch/mips/boot/dts/ralink/
Dmt7621.dtsi14 #size-cells = <0>;
16 cpu@0 {
19 reg = <0>;
30 #address-cells = <0>;
56 reg = <0x1e000000 0x100000>;
57 ranges = <0x0 0x1e000000 0x0fffff>;
62 sysc: syscon@0 {
64 reg = <0x0 0x100>;
75 reg = <0x100 0x100>;
84 gpio-ranges = <&pinctrl 0 0 95>;
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/ath/ath5k/
Ddesc.h25 * @rx_control_0: RX control word 0
34 #define AR5K_DESC_RX_CTL1_BUF_LEN 0x00000fff /* data buffer length */
35 #define AR5K_DESC_RX_CTL1_INTREQ 0x00002000 /* RX interrupt request */
39 * @rx_status_0: RX status word 0
50 /* RX status word 0 fields/flags */
51 #define AR5K_5210_RX_DESC_STATUS0_DATA_LEN 0x00000fff /* RX data length */
52 #define AR5K_5210_RX_DESC_STATUS0_MORE 0x00001000 /* more desc for this frame */
53 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANT_5210 0x00004000 /* [5210] receive on ant 1 */
54 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE 0x00078000 /* reception rate */
56 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL 0x07f80000 /* rssi */
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ath/ath5k/
Ddesc.h25 * @rx_control_0: RX control word 0
34 #define AR5K_DESC_RX_CTL1_BUF_LEN 0x00000fff /* data buffer length */
35 #define AR5K_DESC_RX_CTL1_INTREQ 0x00002000 /* RX interrupt request */
39 * @rx_status_0: RX status word 0
50 /* RX status word 0 fields/flags */
51 #define AR5K_5210_RX_DESC_STATUS0_DATA_LEN 0x00000fff /* RX data length */
52 #define AR5K_5210_RX_DESC_STATUS0_MORE 0x00001000 /* more desc for this frame */
53 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_ANT_5210 0x00004000 /* [5210] receive on ant 1 */
54 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_RATE 0x00078000 /* reception rate */
56 #define AR5K_5210_RX_DESC_STATUS0_RECEIVE_SIGNAL 0x07f80000 /* rssi */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/
Darm,pl172.txt11 first address cell and it may accept values 0..N-1
88 Example for pl172 with nor flash on chip select 0 shown below.
92 reg = <0x40005000 0x1000>;
97 ranges = <0 0 0x1c000000 0x1000000
98 1 0 0x1d000000 0x1000000
99 2 0 0x1e000000 0x1000000
100 3 0 0x1f000000 0x1000000>;
107 mpmc,cs = <0>;
110 mpmc,write-enable-delay = <0>;
111 mpmc,output-enable-delay = <0>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/
Darm,pl172.txt11 first address cell and it may accept values 0..N-1
88 Example for pl172 with nor flash on chip select 0 shown below.
92 reg = <0x40005000 0x1000>;
97 ranges = <0 0 0x1c000000 0x1000000
98 1 0 0x1d000000 0x1000000
99 2 0 0x1e000000 0x1000000
100 3 0 0x1f000000 0x1000000>;
107 mpmc,cs = <0>;
110 mpmc,write-enable-delay = <0>;
111 mpmc,output-enable-delay = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Darm-realview-pba8.dts29 arm,hbi = <0x178>;
33 #size-cells = <0>;
36 cpu0: cpu@0 {
39 reg = <0>;
43 pmu: pmu@0 {
46 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
56 reg = <0x1e001000 0x1000>,
57 <0x1e000000 0x100>;
63 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
68 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/arm/
Darm-realview-pba8.dts29 arm,hbi = <0x178>;
33 #size-cells = <0>;
36 cpu0: cpu@0 {
39 reg = <0>;
43 pmu: pmu@0 {
46 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
56 reg = <0x1e001000 0x1000>,
57 <0x1e000000 0x100>;
63 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
68 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/brcm/
Dbcm6358.dtsi13 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
33 #clock-cells = <0>;
47 #address-cells = <0>;
63 reg = <0xfffe0004 0x4>;
69 reg = <0xfffe0008 0x4>;
74 offset = <0x0>;
75 mask = <0x1>;
81 reg = <0xfffe000c 0x8>,
[all …]

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