| /kernel/linux/linux-5.10/arch/mips/jazz/ |
| D | irq.c | 62 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); in init_r4030_ints()
69 * driver compatibility reasons interrupts 0 - 15 to be the i8259
79 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ in arch_init_irq()
80 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); in arch_init_irq()
81 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ in arch_init_irq()
82 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M); in arch_init_irq()
83 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ in arch_init_irq()
84 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M); in arch_init_irq()
106 if (likely(irq > 0)) in plat_irq_dispatch()
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| D | setup.c | 33 .start = 0x00,
34 .end = 0x1f,
38 .start = 0x40,
39 .end = 0x5f,
43 .start = 0x80,
44 .end = 0x8f,
48 .start = 0xc0,
49 .end = 0xdf,
59 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ in plat_mem_setup()
60 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); in plat_mem_setup()
[all …]
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| /kernel/linux/linux-6.6/arch/mips/jazz/ |
| D | irq.c | 62 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0); in init_r4030_ints()
69 * driver compatibility reasons interrupts 0 - 15 to be the i8259
79 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ in arch_init_irq()
80 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); in arch_init_irq()
81 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */ in arch_init_irq()
82 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M); in arch_init_irq()
83 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */ in arch_init_irq()
84 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M); in arch_init_irq()
106 if (likely(irq > 0)) in plat_irq_dispatch()
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| D | setup.c | 33 .start = 0x00,
34 .end = 0x1f,
38 .start = 0x40,
39 .end = 0x5f,
43 .start = 0x80,
44 .end = 0x8f,
48 .start = 0xc0,
49 .end = 0xdf,
59 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */ in plat_mem_setup()
60 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K); in plat_mem_setup()
[all …]
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | g364fb.c | 34 #define G364_MEM_BASE 0xe4400000
35 #define G364_PORT_BASE 0xe4000000
36 #define ID_REG 0xe4000000 /* Read only */
37 #define BOOT_REG 0xe4080000
38 #define TIMING_REG 0xe4080108 /* to 0x080170 - DON'T TOUCH! */
39 #define DISPLAY_REG 0xe4080118
40 #define VDISPLAY_REG 0xe4080150
41 #define MASK_REG 0xe4080200
42 #define CTLA_REG 0xe4080300
43 #define CURS_TOGGLE 0x800000
[all …]
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| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| D | g364fb.c | 34 #define G364_MEM_BASE 0xe4400000
35 #define G364_PORT_BASE 0xe4000000
36 #define ID_REG 0xe4000000 /* Read only */
37 #define BOOT_REG 0xe4080000
38 #define TIMING_REG 0xe4080108 /* to 0x080170 - DON'T TOUCH! */
39 #define DISPLAY_REG 0xe4080118
40 #define VDISPLAY_REG 0xe4080150
41 #define MASK_REG 0xe4080200
42 #define CTLA_REG 0xe4080300
43 #define CURS_TOGGLE 0x800000
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/memory-controllers/ |
| D | pl353-smc.txt | 28 reg = <0xe000e000 0x1000>;
31 ranges = <0x0 0x0 0xe1000000 0x1000000 //Nand CS Region
32 0x1 0x0 0xe2000000 0x2000000 //SRAM/NOR CS Region
33 0x2 0x0 0xe4000000 0x2000000>; //SRAM/NOR CS Region
36 reg = <0 0 0x1000000>;
41 reg = <1 0 0x2000000>;
45 reg = <2 0 0x2000000>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mtd/ |
| D | arm,pl353-nand-r2p1.yaml | 37 reg = <0xe000e000 0x0001000>;
40 ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
41 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
42 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
46 nfc0: nand-controller@0,0 {
48 reg = <0 0 0x1000000>;
50 #size-cells = <0>;
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/memory-controllers/ |
| D | arm,pl35x-smc.yaml | 33 pattern: "^memory-controller@[0-9a-f]+$"
69 - description: Combined or Memory interface 0 IRQ
73 "@[0-7],[a-f0-9]+$":
91 minimum: 0
141 reg = <0xe000e000 0x0001000>;
144 ranges = <0x0 0x0 0xe1000000 0x1000000 /* Nand CS region */
145 0x1 0x0 0xe2000000 0x2000000 /* SRAM/NOR CS0 region */
146 0x2 0x0 0xe4000000 0x2000000>; /* SRAM/NOR CS1 region */
150 nfc0: nand-controller@0,0 {
152 reg = <0 0 0x1000000>;
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/ |
| D | sbc8641d.dts | 20 reg = <0x00000000 0x20000000>; // 512M at 0x0
24 reg = <0xf8005000 0x1000>;
26 ranges = <0 0 0xff000000 0x01000000 // 16MB Boot flash
27 1 0 0xf0000000 0x00010000 // 64KB EEPROM
28 2 0 0xf1000000 0x00100000 // EPLD (1MB)
29 3 0 0xe0000000 0x04000000 // 64MB LB SDRAM (CS3)
30 4 0 0xe4000000 0x04000000 // 64MB LB SDRAM (CS4)
31 6 0 0xf4000000 0x00100000 // LCD display (1MB)
32 7 0 0xe8000000 0x04000000>; // 64MB OneNAND
34 flash@0,0 {
[all …]
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| /kernel/linux/linux-5.10/tools/testing/selftests/powerpc/include/ |
| D | instructions.h | 10 (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10))
16 asm volatile(str(COPY(0, %0, 0))";" in copy()
25 asm volatile(str(COPY(0, %0, 1))";" in copy_first()
34 (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
42 asm volatile(str(PASTE(0, %1, 0, 0))";" in paste()
43 "mfcr %0;" in paste()
55 asm volatile(str(PASTE(0, %1, 1, 1))";" in paste_last()
56 "mfcr %0;" in paste_last()
64 #define PPC_INST_COPY __COPY(0, 0, 0)
65 #define PPC_INST_COPY_FIRST __COPY(0, 0, 1)
[all …]
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| /kernel/linux/linux-6.6/tools/testing/selftests/powerpc/include/ |
| D | instructions.h | 10 (0x7c00060c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10))
16 asm volatile(str(COPY(0, %0, 0))";" in copy()
25 asm volatile(str(COPY(0, %0, 1))";" in copy_first()
34 (0x7c00070c | (RA) << (31-15) | (RB) << (31-20) | (L) << (31-10) | (RC) << (31-31))
42 asm volatile(str(PASTE(0, %1, 0, 0))";" in paste()
43 "mfcr %0;" in paste()
55 asm volatile(str(PASTE(0, %1, 1, 1))";" in paste_last()
56 "mfcr %0;" in paste_last()
64 #define PPC_INST_COPY __COPY(0, 0, 0)
65 #define PPC_INST_COPY_FIRST __COPY(0, 0, 1)
[all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | spear13xx.dtsi | 15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
36 reg = < 0xec801000 0x1000 >,
37 < 0xec800100 0x0100 >;
42 interrupts = <0 6 0x04
43 0 7 0x04>;
48 reg = <0xed000000 0x1000>;
56 reg = <0 0x40000000>;
79 ranges = <0x50000000 0x50000000 0x10000000
[all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/st/ |
| D | spear13xx.dtsi | 15 #size-cells = <0>;
17 cpu@0 {
20 reg = <0>;
36 reg = < 0xec801000 0x1000 >,
37 < 0xec800100 0x0100 >;
42 interrupts = <0 6 0x04>,
43 <0 7 0x04>;
48 reg = <0xed000000 0x1000>;
56 reg = <0 0x40000000>;
79 ranges = <0x50000000 0x50000000 0x10000000
[all …]
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| /kernel/linux/linux-5.10/drivers/usb/misc/sisusbvga/ |
| D | sisusb.h | 45 #define SISUSB_VERSION 0
46 #define SISUSB_REVISION 0
60 #define SISUSB_IBUF_SIZE 0x01000
61 #define SISUSB_OBUF_SIZE 0x10000 /* fixed */
87 } while(0)
108 int isopen; /* !=0 if open */
109 int present; /* !=0 if device is present on the bus */
110 int ready; /* !=0 if device is ready for userland */
161 #define SISUSB_EP_GFX_IN 0x0e /* gfx std packet out(0e)/in(8e) */
162 #define SISUSB_EP_GFX_OUT 0x0e
[all …]
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| /kernel/linux/linux-6.6/drivers/usb/misc/sisusbvga/ |
| D | sisusb.h | 45 #define SISUSB_VERSION 0
46 #define SISUSB_REVISION 0
59 #define SISUSB_IBUF_SIZE 0x01000
60 #define SISUSB_OBUF_SIZE 0x10000 /* fixed */
86 } while(0)
107 int isopen; /* !=0 if open */
108 int present; /* !=0 if device is present on the bus */
109 int ready; /* !=0 if device is ready for userland */
140 #define SISUSB_EP_GFX_IN 0x0e /* gfx std packet out(0e)/in(8e) */
141 #define SISUSB_EP_GFX_OUT 0x0e
[all …]
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| /kernel/linux/linux-5.10/drivers/mtd/nand/raw/ |
| D | Kconfig | 11 The original Linux implementation had byte 0 and 1 swapped.
513 default "0"
516 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
522 0xE4000000.)
532 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
533 This option changes to make it probe between 0xFFFC8000 and
534 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be
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| /kernel/linux/linux-6.6/drivers/mtd/nand/raw/ |
| D | Kconfig | 499 default "0"
502 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
508 0xE4000000.)
518 DiskOnChip at every multiple of 0x2000 between 0xC8000 and 0xEE000.
519 This option changes to make it probe between 0xFFFC8000 and
520 0xFFFEE000. Unless you are using LinuxBIOS, this is unlikely to be
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/xilinx/ |
| D | zynq-7000.dtsi | 13 #size-cells = <0>;
15 cpu0: cpu@0 {
18 reg = <0>;
47 interrupts = <0 5 4>, <0 6 4>;
49 reg = <0xf8891000 0x1000>,
50 <0xf8893000 0x1000>;
69 #size-cells = <0>;
72 port@0 {
73 reg = <0>;
104 reg = <0xf8007100 0x20>;
[all …]
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| /kernel/linux/linux-5.10/arch/arm/mach-cns3xxx/ |
| D | cns3xxx.h | 12 #define CNS3XXX_FLASH_BASE 0x10000000 /* Flash/SRAM Memory Bank 0 */
15 #define CNS3XXX_DDR2SDRAM_BASE 0x20000000 /* DDR2 SDRAM Memory */
17 #define CNS3XXX_SPI_FLASH_BASE 0x60000000 /* SPI Serial Flash Memory */
19 #define CNS3XXX_SWITCH_BASE 0x70000000 /* Switch and HNAT Control */
21 #define CNS3XXX_PPE_BASE 0x70001000 /* HANT */
23 #define CNS3XXX_EMBEDDED_SRAM_BASE 0x70002000 /* HANT Embedded SRAM */
25 #define CNS3XXX_SSP_BASE 0x71000000 /* Synchronous Serial Port - SPI/PCM/I2C */
27 #define CNS3XXX_DMC_BASE 0x72000000 /* DMC Control (DDR2 SDRAM) */
29 #define CNS3XXX_SMC_BASE 0x73000000 /* SMC Control */
31 #define SMC_MEMC_STATUS_OFFSET 0x000
[all …]
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| /kernel/linux/linux-5.10/crypto/ |
| D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
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| /kernel/linux/linux-6.6/crypto/ |
| D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6,
68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591,
69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56,
70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec,
71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa,
72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb,
73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45,
74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b,
75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c,
76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83,
[all …]
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| /kernel/linux/linux-5.10/arch/powerpc/include/asm/ |
| D | ppc-opcode.h | 13 #define __REG_R0 0
46 #define __REGA0_0 0
79 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
80 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
85 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
89 (((uintptr_t)(i) & 0x8000) >> 15))
211 #define PPC_INST_BCCTR_FLUSH 0x4c400420
212 #define PPC_INST_COPY 0x7c20060c
213 #define PPC_INST_DCBA 0x7c0005ec
214 #define PPC_INST_DCBA_MASK 0xfc0007fe
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/kernel/ |
| D | module_64.c | 36 unsigned long abi_level = hdr->e_flags & 0x3; in module_elf_check_arch()
76 return 0; in local_entry_offset()
99 #define STUB_MAGIC 0x73747562 /* stub */
103 jump, actually, to reset r2 (TOC+0x8000). */
143 PPC_RAW_ADDIS(_R11, _R2, 0),
144 PPC_RAW_ADDI(_R11, _R11, 0),
167 _count_relocs = 0; in count_relocs()
168 r_info = 0; in count_relocs()
169 r_addend = 0; in count_relocs()
170 for (i = 0; i < num; i++) in count_relocs()
[all …]
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| /kernel/linux/linux-6.6/arch/powerpc/include/asm/ |
| D | ppc-opcode.h | 13 #define __REG_R0 0
46 #define __REGA0_0 0
80 #define _R0 0
113 #define IMM_L(i) ((uintptr_t)(i) & 0xffff)
114 #define IMM_DS(i) ((uintptr_t)(i) & 0xfffc)
115 #define IMM_DQ(i) ((uintptr_t)(i) & 0xfff0)
116 #define IMM_D0(i) (((uintptr_t)(i) >> 16) & 0x3ffff)
122 * top half to negate the effect (i.e. 0xffff + 1 = 0x(1)0000).
128 (((uintptr_t)(i) & 0x8000) >> 15))
133 #define IMM_H18(i) (((uintptr_t)(i)>>16) & 0x3ffff)
[all …]
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