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Searched +full:12 +full:bit +full:- +full:clkdiv +full:- +full:mode (Results 1 – 25 of 43) sorted by relevance

12

/kernel/linux/linux-5.10/drivers/media/rc/
Dtango-ir.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 #include <media/rc-core.h>
15 #define DRIVER_NAME "tango-ir"
40 #define DISABLE_NEC (BIT(4) | BIT(8))
41 #define ENABLE_RC5 (BIT(0) | BIT(9))
42 #define ENABLE_RC6 (BIT(0) | BIT(7))
43 #define ACK_IR_INT (BIT(0) | BIT(1))
44 #define ACK_RC6_INT (BIT(31))
60 v = readl_relaxed(ir->rc5_base + IR_NEC_DATA); in tango_ir_handle_nec()
62 rc_repeat(ir->rc); in tango_ir_handle_nec()
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/kernel/linux/linux-6.6/drivers/hwtracing/intel_th/
Dpti.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2016 Intel Corporation.
25 unsigned int mode; member
27 unsigned int clkdiv; member
33 /* map PTI widths to MODE settings of PTI_CTL register */
35 0, 4, 8, 0, 12, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,
46 return -EINVAL; in pti_width_mode()
54 return scnprintf(buf, PAGE_SIZE, "%d\n", pti_mode[pti->mode]); in mode_show()
72 pti->mode = ret; in mode_store()
77 static DEVICE_ATTR_RW(mode);
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/kernel/linux/linux-5.10/drivers/hwtracing/intel_th/
Dpti.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2016 Intel Corporation.
25 unsigned int mode; member
27 unsigned int clkdiv; member
33 /* map PTI widths to MODE settings of PTI_CTL register */
35 0, 4, 8, 0, 12, 0, 0, 0, 16, 0, 0, 0, 0, 0, 0, 0,
46 return -EINVAL; in pti_width_mode()
54 return scnprintf(buf, PAGE_SIZE, "%d\n", pti_mode[pti->mode]); in mode_show()
72 pti->mode = ret; in mode_store()
77 static DEVICE_ATTR_RW(mode);
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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/frequency/
Dadf4350.txt4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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/kernel/linux/linux-5.10/drivers/cpufreq/
Ds3c2410-cpufreq.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2006-2008 Simtec Electronics
19 #include <linux/soc/samsung/s3c-cpufreq-core.h>
20 #include <linux/soc/samsung/s3c-pm.h>
28 /* Note, 2410A has an extra mode for 1:4:4 ratio, bit 2 of CLKDIV */
32 u32 clkdiv = 0; in s3c2410_cpufreq_setdivs() local
34 if (cfg->divs.h_divisor == 2) in s3c2410_cpufreq_setdivs()
35 clkdiv |= S3C2410_CLKDIVN_HDIVN; in s3c2410_cpufreq_setdivs()
37 if (cfg->divs.p_divisor != cfg->divs.h_divisor) in s3c2410_cpufreq_setdivs()
38 clkdiv |= S3C2410_CLKDIVN_PDIVN; in s3c2410_cpufreq_setdivs()
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/kernel/linux/linux-6.6/drivers/pwm/
Dpwm-tiehrpwm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2012 Texas Instruments, Inc. - https://www.ti.com/
23 #define TBCTL_PRDLD_MASK BIT(3)
25 #define TBCTL_PRDLD_IMDT BIT(3)
26 #define TBCTL_CLKDIV_MASK (BIT(12) | BIT(11) | BIT(10) | BIT(9) | \
27 BIT(8) | BIT(7))
28 #define TBCTL_CTRMODE_MASK (BIT(1) | BIT(0))
30 #define TBCTL_CTRMODE_DOWN BIT(0)
31 #define TBCTL_CTRMODE_UPDOWN BIT(1)
32 #define TBCTL_CTRMODE_FREEZE (BIT(1) | BIT(0))
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/kernel/linux/linux-5.10/drivers/pwm/
Dpwm-tiehrpwm.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2012 Texas Instruments, Inc. - https://www.ti.com/
23 #define TBCTL_PRDLD_MASK BIT(3)
25 #define TBCTL_PRDLD_IMDT BIT(3)
26 #define TBCTL_CLKDIV_MASK (BIT(12) | BIT(11) | BIT(10) | BIT(9) | \
27 BIT(8) | BIT(7))
28 #define TBCTL_CTRMODE_MASK (BIT(1) | BIT(0))
30 #define TBCTL_CTRMODE_DOWN BIT(0)
31 #define TBCTL_CTRMODE_UPDOWN BIT(1)
32 #define TBCTL_CTRMODE_FREEZE (BIT(1) | BIT(0))
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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/frequency/
Dadi,adf4350.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
35 adi,channel-spacing:
40 adi,power-up-frequency:
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/kernel/linux/linux-5.10/drivers/gpu/drm/gma500/
Dtc35876x-dsi-lvds.c35 #include "tc35876x-dsi-lvds.h"
45 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
48 /* DSI D-PHY Layer Registers */
219 FLD_VAL(lvmx01, 12, 8) | FLD_VAL(lvmx00, 4, 0))
222 * tc35876x_regw - Write DSI-LVDS bridge register using I2C
233 /* NOTE: Register address big-endian, data little-endian. */ in tc35876x_regw()
243 .addr = client->addr, in tc35876x_regw()
250 r = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); in tc35876x_regw()
252 dev_err(&client->dev, "%s: reg 0x%04x val 0x%08x error %d\n", in tc35876x_regw()
258 dev_err(&client->dev, "%s: reg 0x%04x val 0x%08x msgs %d\n", in tc35876x_regw()
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/kernel/linux/linux-6.6/drivers/mmc/host/
Dsunplus-mmc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Author: Li-hao Kuo <lhjeff911@gmail.com>
11 #include <linux/dma-mapping.h>
18 #include <linux/mmc/slot-gpio.h>
44 #define SPMMC_HW_DMA_RST BIT(9)
45 #define SPMMC_DMAIDLE BIT(10)
65 #define SPMMC_SDINT_SDCMPEN BIT(0)
66 #define SPMMC_SDINT_SDCMP BIT(1)
67 #define SPMMC_SDINT_SDCMPCLR BIT(2)
68 #define SPMMC_SDINT_SDIOEN BIT(3)
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Datmel-mci.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2008 Atmel Corporation
12 #include <linux/dma-mapping.h>
50 #define ATMCI_CR_MCIEN BIT(0) /* MCI Enable */
51 #define ATMCI_CR_MCIDIS BIT(1) /* MCI Disable */
52 #define ATMCI_CR_PWSEN BIT(2) /* Power Save Enable */
53 #define ATMCI_CR_PWSDIS BIT(3) /* Power Save Disable */
54 #define ATMCI_CR_SWRST BIT(7) /* Software Reset */
55 #define ATMCI_MR 0x0004 /* Mode */
58 #define ATMCI_MR_RDPROOF BIT(11) /* Read Proof */
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Dsdhci-omap.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mmc/slot-gpio.h>
23 #include "sdhci-pltfm.h"
33 #define CON_DW8 BIT(5)
34 #define CON_DMA_MASTER BIT(20)
35 #define CON_DDR BIT(19)
36 #define CON_CLKEXTFREE BIT(16)
37 #define CON_PADEN BIT(15)
38 #define CON_CTPL BIT(11)
39 #define CON_INIT BIT(1)
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/kernel/linux/linux-6.6/sound/soc/codecs/
Dadau1701.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
94 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
95 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
100 #define ADAU1707_CLKDIV_UNSET (-1U)
116 u8 pin_config[12];
192 size = adau1701_register_size(&client->dev, reg); in adau1701_reg_write()
194 return -EINVAL; in adau1701_reg_write()
199 for (i = size + 1; i >= 2; --i) { in adau1701_reg_write()
210 return -EIO; in adau1701_reg_write()
[all …]
/kernel/linux/linux-5.10/sound/soc/codecs/
Dadau1701.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Lars-Peter Clausen <lars@metafoo.de>
94 #define ADAU1701_SERICTL_INV_BCLK BIT(3)
95 #define ADAU1701_SERICTL_INV_LRCLK BIT(4)
100 #define ADAU1707_CLKDIV_UNSET (-1U)
116 u8 pin_config[12];
192 size = adau1701_register_size(&client->dev, reg); in adau1701_reg_write()
194 return -EINVAL; in adau1701_reg_write()
199 for (i = size + 1; i >= 2; --i) { in adau1701_reg_write()
210 return -EIO; in adau1701_reg_write()
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Datmel-mci.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2004-2008 Atmel Corporation
12 #include <linux/dma-mapping.h>
33 #include <linux/atmel-mci.h>
50 #define ATMCI_CR_MCIEN BIT(0) /* MCI Enable */
51 #define ATMCI_CR_MCIDIS BIT(1) /* MCI Disable */
52 #define ATMCI_CR_PWSEN BIT(2) /* Power Save Enable */
53 #define ATMCI_CR_PWSDIS BIT(3) /* Power Save Disable */
54 #define ATMCI_CR_SWRST BIT(7) /* Software Reset */
55 #define ATMCI_MR 0x0004 /* Mode */
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Dsdhci-omap.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/mmc/slot-gpio.h>
22 #include "sdhci-pltfm.h"
25 #define CON_DW8 BIT(5)
26 #define CON_DMA_MASTER BIT(20)
27 #define CON_DDR BIT(19)
28 #define CON_CLKEXTFREE BIT(16)
29 #define CON_PADEN BIT(15)
30 #define CON_CTPL BIT(11)
31 #define CON_INIT BIT(1)
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/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dtc358775.c1 // SPDX-License-Identifier: GPL-2.0
35 /* DSI D-PHY Layer Registers */
48 #define DFTMODE_CNTRL 0x0054 /* DFT Mode Control */
51 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */
89 #define PPI_CLRSIPO 0x01E4 /* Clear SIPO values, Slave mode use only. */
92 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */
97 #define DSI_LANESTATUS0 0x0214 /* Displays lane is in HS RX mode. */
115 #define VFUEN_EN BIT(0) /* Upload Enable */
118 #define LV_MX0003 0x0480 /* Bit 0 to 3 */
119 #define LV_MX0407 0x0484 /* Bit 4 to 7 */
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/kernel/linux/linux-6.6/drivers/gpu/drm/bridge/
Dtc358775.c1 // SPDX-License-Identifier: GPL-2.0
16 #include <linux/media-bus-format.h>
35 /* DSI D-PHY Layer Registers */
48 #define DFTMODE_CNTRL 0x0054 /* DFT Mode Control */
51 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */
89 #define PPI_CLRSIPO 0x01E4 /* Clear SIPO values, Slave mode use only. */
92 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */
97 #define DSI_LANESTATUS0 0x0214 /* Displays lane is in HS RX mode. */
115 #define VFUEN_EN BIT(0) /* Upload Enable */
118 #define LV_MX0003 0x0480 /* Bit 0 to 3 */
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/kernel/linux/linux-6.6/drivers/gpu/drm/exynos/
Dexynos_drm_fimd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
63 #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8))
65 #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8))
77 /* display mode change control register except exynos4 */
85 #define LCD_WR_SETUP(x) ((x) << 12)
194 u32 clkdiv; member
202 { .compatible = "samsung,s3c6400-fimd",
204 { .compatible = "samsung,s5pv210-fimd",
206 { .compatible = "samsung,exynos3250-fimd",
208 { .compatible = "samsung,exynos4210-fimd",
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/kernel/linux/linux-5.10/drivers/gpu/drm/exynos/
Dexynos_drm_fimd.c1 // SPDX-License-Identifier: GPL-2.0-or-later
62 #define WKEYCON0_BASE(x) ((WKEYCON0 + 0x140) + ((x - 1) * 8))
64 #define WKEYCON1_BASE(x) ((WKEYCON1 + 0x140) + ((x - 1) * 8))
76 /* display mode change control register except exynos4 */
84 #define LCD_WR_SETUP(x) ((x) << 12)
189 u32 clkdiv; member
197 { .compatible = "samsung,s3c6400-fimd",
199 { .compatible = "samsung,s5pv210-fimd",
201 { .compatible = "samsung,exynos3250-fimd",
203 { .compatible = "samsung,exynos4210-fimd",
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/tilcdc/
Dtilcdc_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
65 struct drm_device *dev = crtc->dev; in set_scanout()
66 struct tilcdc_drm_private *priv = dev->dev_private; in set_scanout()
73 start = gem->dma_addr + fb->offsets[0] + in set_scanout()
74 crtc->y * fb->pitches[0] + in set_scanout()
75 crtc->x * fb->format->cpp[0]; in set_scanout()
77 end = start + (crtc->mode.vdisplay * fb->pitches[0]); in set_scanout()
84 if (priv->rev == 1) in set_scanout()
85 end -= 1; in set_scanout()
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/kernel/linux/linux-5.10/drivers/gpu/drm/tilcdc/
Dtilcdc_crtc.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
64 struct drm_device *dev = crtc->dev; in set_scanout()
65 struct tilcdc_drm_private *priv = dev->dev_private; in set_scanout()
72 start = gem->paddr + fb->offsets[0] + in set_scanout()
73 crtc->y * fb->pitches[0] + in set_scanout()
74 crtc->x * fb->format->cpp[0]; in set_scanout()
76 end = start + (crtc->mode.vdisplay * fb->pitches[0]); in set_scanout()
83 if (priv->rev == 1) in set_scanout()
84 end -= 1; in set_scanout()
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/kernel/linux/linux-5.10/drivers/net/ethernet/
Dethoc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2008 Avionic Design Development GmbH
6 * Copyright (C) 2008-2009 Avionic Design GmbH
8 * Written by Thierry Reding <thierry.reding@avionic-design.de>
11 #include <linux/dma-mapping.h>
55 /* mode register */
60 #define MODER_IAM (1 << 4) /* individual address mode */
61 #define MODER_PRO (1 << 5) /* promiscuous mode */
64 #define MODER_NBO (1 << 8) /* no back-off */
68 #define MODER_DCRC (1 << 12) /* delayed CRC enable */
[all …]
/kernel/linux/linux-6.6/drivers/net/ethernet/
Dethoc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2007-2008 Avionic Design Development GmbH
6 * Copyright (C) 2008-2009 Avionic Design GmbH
8 * Written by Thierry Reding <thierry.reding@avionic-design.de>
11 #include <linux/dma-mapping.h>
55 /* mode register */
60 #define MODER_IAM (1 << 4) /* individual address mode */
61 #define MODER_PRO (1 << 5) /* promiscuous mode */
64 #define MODER_NBO (1 << 8) /* no back-off */
68 #define MODER_DCRC (1 << 12) /* delayed CRC enable */
[all …]
/kernel/linux/linux-5.10/drivers/video/fbdev/
Ds3c-fb.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* linux/drivers/video/s3c-fb.c
5 * Copyright 2008-2010 Simtec Electronics
15 #include <linux/dma-mapping.h>
31 * setting of the alpha-blending functions that each window has, so only
35 * output timings and as the control for the output power-down state.
38 /* note, the previous use of <mach/regs-fb.h> to get platform specific data
58 #define VALID_BPP(x) (1 << ((x) - 1))
67 * struct s3c_fb_variant - fb variant information
82 * @has_clksel: Set if VIDCON0 register has CLKSEL bit.
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