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/kernel/linux/linux-5.10/tools/power/x86/intel-speed-select/
Disst-core.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features
9 int isst_write_pm_config(int cpu, int cp_state) in isst_write_pm_config() argument
19 ret = isst_send_mbox_command(cpu, WRITE_PM_CONFIG, PM_FEATURE, 0, req, in isst_write_pm_config()
24 debug_printf("cpu:%d WRITE_PM_CONFIG resp:%x\n", cpu, resp); in isst_write_pm_config()
29 int isst_read_pm_config(int cpu, int *cp_state, int *cp_cap) in isst_read_pm_config() argument
34 ret = isst_send_mbox_command(cpu, READ_PM_CONFIG, PM_FEATURE, 0, 0, in isst_read_pm_config()
39 debug_printf("cpu:%d READ_PM_CONFIG resp:%x\n", cpu, resp); in isst_read_pm_config()
47 int isst_get_ctdp_levels(int cpu, struct isst_pkg_ctdp *pkg_dev) in isst_get_ctdp_levels() argument
52 ret = isst_send_mbox_command(cpu, CONFIG_TDP, in isst_get_ctdp_levels()
[all …]
/kernel/linux/linux-5.10/arch/mips/netlogic/xlr/
Dfmn-config.c2 * Copyright (c) 2003-2012 Broadcom Corporation
35 #include <asm/cpu-info.h>
39 #include <asm/cpu.h>
56 xlr_board_fmn_config.bucket_size[(bkt * 8) + 0], in print_credit_config()
57 xlr_board_fmn_config.bucket_size[(bkt * 8) + 1], in print_credit_config()
58 xlr_board_fmn_config.bucket_size[(bkt * 8) + 2], in print_credit_config()
59 xlr_board_fmn_config.bucket_size[(bkt * 8) + 3], in print_credit_config()
60 xlr_board_fmn_config.bucket_size[(bkt * 8) + 4], in print_credit_config()
61 xlr_board_fmn_config.bucket_size[(bkt * 8) + 5], in print_credit_config()
62 xlr_board_fmn_config.bucket_size[(bkt * 8) + 6], in print_credit_config()
[all …]
/kernel/linux/linux-6.6/tools/power/x86/intel-speed-select/
Disst-core-mbox.c1 // SPDX-License-Identifier: GPL-2.0
3 * Intel Speed Select -- Enumerate and control features for Mailbox Interface
34 snprintf(level_str, sizeof(level_str), "level-%d", level); in mbox_get_trl_level_name()
66 if (id->cpu < 0) in mbox_is_punit_valid()
69 if (id->pkg < 0 || id->die < 0 || id->punit) in mbox_is_punit_valid()
75 static int _send_mmio_command(unsigned int cpu, unsigned int reg, int write, in _send_mmio_command() argument
84 debug_printf("mmio_cmd cpu:%d reg:%d write:%d\n", cpu, reg, write); in _send_mmio_command()
88 err(-1, "%s open failed", pathname); in _send_mmio_command()
91 io_regs.io_reg[0].logical_cpu = cpu; in _send_mmio_command()
101 if (ioctl(fd, cmd, &io_regs) == -1) { in _send_mmio_command()
[all …]
/kernel/linux/linux-5.10/arch/mips/kernel/
Dsmp-bmips.c20 #include <linux/cpu.h>
39 #include <asm/cpu-features.h>
52 static void bmips_set_reset_vec(int cpu, u32 val);
56 /* initial $sp, $gp - used by arch/mips/kernel/bmips_vec.S */
60 static void bmips43xx_send_ipi_single(int cpu, unsigned int action);
61 static void bmips5000_send_ipi_single(int cpu, unsigned int action);
69 #define CPUNUM(cpu, shift) (((cpu) + bmips_cpu_offset) << (shift)) argument
70 #define ACTION_CLR_IPI(cpu, ipi) (0x2000 | CPUNUM(cpu, 9) | ((ipi) << 8)) argument
71 #define ACTION_SET_IPI(cpu, ipi) (0x3000 | CPUNUM(cpu, 9) | ((ipi) << 8)) argument
72 #define ACTION_BOOT_THREAD(cpu) (0x08 | CPUNUM(cpu, 0)) argument
[all …]
/kernel/linux/linux-6.6/arch/mips/kernel/
Dsmp-bmips.c20 #include <linux/cpu.h>
40 #include <asm/cpu-features.h>
53 static void bmips_set_reset_vec(int cpu, u32 val);
59 /* initial $sp, $gp - used by arch/mips/kernel/bmips_vec.S */
63 static void bmips43xx_send_ipi_single(int cpu, unsigned int action);
64 static void bmips5000_send_ipi_single(int cpu, unsigned int action);
72 #define CPUNUM(cpu, shift) (((cpu) + bmips_cpu_offset) << (shift)) argument
73 #define ACTION_CLR_IPI(cpu, ipi) (0x2000 | CPUNUM(cpu, 9) | ((ipi) << 8)) argument
74 #define ACTION_SET_IPI(cpu, ipi) (0x3000 | CPUNUM(cpu, 9) | ((ipi) << 8)) argument
75 #define ACTION_BOOT_THREAD(cpu) (0x08 | CPUNUM(cpu, 0)) argument
[all …]
/kernel/linux/linux-6.6/Documentation/ABI/stable/
Dsysfs-devices-system-cpu1 What: /sys/devices/system/cpu/dscr_default
2 Date: 13-May-2014
6 /sys/devices/system/cpu/cpuN/dscr on all CPUs.
9 all per-CPU defaults at the same time.
12 What: /sys/devices/system/cpu/cpu[0-9]+/dscr
13 Date: 13-May-2014
17 a CPU.
22 on any CPU where it executes (overriding the value described
27 What: /sys/devices/system/cpu/cpuX/topology/physical_package_id
33 What: /sys/devices/system/cpu/cpuX/topology/die_id
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/
Damlogic-t7.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
10 #address-cells = <2>;
11 #size-cells = <2>;
14 #address-cells = <0x2>;
15 #size-cells = <0x0>;
17 cpu-map {
20 cpu = <&cpu100>;
23 cpu = <&cpu101>;
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/
Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include <dt-bindings/leds/common.h>
12 #include "exynos5422-odroid-core.dtsi"
16 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 led-controller {
20 compatible = "pwm-leds";
22 led-1 {
26 pwm-names = "pwm2";
27 max-brightness = <255>;
[all …]
Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
20 gpio-keys {
21 compatible = "gpio-keys";
22 pinctrl-names = "default";
23 pinctrl-0 = <&power_key>;
25 power-key {
36 debounce-interval = <0>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dexynos5422-odroidhc1.dts1 // SPDX-License-Identifier: GPL-2.0
10 /dts-v1/;
11 #include "exynos5422-odroid-core.dtsi"
15 compatible = "hardkernel,odroid-hc1", "samsung,exynos5800", \
19 compatible = "pwm-leds";
24 pwm-names = "pwm2";
25 max-brightness = <255>;
26 linux,default-trigger = "heartbeat";
30 thermal-zones {
31 cpu0_thermal: cpu0-thermal {
[all …]
Dexynos5422-odroidxu3-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel Odroid XU3/XU3-Lite/XU4 boards common device tree source
12 #include <dt-bindings/input/input.h>
13 #include "exynos5422-odroid-core.dtsi"
17 compatible = "gpio-keys";
18 pinctrl-names = "default";
19 pinctrl-0 = <&power_key>;
32 debounce-interval = <0>;
33 wakeup-source;
38 pinctrl-0 = <&emmc_nrst_pin>;
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/
Dmsr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* ----------------------------------------------------------------------- *
4 * Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
7 * ----------------------------------------------------------------------- */
13 * and then read/write in chunks of 8 bytes. A larger size means multiple
16 * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
17 * an SMP box will direct the access to CPU %d.
33 #include <linux/cpu.h>
59 int cpu = iminor(file_inode(file)); in msr_read() local
63 if (count % 8) in msr_read()
[all …]
/kernel/linux/linux-5.10/tools/perf/util/
Dcpumap.c1 // SPDX-License-Identifier: GPL-2.0
25 map = perf_cpu_map__empty_new(cpus->nr); in cpu_map__from_entries()
29 for (i = 0; i < cpus->nr; i++) { in cpu_map__from_entries()
31 * Special treatment for -1, which is not real cpu number, in cpu_map__from_entries()
32 * and we need to use (int) -1 to initialize map[i], in cpu_map__from_entries()
35 if (cpus->cpu[i] == (u16) -1) in cpu_map__from_entries()
36 map->map[i] = -1; in cpu_map__from_entries()
38 map->map[i] = (int) cpus->cpu[i]; in cpu_map__from_entries()
48 int nr, nbits = mask->nr * mask->long_size * BITS_PER_BYTE; in cpu_map__from_mask()
50 nr = bitmap_weight(mask->mask, nbits); in cpu_map__from_mask()
[all …]
Dsvghelper.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * svghelper.c - helper functions for outputting svg
43 static double cpu2slot(int cpu) in cpu2slot() argument
45 return 2 * cpu + 1; in cpu2slot()
50 static double cpu2y(int cpu) in cpu2y() argument
53 return cpu2slot(topology_map[cpu]) * SLOT_MULT; in cpu2y()
55 return cpu2slot(cpu) * SLOT_MULT; in cpu2y()
62 X = 1.0 * svg_page_width * (__time - first_time) / (last_time - first_time); in time2pixels()
77 while (loop--) { in round_text_size()
102 new_width = (last_time - first_time) / 5000000; in open_svg()
[all …]
/kernel/linux/linux-6.6/tools/perf/util/
Dsvghelper.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * svghelper.c - helper functions for outputting svg
43 static double cpu2slot(int cpu) in cpu2slot() argument
45 return 2 * cpu + 1; in cpu2slot()
50 static double cpu2y(int cpu) in cpu2y() argument
53 return cpu2slot(topology_map[cpu]) * SLOT_MULT; in cpu2y()
55 return cpu2slot(cpu) * SLOT_MULT; in cpu2y()
62 X = 1.0 * svg_page_width * (__time - first_time) / (last_time - first_time); in time2pixels()
77 while (loop--) { in round_text_size()
102 new_width = (last_time - first_time) / 5000000; in open_svg()
[all …]
Daffinity.c1 // SPDX-License-Identifier: GPL-2.0
14 int sz = cpu__max_cpu().cpu + 8 - 1; in get_cpu_set_size()
21 return sz / 8; in get_cpu_set_size()
28 a->orig_cpus = bitmap_zalloc(cpu_set_size * 8); in affinity__setup()
29 if (!a->orig_cpus) in affinity__setup()
30 return -1; in affinity__setup()
31 sched_getaffinity(0, cpu_set_size, (cpu_set_t *)a->orig_cpus); in affinity__setup()
32 a->sched_cpus = bitmap_zalloc(cpu_set_size * 8); in affinity__setup()
33 if (!a->sched_cpus) { in affinity__setup()
34 zfree(&a->orig_cpus); in affinity__setup()
[all …]
/kernel/linux/linux-6.6/arch/x86/kernel/
Dmsr.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* ----------------------------------------------------------------------- *
4 * Copyright 2000-2008 H. Peter Anvin - All Rights Reserved
7 * ----------------------------------------------------------------------- */
13 * and then read/write in chunks of 8 bytes. A larger size means multiple
16 * This driver uses /dev/cpu/%d/msr where %d is the minor number, and on
17 * an SMP box will direct the access to CPU %d.
33 #include <linux/cpu.h>
58 int cpu = iminor(file_inode(file)); in msr_read() local
62 if (count % 8) in msr_read()
[all …]
/kernel/linux/linux-5.10/arch/x86/kernel/cpu/
Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
3 * Routines to identify caches on Intel CPU.
7 * Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
13 #include <linux/cpu.h>
24 #include "cpu.h"
45 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
46 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
47 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */
48 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
49 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
[all …]
/kernel/linux/linux-6.6/drivers/clk/mvebu/
Ddove.c1 // SPDX-License-Identifier: GPL-2.0
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 #include <linux/clk-provider.h>
18 #include "dove-divider.h"
23 * Dove PLL sample-at-reset configuration
25 * SAR0[8:5] : CPU frequency
29 * 8 = 800 MHz
39 * SAR0[11:9] : CPU to L2 Clock divider ratio
40 * 0 = (1/1) * CPU
41 * 2 = (1/2) * CPU
[all …]
/kernel/linux/linux-5.10/drivers/clk/mvebu/
Ddove.c1 // SPDX-License-Identifier: GPL-2.0
7 * Gregory CLEMENT <gregory.clement@free-electrons.com>
14 #include <linux/clk-provider.h>
18 #include "dove-divider.h"
23 * Dove PLL sample-at-reset configuration
25 * SAR0[8:5] : CPU frequency
29 * 8 = 800 MHz
39 * SAR0[11:9] : CPU to L2 Clock divider ratio
40 * 0 = (1/1) * CPU
41 * 2 = (1/2) * CPU
[all …]
/kernel/linux/linux-6.6/arch/x86/kernel/cpu/
Dcacheinfo.c1 // SPDX-License-Identifier: GPL-2.0
3 * Routines to identify caches on Intel CPU.
7 * Ashok Raj <ashok.raj@intel.com>: Work with CPU hotplug infrastructure.
13 #include <linux/cpu.h>
28 #include "cpu.h"
60 { 0x06, LVL_1_INST, 8 }, /* 4-way set assoc, 32 byte line size */
61 { 0x08, LVL_1_INST, 16 }, /* 4-way set assoc, 32 byte line size */
62 { 0x09, LVL_1_INST, 32 }, /* 4-way set assoc, 64 byte line size */
63 { 0x0a, LVL_1_DATA, 8 }, /* 2 way set assoc, 32 byte line size */
64 { 0x0c, LVL_1_DATA, 16 }, /* 4-way set assoc, 32 byte line size */
[all …]
/kernel/linux/linux-6.6/arch/arc/include/asm/
Dmmu_context.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
6 * -Refactored get_new_mmu_context( ) to only handle live-mm.
7 * retiring-mm handled in other hooks
10 * -Major rewrite of Core ASID allocation routine get_new_mmu_context
21 #include <asm-generic/mm_hooks.h>
25 * MMU tags TLBs with an 8-bit ASID, avoiding need to flush the TLB on
26 * context-switch.
28 * ASID is managed per cpu, so task threads across CPUs can have different
32 * Each task is assigned unique ASID, with a simple round-robin allocator
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/
Dhi6220.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhi6220.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/reset/hisi,hi6220-resets.h>
10 #include <dt-bindings/clock/hi6220-clock.h>
11 #include <dt-bindings/pinctrl/hisi.h>
12 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
21 compatible = "arm,psci-0.2";
[all …]
/kernel/linux/linux-5.10/tools/power/x86/x86_energy_perf_policy/
Dx86_energy_perf_policy.81 .\" This page Copyright (C) 2010 - 2015 Len Brown <len.brown@intel.com>
3 .TH X86_ENERGY_PERF_POLICY 8
5 x86_energy_perf_policy \- Manage Energy vs. Performance Policy via x86 Model Specific Registers
10 .RB "scope: \-\-cpu\ cpu-list | \-\-pkg\ pkg-list"
12 .RB "cpu-list, pkg-list: # | #,# | #-# | all"
14 .RB "field: \-\-all | \-\-epb | \-\-hwp-epp | \-\-hwp-min | \-\-hwp-max | \-\-hwp-desired"
16 .RB "other: (\-\-force | \-\-hwp-enable | \-\-turbo-enable) value)"
18 .RB "value: # | default | performance | balance-performance | balance-power | power"
21 displays and updates energy-performance policy settings specific to
23 updates, no matter if the Linux cpufreq sub-system is enabled or not.
[all …]

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