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/kernel/linux/linux-6.6/drivers/remoteproc/
Dti_k3_r5_remoteproc.c439 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to
442 * private to each core. Only Core0 needs to be unhalted for running the
509 * both cores, but with only Core0 unhalted. This function re-uses the same
538 * mode requires the boot vector to be configured only for Core0, and then
540 * first followed by Core0. The Split-mode requires that Core0 to be maintained
542 * always only after Core0 is started).
544 * The Single-CPU mode on applicable SoCs (eg: AM64x) only uses Core0 to execute
545 * code, so only Core0 needs to be unhalted. The function uses the same logic
554 struct k3_r5_core *core0, *core; in k3_r5_rproc_start() local
577 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, in k3_r5_rproc_start()
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/kernel/linux/linux-6.6/arch/powerpc/boot/dts/fsl/
Dp1020rdb-pc_camp_core0.dts3 * P1020 RDB-PC Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
10 * Please note to add "-b 0" for core0's dts compiling.
Dmpc8572ds_camp_core0.dts3 * MPC8572 DS Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/fsl/
Dp1020rdb-pc_camp_core0.dts3 * P1020 RDB-PC Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
10 * Please note to add "-b 0" for core0's dts compiling.
Dmpc8572ds_camp_core0.dts3 * MPC8572 DS Core0 Device Tree Source in CAMP mode.
7 * This dts file allows core0 to have memory, l2, i2c, dma1, global-util, eth0,
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/
Dbrcm,bcm-v3d.yaml26 - description: core0 register (required)
34 - const: core0
70 reg-names = "hub", "core0", "bridge", "gca";
Darm,mali-bifrost.yaml183 - const: core0
206 - const: core0
224 - const: core0
240 - const: core0
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/media/
Dqcom,sdm845-venus-v2.yaml55 video-core0:
83 - video-core0
115 video-core0 {
Dqcom,sdm845-venus.yaml38 video-core0:
93 - video-core0
116 video-core0 {
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/media/
Dqcom,sdm845-venus.yaml45 video-core0:
120 - video-core0
143 video-core0 {
Dqcom,sdm845-venus-v2.yaml59 video-core0:
107 - video-core0
139 video-core0 {
/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/axm/
Daxm5516-cpus.dtsi15 core0 {
29 core0 {
43 core0 {
57 core0 {
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Daxm5516-cpus.dtsi15 core0 {
29 core0 {
43 core0 {
57 core0 {
/kernel/linux/linux-6.6/sound/soc/sof/intel/
Dlnl.h12 #define LNL_DSP_REG_HFDSC 0x160200 /* DSP core0 status */
13 #define LNL_DSP_REG_HFDEC 0x160204 /* DSP core0 error */
Dmtl.h79 #define MTL_DSP_REG_HFFLGPXQWY 0x163200 /* DSP core0 status */
80 #define MTL_DSP_REG_HFFLGPXQWY_ERROR 0x163204 /* DSP core0 error */
/kernel/linux/linux-6.6/arch/arm64/boot/dts/amd/
Damd-seattle-cpus.dtsi10 core0 {
18 core0 {
26 core0 {
34 core0 {
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/gpu/
Dbrcm,bcm-v3d.txt9 - reg-names: Names for the register areas. The "hub" and "core0"
30 reg-names = "bridge", "hub", "core0", "gca";
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/cpu/
Dcpu-topology.txt194 core0 {
214 core0 {
236 core0 {
255 core0 {
413 core0 {
428 core0 {
507 core0 {
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/cpu/
Dcpu-topology.txt194 core0 {
214 core0 {
236 core0 {
255 core0 {
413 core0 {
428 core0 {
507 core0 {
/kernel/linux/linux-5.10/drivers/remoteproc/
Dti_k3_r5_remoteproc.c420 * mode requires the boot vector to be configured only for Core0, and then
422 * first followed by Core0. The Split-mode requires that Core0 to be maintained
424 * always only after Core0 is started).
505 * performed first on Core0 followed by Core1. The Split-mode requires that
506 * Core0 to be maintained always in a higher power state that Core1 (implying
507 * Core1 needs to be stopped first before Core0).
651 * dictating ARM or Thumb mode) can only be set and retrieved using Core0.
655 * They are identically configured in LockStep mode using the primary Core0
665 struct k3_r5_core *core0, *core, *temp; in k3_r5_rproc_configure() local
672 core0 = list_first_entry(&cluster->cores, struct k3_r5_core, elem); in k3_r5_rproc_configure()
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/kernel/linux/linux-6.6/arch/arm64/boot/dts/hisilicon/
Dhip05.dtsi27 core0 {
41 core0 {
55 core0 {
69 core0 {
/kernel/linux/linux-5.10/arch/arm64/boot/dts/hisilicon/
Dhip05.dtsi27 core0 {
41 core0 {
55 core0 {
69 core0 {
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-j721e-som-p0.dtsi121 mbox_mcu_r5fss0_core0: mbox-mcu-r5fss0-core0 {
135 mbox_main_r5fss0_core0: mbox-main-r5fss0-core0 {
149 mbox_main_r5fss1_core0: mbox-main-r5fss1-core0 {
Dk3-am654.dtsi16 core0 {
26 core0 {
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-g12b.dtsi18 core0 {
28 core0 {

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