| /kernel/linux/linux-6.6/drivers/dma/dw-edma/ |
| D | dw-edma-v0-debugfs.c | 12 #include "dw-edma-v0-debugfs.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \ argument
18 struct dw_edma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \ argument
27 if ((dw)->chip->mf == EDMA_MF_EDMA_LEGACY) \
28 __ch_regs = REGS_ADDR(dw, type.legacy.ch); \
30 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].rd); \
32 __ch_regs = REGS_ADDR(dw, type.unroll.ch[_ch].wr); \
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| D | dw-edma-v0-core.c | 13 #include "dw-edma-core.h"
14 #include "dw-edma-v0-core.h"
15 #include "dw-edma-v0-regs.h"
16 #include "dw-edma-v0-debugfs.h"
28 static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) in __dw_regs() argument
30 return dw->chip->reg_base; in __dw_regs()
33 #define SET_32(dw, name, value) \ argument
34 writel(value, &(__dw_regs(dw)->name))
36 #define GET_32(dw, name) \ argument
37 readl(&(__dw_regs(dw)->name))
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| D | dw-hdma-v0-debugfs.c | 12 #include "dw-hdma-v0-debugfs.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-edma-core.h"
16 #define REGS_ADDR(dw, name) \ argument
18 struct dw_hdma_v0_regs __iomem *__regs = (dw)->chip->reg_base; \
23 #define REGS_CH_ADDR(dw, name, _dir, _ch) \ argument
28 __ch_regs = REGS_ADDR(dw, ch[_ch].rd); \
30 __ch_regs = REGS_ADDR(dw, ch[_ch].wr); \
35 #define CTX_REGISTER(dw, name, dir, ch) \ argument
36 {#name, REGS_CH_ADDR(dw, name, dir, ch)}
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| D | dw-hdma-v0-core.c | 11 #include "dw-edma-core.h"
12 #include "dw-hdma-v0-core.h"
13 #include "dw-hdma-v0-regs.h"
14 #include "dw-hdma-v0-debugfs.h"
26 static inline struct dw_hdma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) in __dw_regs() argument
28 return dw->chip->reg_base; in __dw_regs()
32 __dw_ch_regs(struct dw_edma *dw, enum dw_edma_dir dir, u16 ch) in __dw_ch_regs() argument
35 return &(__dw_regs(dw)->ch[ch].wr); in __dw_ch_regs()
37 return &(__dw_regs(dw)->ch[ch].rd); in __dw_ch_regs()
40 #define SET_CH_32(dw, dir, ch, name, value) \ argument
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| D | dw-edma-core.c | 19 #include "dw-edma-core.h"
20 #include "dw-edma-v0-core.h"
21 #include "dw-hdma-v0-core.h"
46 struct dw_edma_chip *chip = chan->dw->chip; in dw_edma_get_pci_address()
78 struct dw_edma_chip *chip = desc->chan->dw->chip; in dw_edma_alloc_chunk()
187 struct dw_edma *dw = chan->dw; in dw_edma_start_transfer() local
205 dw_edma_core_start(dw, child, !desc->xfer_sz); in dw_edma_start_transfer()
220 if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { in dw_edma_device_caps()
389 * If eDMA is embedded into the DW PCIe RP/EP and controlled from the in dw_edma_device_transfer()
404 if (chan->dw->chip->flags & DW_EDMA_CHIP_LOCAL) { in dw_edma_device_transfer()
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| D | dw-edma-core.h | 76 struct dw_edma *dw; member
95 struct dw_edma *dw; member
121 void (*off)(struct dw_edma *dw);
122 u16 (*ch_count)(struct dw_edma *dw, enum dw_edma_dir dir);
128 void (*debugfs_on)(struct dw_edma *dw);
167 void dw_edma_core_off(struct dw_edma *dw) in dw_edma_core_off() argument
169 dw->core->off(dw); in dw_edma_core_off()
173 u16 dw_edma_core_ch_count(struct dw_edma *dw, enum dw_edma_dir dir) in dw_edma_core_ch_count() argument
175 return dw->core->ch_count(dw, dir); in dw_edma_core_ch_count()
181 return chan->dw->core->ch_status(chan); in dw_edma_core_ch_status()
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| D | Makefile | 3 obj-$(CONFIG_DW_EDMA) += dw-edma.o
4 dw-edma-$(CONFIG_DEBUG_FS) := dw-edma-v0-debugfs.o \
5 dw-hdma-v0-debugfs.o
6 dw-edma-objs := dw-edma-core.o \
7 dw-edma-v0-core.o \
8 dw-hdma-v0-core.o $(dw-edma-y)
9 obj-$(CONFIG_DW_EDMA_PCIE) += dw-edma-pcie.o
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| /kernel/linux/linux-5.10/drivers/dma/dw-edma/ |
| D | dw-edma-v0-core.c | 11 #include "dw-edma-core.h"
12 #include "dw-edma-v0-core.h"
13 #include "dw-edma-v0-regs.h"
14 #include "dw-edma-v0-debugfs.h"
26 static inline struct dw_edma_v0_regs __iomem *__dw_regs(struct dw_edma *dw) in __dw_regs() argument
28 return dw->rg_region.vaddr; in __dw_regs()
31 #define SET(dw, name, value) \ argument
32 writel(value, &(__dw_regs(dw)->name))
34 #define GET(dw, name) \ argument
35 readl(&(__dw_regs(dw)->name))
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| D | dw-edma-pcie.c | 17 #include "dw-edma-core.h"
73 struct dw_edma *dw; in dw_edma_pcie_probe() local
123 dw = devm_kzalloc(dev, sizeof(*dw), GFP_KERNEL); in dw_edma_pcie_probe()
124 if (!dw) in dw_edma_pcie_probe()
137 chip->dw = dw; in dw_edma_pcie_probe()
142 dw->rg_region.vaddr = pcim_iomap_table(pdev)[pdata->rg_bar]; in dw_edma_pcie_probe()
143 dw->rg_region.vaddr += pdata->rg_off; in dw_edma_pcie_probe()
144 dw->rg_region.paddr = pdev->resource[pdata->rg_bar].start; in dw_edma_pcie_probe()
145 dw->rg_region.paddr += pdata->rg_off; in dw_edma_pcie_probe()
146 dw->rg_region.sz = pdata->rg_sz; in dw_edma_pcie_probe()
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| D | dw-edma-core.c | 20 #include "dw-edma-core.h"
21 #include "dw-edma-v0-core.h"
68 struct dw_edma *dw = chan->chip->dw; in dw_edma_alloc_chunk() local
84 chunk->ll_region.paddr = dw->ll_region.paddr + chan->ll_off; in dw_edma_alloc_chunk()
85 chunk->ll_region.vaddr = dw->ll_region.vaddr + chan->ll_off; in dw_edma_alloc_chunk()
555 struct dw_edma *dw = dw_irq->dw; in dw_edma_interrupt() local
561 total = dw->wr_ch_cnt; in dw_edma_interrupt()
565 total = dw->rd_ch_cnt; in dw_edma_interrupt()
566 off = dw->wr_ch_cnt; in dw_edma_interrupt()
570 val = dw_edma_v0_core_status_done_int(dw, write ? in dw_edma_interrupt()
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| /kernel/linux/linux-6.6/drivers/misc/ |
| D | dw-xdata-pcie.c | 20 #define DW_XDATA_DRIVER_NAME "dw-xdata-pcie"
73 static inline struct dw_xdata_regs __iomem *__dw_regs(struct dw_xdata *dw) in __dw_regs() argument
75 return dw->rg_region.vaddr; in __dw_regs()
78 static void dw_xdata_stop(struct dw_xdata *dw) in dw_xdata_stop() argument
82 mutex_lock(&dw->mutex); in dw_xdata_stop()
84 burst = readl(&(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
88 writel(burst, &(__dw_regs(dw)->burst_cnt)); in dw_xdata_stop()
91 mutex_unlock(&dw->mutex); in dw_xdata_stop()
94 static void dw_xdata_start(struct dw_xdata *dw, bool write) in dw_xdata_start() argument
96 struct device *dev = &dw->pdev->dev; in dw_xdata_start()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-hdmi-ahb-audio.c | 21 #include "dw-hdmi-audio.h"
23 #define DRIVER_NAME "dw-hdmi-ahb-audio"
153 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_iec958() argument
156 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_iec958()
157 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_iec958()
158 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_iec958()
181 static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_s24() argument
184 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_s24()
185 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_s24()
186 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_s24()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-hdmi-ahb-audio.c | 21 #include "dw-hdmi-audio.h"
23 #define DRIVER_NAME "dw-hdmi-ahb-audio"
153 static void dw_hdmi_reformat_iec958(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_iec958() argument
156 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_iec958()
157 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_iec958()
158 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_iec958()
181 static void dw_hdmi_reformat_s24(struct snd_dw_hdmi *dw, in dw_hdmi_reformat_s24() argument
184 u32 *src = dw->buf_src + offset; in dw_hdmi_reformat_s24()
185 u32 *dst = dw->buf_dst + offset; in dw_hdmi_reformat_s24()
186 u32 *end = dw->buf_src + offset + bytes; in dw_hdmi_reformat_s24()
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| D | dw-hdmi-gp-audio.c | 3 * dw-hdmi-gp-audio.c
26 #include "dw-hdmi-audio.h"
28 #define DRIVER_NAME "dw-hdmi-gp-audio"
79 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); in audio_hw_params() local
82 dw_hdmi_set_sample_rate(dw->data.hdmi, params->sample_rate); in audio_hw_params()
86 dw_hdmi_set_channel_count(dw->data.hdmi, params->channels); in audio_hw_params()
87 dw_hdmi_set_channel_allocation(dw->data.hdmi, ca); in audio_hw_params()
89 dw_hdmi_set_sample_non_pcm(dw->data.hdmi, in audio_hw_params()
91 dw_hdmi_set_sample_width(dw->data.hdmi, params->sample_width); in audio_hw_params()
103 struct snd_dw_hdmi *dw = dev_get_drvdata(dev); in audio_mute_stream() local
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| /kernel/linux/linux-5.10/drivers/dma/dw/ |
| D | core.c | 82 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get() local
86 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); in dwc_desc_get()
101 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_put() local
109 dma_pool_free(dw->desc_pool, child, child->txd.phys); in dwc_desc_put()
113 dma_pool_free(dw->desc_pool, desc, desc->txd.phys); in dwc_desc_put()
119 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
121 dw->initialize_chan(dwc); in dwc_initialize()
124 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
125 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
141 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
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| D | idma32.c | 88 static void idma32_set_device_name(struct dw_dma *dw, int id) in idma32_set_device_name() argument
90 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id); in idma32_set_device_name()
99 static void idma32_fifo_partition(struct dw_dma *dw) in idma32_fifo_partition() argument
112 idma32_writeq(dw, FIFO_PARTITION1, fifo_partition); in idma32_fifo_partition()
113 idma32_writeq(dw, FIFO_PARTITION0, fifo_partition); in idma32_fifo_partition()
116 static void idma32_disable(struct dw_dma *dw) in idma32_disable() argument
118 do_dw_dma_off(dw); in idma32_disable()
119 idma32_fifo_partition(dw); in idma32_disable()
122 static void idma32_enable(struct dw_dma *dw) in idma32_enable() argument
124 idma32_fifo_partition(dw); in idma32_enable()
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| D | dw.c | 16 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dw_dma_initialize_chan() local
23 cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl); in dw_dma_initialize_chan()
91 static void dw_dma_set_device_name(struct dw_dma *dw, int id) in dw_dma_set_device_name() argument
93 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id); in dw_dma_set_device_name()
96 static void dw_dma_disable(struct dw_dma *dw) in dw_dma_disable() argument
98 do_dw_dma_off(dw); in dw_dma_disable()
101 static void dw_dma_enable(struct dw_dma *dw) in dw_dma_enable() argument
103 do_dw_dma_on(dw); in dw_dma_enable()
108 struct dw_dma *dw; in dw_dma_probe() local
110 dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); in dw_dma_probe()
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| /kernel/linux/linux-6.6/drivers/dma/dw/ |
| D | core.c | 80 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_get() local
84 desc = dma_pool_zalloc(dw->desc_pool, GFP_ATOMIC, &phys); in dwc_desc_get()
99 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_desc_put() local
107 dma_pool_free(dw->desc_pool, child, child->txd.phys); in dwc_desc_put()
111 dma_pool_free(dw->desc_pool, desc, desc->txd.phys); in dwc_desc_put()
117 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dwc_initialize() local
119 dw->initialize_chan(dwc); in dwc_initialize()
122 channel_set_bit(dw, MASK.XFER, dwc->mask); in dwc_initialize()
123 channel_set_bit(dw, MASK.ERROR, dwc->mask); in dwc_initialize()
139 static inline void dwc_chan_disable(struct dw_dma *dw, struct dw_dma_chan *dwc) in dwc_chan_disable() argument
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| D | dw.c | 16 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in dw_dma_initialize_chan() local
23 cfghi |= DWC_CFGH_PROTCTL(dw->pdata->protctl); in dw_dma_initialize_chan()
91 static void dw_dma_set_device_name(struct dw_dma *dw, int id) in dw_dma_set_device_name() argument
93 snprintf(dw->name, sizeof(dw->name), "dw:dmac%d", id); in dw_dma_set_device_name()
96 static void dw_dma_disable(struct dw_dma *dw) in dw_dma_disable() argument
98 do_dw_dma_off(dw); in dw_dma_disable()
101 static void dw_dma_enable(struct dw_dma *dw) in dw_dma_enable() argument
103 do_dw_dma_on(dw); in dw_dma_enable()
108 struct dw_dma *dw; in dw_dma_probe() local
110 dw = devm_kzalloc(chip->dev, sizeof(*dw), GFP_KERNEL); in dw_dma_probe()
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| D | idma32.c | 48 struct dw_dma *dw = to_dw_dma(dwc->chan.device); in idma32_initialize_chan_xbar() local
49 void __iomem *misc = __dw_regs(dw); in idma32_initialize_chan_xbar()
217 static void idma32_set_device_name(struct dw_dma *dw, int id) in idma32_set_device_name() argument
219 snprintf(dw->name, sizeof(dw->name), "idma32:dmac%d", id); in idma32_set_device_name()
228 static void idma32_fifo_partition(struct dw_dma *dw) in idma32_fifo_partition() argument
241 idma32_writeq(dw, FIFO_PARTITION1, fifo_partition); in idma32_fifo_partition()
242 idma32_writeq(dw, FIFO_PARTITION0, fifo_partition); in idma32_fifo_partition()
245 static void idma32_disable(struct dw_dma *dw) in idma32_disable() argument
247 do_dw_dma_off(dw); in idma32_disable()
248 idma32_fifo_partition(dw); in idma32_disable()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | samsung,exynos-dw-mshc.yaml | 4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
18 - samsung,exynos4210-dw-mshc
19 - samsung,exynos4412-dw-mshc
20 - samsung,exynos5250-dw-mshc
21 - samsung,exynos5420-dw-mshc
22 - samsung,exynos5420-dw-mshc-smu
23 - samsung,exynos7-dw-mshc
24 - samsung,exynos7-dw-mshc-smu
25 - axis,artpec8-dw-mshc
44 samsung,dw-mshc-ciu-div:
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| D | rockchip-dw-mshc.yaml | 4 $id: http://devicetree.org/schemas/mmc/rockchip-dw-mshc.yaml#
12 This file documents the combined properties for the core Synopsys dw mshc
13 controller that are not already included in the synopsys-dw-mshc-common.yaml
17 - $ref: synopsys-dw-mshc-common.yaml#
27 - const: rockchip,rk2928-dw-mshc
29 - const: rockchip,rk3288-dw-mshc
32 - rockchip,px30-dw-mshc
33 - rockchip,rk1808-dw-mshc
34 - rockchip,rk3036-dw-mshc
35 - rockchip,rk3128-dw-mshc
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| /kernel/linux/linux-5.10/drivers/dma/dw-axi-dmac/ |
| D | dw-axi-dmac-platform.c | 26 #include "dw-axi-dmac.h"
31 * The set of bus widths supported by the DMA controller. DW AXI DMAC supports
179 for (i = 0; i < chip->dw->hdata->nr_channels; i++) { in axi_dma_hw_init()
180 axi_chan_irq_disable(&chip->dw->chan[i], DWAXIDMAC_IRQ_ALL); in axi_dma_hw_init()
181 axi_chan_disable(&chip->dw->chan[i]); in axi_dma_hw_init()
188 u32 max_width = chan->chip->dw->hdata->m_data_width; in axi_chan_get_xfer_width()
200 struct dw_axi_dma *dw = chan->chip->dw; in axi_desc_get() local
204 desc = dma_pool_zalloc(dw->desc_pool, GFP_NOWAIT, &phys); in axi_desc_get()
222 struct dw_axi_dma *dw = chan->chip->dw; in axi_desc_put() local
228 dma_pool_free(dw->desc_pool, child, child->vd.tx.phys); in axi_desc_put()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | exynos-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described
7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific
13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210
15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412
17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250
19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420
21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7
23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7
26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface
30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
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| /kernel/linux/linux-5.10/include/uapi/scsi/ |
| D | scsi_bsg_ufs.h | 18 /* uic commands are 4DW long, per UFSHCI V2.1 paragraph 5.6.1 */
23 * @dword_0: UPIU header DW-0
24 * @dword_1: UPIU header DW-1
25 * @dword_2: UPIU header DW-2
42 * @value: Attribute value to be written DW-5
43 * @reserved: spec reserved DW-6,7
58 * @data_transfer_len: Data Transfer Length DW-3
59 * @cdb: Command Descriptor Block CDB DW-4 to DW-7
68 * @header:UPIU header structure DW-0 to DW-2
69 * @sc: fields structure for scsi command DW-3 to DW-7
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