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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
35 clock-names:
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dmmc-pwrseq-simple.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
19 const: mmc-pwrseq-simple
21 reset-gpios:
28 They will be de-asserted right after the power has been provided to the
33 description: Handle for the entry in clock-names.
35 clock-names:
[all …]
/kernel/linux/linux-6.6/drivers/hwmon/
Dsfctemp.c1 // SPDX-License-Identifier: GPL-2.0
19 * TempSensor reset. The RSTN can be de-asserted once the analog core has
21 * 0:reset 1:de-assert
27 * Tpu(min 50us) after PD is de-asserted. RSTN should be held low until the
41 * Temp(C)=DOUT*Y/4094 - K
65 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_up()
68 writel(0, sfctemp->regs); in sfctemp_power_up()
72 /* de-assert reset */ in sfctemp_power_up()
73 writel(SFCTEMP_RSTN, sfctemp->regs); in sfctemp_power_up()
79 writel(SFCTEMP_PD, sfctemp->regs); in sfctemp_power_down()
[all …]
/kernel/linux/linux-5.10/include/linux/platform_data/
Dad5449.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Author: Lars-Peter Clausen <lars@metafoo.de>
14 * enum ad5449_sdo_mode - AD5449 SDO pin configuration
17 * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode.
29 * struct ad5449_platform_data - Platform data for the ad5449 DAC driver
31 * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the
/kernel/linux/linux-6.6/include/linux/platform_data/
Dad5449.h1 /* SPDX-License-Identifier: GPL-2.0-only */
7 * Author: Lars-Peter Clausen <lars@metafoo.de>
14 * enum ad5449_sdo_mode - AD5449 SDO pin configuration
17 * @AD5449_SDO_OPEN_DRAIN: Operate the SDO pin in open-drain mode.
29 * struct ad5449_platform_data - Platform data for the ad5449 DAC driver
31 * @hardware_clear_to_midscale: Whether asserting the hardware CLR pin sets the
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/bluetooth/
Dnxp,88w8987-bt.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/bluetooth/nxp,88w8987-bt.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 This binding describes UART-attached NXP bluetooth chips. These chips
11 are dual-radio chips supporting WiFi and Bluetooth. The bluetooth
12 works on standard H4 protocol over 4-wire UART. The RTS and CTS lines
14 asserts break signal over UART-TX line to put the chip into power save
15 state. De-asserting break wakes up the BT chip.
18 - Neeraj Sanjay Kale <neeraj.sanjaykale@nxp.com>
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable()
51 /* De-assert active-low PLL reset. */ in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
61 return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL, in clk_pll_enable()
71 regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_disable()
[all …]
Dclk-hfpll.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
12 #include "clk-regmap.h"
13 #include "clk-hfpll.h"
23 struct hfpll_data const *hd = h->d; in __clk_hfpll_init_once()
24 struct regmap *regmap = h->clkr.regmap; in __clk_hfpll_init_once()
26 if (likely(h->init_done)) in __clk_hfpll_init_once()
30 if (hd->config_val) in __clk_hfpll_init_once()
31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
32 regmap_write(regmap, hd->m_reg, 0); in __clk_hfpll_init_once()
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
Dclk-pll.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
17 #include "clk-pll.h"
31 ret = regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_enable()
40 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_BYPASSNL, in clk_pll_enable()
47 * de-asserting the reset. Delay 10us just to be safe. in clk_pll_enable()
51 /* De-assert active-low PLL reset. */ in clk_pll_enable()
52 ret = regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_RESET_N, in clk_pll_enable()
61 return regmap_update_bits(pll->clkr.regmap, pll->mode_reg, PLL_OUTCTRL, in clk_pll_enable()
71 regmap_read(pll->clkr.regmap, pll->mode_reg, &val); in clk_pll_disable()
[all …]
Dclk-hfpll.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
12 #include "clk-regmap.h"
13 #include "clk-hfpll.h"
23 struct hfpll_data const *hd = h->d; in __clk_hfpll_init_once()
24 struct regmap *regmap = h->clkr.regmap; in __clk_hfpll_init_once()
26 if (likely(h->init_done)) in __clk_hfpll_init_once()
30 if (hd->config_val) in __clk_hfpll_init_once()
31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
32 regmap_write(regmap, hd->m_reg, 0); in __clk_hfpll_init_once()
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/kernel/linux/linux-5.10/drivers/gpu/drm/msm/hdmi/
Dhdmi_pll_8960.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
27 * configuration into common-clock-framework.
239 msm_writel(data, pll->mmio + reg); in pll_write()
244 return msm_readl(pll->mmio + reg); in pll_read()
249 return platform_get_drvdata(pll->pdev); in pll_get_phy()
266 /* Wait for a short time before de-asserting in hdmi_pll_enable()
269 * to assert and de-assert. in hdmi_pll_enable()
273 /* De-assert PLL S/W reset */ in hdmi_pll_enable()
282 * Wait for a short time before de-asserting to allow the hardware to in hdmi_pll_enable()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/msm/hdmi/
Dhdmi_pll_8960.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/clk-provider.h>
27 * configuration into common-clock-framework.
239 msm_writel(data, pll->mmio + reg); in pll_write()
244 return msm_readl(pll->mmio + reg); in pll_read()
249 return platform_get_drvdata(pll->pdev); in pll_get_phy()
266 /* Wait for a short time before de-asserting in hdmi_pll_enable()
269 * to assert and de-assert. in hdmi_pll_enable()
273 /* De-assert PLL S/W reset */ in hdmi_pll_enable()
282 * Wait for a short time before de-asserting to allow the hardware to in hdmi_pll_enable()
[all …]
/kernel/linux/linux-5.10/drivers/reset/
Dreset-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/reset-controller.h>
46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET); in brcmstb_reset_assert()
57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR); in brcmstb_reset_deassert()
58 /* Maximum reset delay after de-asserting a line and seeing block in brcmstb_reset_deassert()
73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) & in brcmstb_reset_status()
85 struct device *kdev = &pdev->dev; in brcmstb_reset_probe()
91 return -ENOMEM; in brcmstb_reset_probe()
94 priv->base = devm_ioremap_resource(kdev, res); in brcmstb_reset_probe()
95 if (IS_ERR(priv->base)) in brcmstb_reset_probe()
[all …]
/kernel/linux/linux-6.6/drivers/reset/
Dreset-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/reset-controller.h>
46 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_SET); in brcmstb_reset_assert()
57 writel_relaxed(SW_INIT_BIT(id), priv->base + off + SW_INIT_CLEAR); in brcmstb_reset_deassert()
58 /* Maximum reset delay after de-asserting a line and seeing block in brcmstb_reset_deassert()
73 return readl_relaxed(priv->base + off + SW_INIT_STATUS) & in brcmstb_reset_status()
85 struct device *kdev = &pdev->dev; in brcmstb_reset_probe()
91 return -ENOMEM; in brcmstb_reset_probe()
94 priv->base = devm_ioremap_resource(kdev, res); in brcmstb_reset_probe()
95 if (IS_ERR(priv->base)) in brcmstb_reset_probe()
[all …]
/kernel/linux/linux-6.6/drivers/remoteproc/
Dqcom_q6v5_adsp.c1 // SPDX-License-Identifier: GPL-2.0
126 struct device **devs = adsp->proxy_pds; in qcom_rproc_pds_attach()
135 if (dev->pm_domain) { in qcom_rproc_pds_attach()
144 if (num_pds > ARRAY_SIZE(adsp->proxy_pds)) in qcom_rproc_pds_attach()
145 return -E2BIG; in qcom_rproc_pds_attach()
150 ret = PTR_ERR(devs[i]) ? : -ENODATA; in qcom_rproc_pds_attach()
158 for (i--; i >= 0; i--) in qcom_rproc_pds_attach()
167 struct device *dev = adsp->dev; in qcom_rproc_pds_detach()
171 if (dev->pm_domain && pd_count) { in qcom_rproc_pds_detach()
198 for (i--; i >= 0; i--) { in qcom_rproc_pds_enable()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap2/
Dprminst44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "prcm-common.h"
23 #include "prm-regbits-44xx.h"
34 * omap_prm_base_init - Populates the prm partitions
75 /* Read-modify-write a register in PRM. Caller must lock */
90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of
97 * -EINVAL upon parameter error.
112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule
118 * IP. These modules may have multiple hard-reset lines that reset
120 * place the submodule into reset. Returns 0 upon success or -EINVAL
[all …]
Dprm2xxx_3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments, Inc.
18 #include "prm-regbits-24xx.h"
22 * omap2_prm_is_hardreset_asserted - read the HW reset line state of
31 * -EINVAL if called while running on a non-OMAP2/3 chip.
40 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
48 * IP. These modules may have multiple hard-reset lines that reset
50 * place the submodule into reset. Returns 0 upon success or -EINVAL
64 * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
75 * IP. These modules may have multiple hard-reset lines that reset
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap2/
Dprminst44xx.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include "prcm-common.h"
23 #include "prm-regbits-44xx.h"
34 * omap_prm_base_init - Populates the prm partitions
75 /* Read-modify-write a register in PRM. Caller must lock */
90 * omap4_prminst_is_hardreset_asserted - read the HW reset line state of
97 * -EINVAL upon parameter error.
112 * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule
118 * IP. These modules may have multiple hard-reset lines that reset
120 * place the submodule into reset. Returns 0 upon success or -EINVAL
[all …]
Dprm2xxx_3xxx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2010-2011 Texas Instruments, Inc.
18 #include "prm-regbits-24xx.h"
22 * omap2_prm_is_hardreset_asserted - read the HW reset line state of
31 * -EINVAL if called while running on a non-OMAP2/3 chip.
40 * omap2_prm_assert_hardreset - assert the HW reset line of a submodule
48 * IP. These modules may have multiple hard-reset lines that reset
50 * place the submodule into reset. Returns 0 upon success or -EINVAL
64 * omap2_prm_deassert_hardreset - deassert a submodule hardreset line and wait
75 * IP. These modules may have multiple hard-reset lines that reset
[all …]
Dprm33xx.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2011-2012 Texas Instruments Incorporated - https://www.ti.com/
16 #include "prm-regbits-33xx.h"
34 /* Read-modify-write a register in PRM. Caller must lock */
48 * am33xx_prm_is_hardreset_asserted - read the HW reset line state of
57 * -EINVAL upon parameter error.
72 * am33xx_prm_assert_hardreset - assert the HW reset line of a submodule
80 * IP. These modules may have multiple hard-reset lines that reset
82 * place the submodule into reset. Returns 0 upon success or -EINVAL
96 * am33xx_prm_deassert_hardreset - deassert a submodule hardreset line and
[all …]
/kernel/linux/linux-6.6/drivers/cpufreq/
Dgx-suspmod.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * (C) 2002 Hiroshi Miura <miura@da-cha.org>
10 * software is provided AS-IS with no warranties.
19 * Suspend Modulation works by asserting and de-asserting the SUSP# pin
20 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
28 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
35 * F_eff = Fgx * ----------------------
43 * on_duration = off_duration * (stock_freq - freq) / freq
46 * on_duration = DURATION - off_duration
48 *---------------------------------------------------------------------------
[all …]
/kernel/linux/linux-5.10/drivers/cpufreq/
Dgx-suspmod.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * (C) 2002 Hiroshi Miura <miura@da-cha.org>
10 * software is provided AS-IS with no warranties.
19 * Suspend Modulation works by asserting and de-asserting the SUSP# pin
20 * to CPU(GX1/GXLV) for configurable durations. When asserting SUSP#
28 * 32us intervals which the SUSP# pin is asserted(ON)/de-asserted(OFF)
35 * F_eff = Fgx * ----------------------
43 * on_duration = off_duration * (stock_freq - freq) / freq
46 * on_duration = DURATION - off_duration
48 *---------------------------------------------------------------------------
[all …]
/kernel/linux/linux-5.10/drivers/remoteproc/
Dqcom_q6v5_adsp.c1 // SPDX-License-Identifier: GPL-2.0
108 val = readl(adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
110 writel(val, adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
112 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks); in qcom_adsp_shutdown()
115 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
116 adsp->halt_lpass + LPASS_PWR_ON_REG, &val); in qcom_adsp_shutdown()
120 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
121 adsp->halt_lpass + LPASS_MASTER_IDLE_REG, in qcom_adsp_shutdown()
126 regmap_write(adsp->halt_map, in qcom_adsp_shutdown()
127 adsp->halt_lpass + LPASS_HALTREQ_REG, 1); in qcom_adsp_shutdown()
[all …]
/kernel/linux/linux-6.6/drivers/clk/
Dclk-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
7 * Sergej Sawazki <ce3a@gmx.de>
12 #include <linux/clk-provider.h>
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
32 * struct clk_gpio - gpio gated clock
34 * @hw: handle between common and hardware-specific interfaces
[all …]
/kernel/linux/linux-5.10/drivers/clk/
Dclk-gpio.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2013 - 2014 Texas Instruments Incorporated - https://www.ti.com
7 * Sergej Sawazki <ce3a@gmx.de>
12 #include <linux/clk-provider.h>
25 * prepare - clk_(un)prepare only ensures parent is (un)prepared
26 * enable - clk_enable and clk_disable are functional & control gpio
27 * rate - inherits rate from parent. No clk_set_rate support
28 * parent - fixed parent. No clk_set_parent support
32 * struct clk_gpio - gpio gated clock
34 * @hw: handle between common and hardware-specific interfaces
[all …]

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