| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/pci/ |
| D | socionext,uniphier-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/socionext,uniphier-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 UniPhier PCIe host controller is based on the Synopsys DesignWare
13 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
19 - $ref: /schemas/pci/snps,dw-pcie.yaml#
24 - socionext,uniphier-pcie
30 reg-names:
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| D | snps,dw-pcie-common.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jingoo Han <jingoohan1@gmail.com>
11 - Gustavo Pimentel <gustavo.pimentel@synopsys.com>
23 Interface - DBI. In accordance with the reference manual the register
24 configuration space belongs to the Configuration-Dependent Module (CDM)
25 and is split up into several sub-parts Standard PCIe configuration
26 space, Port Logic Registers (PL), Shadow Config-space Registers,
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| D | nvidia,tegra194-pcie.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/nvidia,tegra194-pcie.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra194 (and later) PCIe controller (Synopsys DesignWare Core based)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
12 - Vidya Sagar <vidyas@nvidia.com>
15 This PCIe controller is based on the Synopsys DesignWare PCIe IP and thus
16 inherits all the common properties defined in snps,dw-pcie.yaml. Some of
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| /kernel/linux/linux-6.6/drivers/usb/phy/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
32 tristate "Keystone USB PHY Driver"
36 Enable this to support Keystone USB phy. This driver provides
37 interface to interact with USB 2.0 and USB 3.0 PHY that is part
42 depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, NOP can't be built-in
46 built-in with usb ip or which are autonomous and doesn't require any
47 phy programming such as ISP1x04 etc.
53 tristate "AM335x USB PHY Driver"
60 This driver provides PHY support for that phy which part for the
71 UTMI PHY is embedded in OMAP4430. The internal PHY configurations APIs
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/pci/ |
| D | uniphier-pcie.txt | 6 UniPhier PCIe host controller is based on the Synopsys DesignWare PCI core.
9 Documentation/devicetree/bindings/pci/designware-pcie.txt.
12 - compatible: Should be "socionext,uniphier-pcie".
13 - reg: Specifies offset and length of the register set for the device.
14 According to the reg-names, appropriate register sets are required.
15 - reg-names: Must include the following entries:
16 "dbi" - controller configuration registers
17 "link" - SoC-specific glue layer registers
18 "config" - PCIe configuration space
19 "atu" - iATU registers for DWC version 4.80 or later
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| /kernel/linux/linux-5.10/drivers/usb/phy/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0
39 USB-On-The-Go transceiver working with the OMAP OTG controller.
45 will be called phy-isp1301-omap.
48 tristate "Keystone USB PHY Driver"
52 Enable this to support Keystone USB phy. This driver provides
53 interface to interact with USB 2.0 and USB 3.0 PHY that is part
58 depends on USB_GADGET || !USB_GADGET # if USB_GADGET=m, NOP can't be built-in
62 built-in with usb ip or which are autonomous and doesn't require any
63 phy programming such as ISP1x04 etc.
69 tristate "AM335x USB PHY Driver"
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
152 init_data->num_virtual_links, dc); in dc_create_resource_pool()
156 init_data->num_virtual_links, dc); in dc_create_resource_pool()
160 init_data->num_virtual_links, dc); in dc_create_resource_pool()
165 init_data->num_virtual_links, dc); in dc_create_resource_pool()
169 init_data->num_virtual_links, dc); in dc_create_resource_pool()
173 init_data->num_virtual_links, dc); in dc_create_resource_pool()
177 init_data->num_virtual_links, dc); in dc_create_resource_pool()
181 init_data->num_virtual_links, dc, in dc_create_resource_pool()
182 init_data->asic_id); in dc_create_resource_pool()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_resource.c | 2 * Copyright 2012-15 Advanced Micro Devices, Inc.
86 #define UNABLE_TO_SPLIT -1
206 init_data->num_virtual_links, dc); in dc_create_resource_pool()
210 init_data->num_virtual_links, dc); in dc_create_resource_pool()
214 init_data->num_virtual_links, dc); in dc_create_resource_pool()
219 init_data->num_virtual_links, dc); in dc_create_resource_pool()
223 init_data->num_virtual_links, dc); in dc_create_resource_pool()
227 init_data->num_virtual_links, dc); in dc_create_resource_pool()
231 init_data->num_virtual_links, dc); in dc_create_resource_pool()
235 init_data->num_virtual_links, dc, in dc_create_resource_pool()
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| /kernel/linux/linux-6.6/drivers/pci/controller/dwc/ |
| D | pci-keystone.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2014 Texas Instruments., Ltd.
8 * Author: Murali Karicheri <m-karicheri2@ti.com>
9 * Implementation based on pci-exynos.c and pcie-designware.c
24 #include <linux/phy/phy.h>
31 #include "pcie-designware.h"
59 #define PCIE_LEGACY_IRQ_ENABLE_SET(n) (0x188 + (0x10 * ((n) - 1)))
60 #define PCIE_LEGACY_IRQ_ENABLE_CLR(n) (0x18c + (0x10 * ((n) - 1)))
84 #define ERR_NONFATAL BIT(2) /* Non-fatal error */
110 #define to_keystone_pcie(x) dev_get_drvdata((x)->dev)
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dcn32/ |
| D | dcn32_hwseq.c | 57 hws->ctx
59 hws->regs->reg
61 dc->ctx->logger
66 hws->shifts->field_name, hws->masks->field_name
77 if (hws->ctx->dc->debug.disable_dsc_power_gate) in dcn32_dsc_pg_control()
80 if (!hws->ctx->dc->debug.enable_double_buffered_dsc_pg_support) in dcn32_dsc_pg_control()
165 if (hws->ctx->dc->debug.disable_hubp_power_gate) in dcn32_hubp_pg_control()
198 /* First, check no-memory-request case */ in dcn32_check_no_memory_request_for_cab()
199 for (i = 0; i < dc->current_state->stream_count; i++) { in dcn32_check_no_memory_request_for_cab()
200 if ((dc->current_state->stream_status[i].plane_count) && in dcn32_check_no_memory_request_for_cab()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 2 * Copyright 2012-14 Advanced Micro Devices, Inc.
85 // for example, 1080p -> 8K is 4.0, or 4000 raw value
93 // for example, 8K -> 1080p is 0.25, or 250 raw value
115 // input lut is different than most LUTs, just plain 256-entry lookup
124 // it may be shared with MPC - check MPC:shared_3d_lut flag
231 * The update type is determined at the very beginning of the function based
241 * re-programming however do not affect bandwidth consumption or clock
244 * updates, viewport offset changes, recout size changes and pixel depth changes.
249 * end related. Any time viewport dimensions, recout dimensions, scaling ratios or
331 DCN_PWR_STATE_UNKNOWN = -1,
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/ |
| D | dc.h | 2 * Copyright 2012-2023 Advanced Micro Devices, Inc.
99 // for example, 1080p -> 8K is 4.0, or 4000 raw value
107 // for example, 8K -> 1080p is 0.25, or 250 raw value
119 * DOC: color-management-caps
124 * abstracted HW. DCE 5-12 had almost no important changes, but starting with
127 * decide mapping to HW block based on logical capabilities.
131 * struct rom_curve_caps - predefined transfer function caps for degamma and regamma
147 * struct dpp_color_caps - color pipeline capabilities for display pipe and
152 * just plain 256-entry lookup
161 * @dgam_rom_for_yuv: pre-defined degamma LUT for YUV planes
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/ |
| D | exynos5433.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
8 * Exynos5433 based board files can include this file and provide
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
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| /kernel/linux/patches/linux-5.10/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
3 --- a/arch/arm/Kconfig
5 @@ -322,7 +322,7 @@ config ARCH_MULTIPLATFORM
9 - select AUTO_ZRELADDR
14 @@ -650,6 +650,8 @@ source "arch/arm/mach-highbank/Kconfig"
16 source "arch/arm/mach-hisi/Kconfig"
18 +source "arch/arm/mach-hibvt/Kconfig"
20 source "arch/arm/mach-imx/Kconfig"
22 source "arch/arm/mach-integrator/Kconfig"
23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
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| /kernel/linux/patches/linux-4.19/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
3 --- a/arch/arm/Kconfig
5 @@ -330,7 +330,7 @@ config ARCH_MULTIPLATFORM
9 - select AUTO_ZRELADDR
14 @@ -751,6 +751,8 @@ source "arch/arm/mach-highbank/Kconfig"
16 source "arch/arm/mach-hisi/Kconfig"
18 +source "arch/arm/mach-hibvt/Kconfig"
20 source "arch/arm/mach-imx/Kconfig"
22 source "arch/arm/mach-integrator/Kconfig"
23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| D | intel_display.c | 2 * Copyright © 2006-2007 Intel Corporation
29 #include <linux/intel-iommu.h>
32 #include <linux/dma-resv.h>
208 drm_WARN(&dev_priv->drm, (val & CCK_FREQUENCY_STATUS) != in vlv_get_cck_clock()
222 if (dev_priv->hpll_freq == 0) in vlv_get_cck_clock_hpll()
223 dev_priv->hpll_freq = vlv_get_hpll_vco(dev_priv); in vlv_get_cck_clock_hpll()
225 hpll = vlv_get_cck_clock(dev_priv, name, reg, dev_priv->hpll_freq); in vlv_get_cck_clock_hpll()
237 dev_priv->czclk_freq = vlv_get_cck_clock_hpll(dev_priv, "czclk", in intel_update_czclk()
240 drm_dbg(&dev_priv->drm, "CZ clock rate: %d kHz\n", in intel_update_czclk()
241 dev_priv->czclk_freq); in intel_update_czclk()
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/ |
| D | 0001_linux_arch.patch | 7 Change-Id: I8c7b42f8858212fb4b2d56a871d3f4d5afc73954
9 diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
11 --- a/arch/arm64/Kconfig
13 @@ -183,7 +183,6 @@ config ARM64
17 - select HOLES_IN_ZONE
21 @@ -1023,6 +1022,9 @@ config NEED_PER_CPU_EMBED_FIRST_CHUNK
31 @@ -1148,7 +1150,7 @@ config XEN
35 - int
40 @@ -1182,15 +1184,6 @@ config UNMAP_KERNEL_AT_EL0
44 -config MITIGATE_SPECTRE_BRANCH_HISTORY
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| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0038_linux_drivers_mxc.patch | 7 Change-Id: I2f6375e746087a874cbea0a4240e92abfded3358
9 diff --git a/drivers/mxc/Kconfig b/drivers/mxc/Kconfig
12 --- /dev/null
14 @@ -0,0 +1,38 @@
34 +source "drivers/mxc/gpu-viv/Kconfig"
53 diff --git a/drivers/mxc/Makefile b/drivers/mxc/Makefile
56 --- /dev/null
58 @@ -0,0 +1,10 @@
59 +obj-$(CONFIG_MXC_GPU_VIV) += gpu-viv/
60 +obj-$(CONFIG_MXC_SIM) += sim/
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