| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/TextAPI/MachO/ |
| D | Architecture.h | 1 //===- llvm/TextAPI/MachO/Architecture.h - Architecture ---------*- C++ -*-===//
9 // Defines the architecture enum and helper methods.
23 /// Defines the architecture slices that are supported by Text-based Stub files.
24 enum Architecture : uint8_t { enum
26 #include "llvm/TextAPI/MachO/Architecture.def"
31 /// Convert a CPU Type and Subtype pair to an architecture slice.
32 Architecture getArchitectureFromCpuType(uint32_t CPUType, uint32_t CPUSubType);
34 /// Convert a name to an architecture slice.
35 Architecture getArchitectureFromName(StringRef Name);
37 /// Convert an architecture slice to a string.
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| D | ArchitectureSet.h | 9 // Defines the architecture set.
17 #include "llvm/TextAPI/MachO/Architecture.h"
37 ArchitectureSet(Architecture Arch) : ArchitectureSet() { set(Arch); } in ArchitectureSet()
38 ArchitectureSet(const std::vector<Architecture> &Archs);
40 void set(Architecture Arch) { in set()
46 void clear(Architecture Arch) { ArchSet &= ~(1U << static_cast<int>(Arch)); } in clear()
48 bool has(Architecture Arch) const { in has()
68 : public std::iterator<std::forward_iterator_tag, Architecture, size_t> {
91 Architecture operator*() const { return static_cast<Architecture>(Index); }
124 ArchitectureSet &operator|=(const Architecture &Arch) {
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| D | Target.h | 14 #include "llvm/TextAPI/MachO/Architecture.h"
27 Target(Architecture Arch, PlatformKind Platform) in Target()
36 Architecture Arch;
52 inline bool operator==(const Target &LHS, const Architecture &RHS) {
56 inline bool operator!=(const Target &LHS, const Architecture &RHS) {
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/TextAPI/MachO/ |
| D | Architecture.cpp | 1 //===- Architecture.cpp ---------------------------------------------------===//
9 // Implements the architecture helper functions.
13 #include "llvm/TextAPI/MachO/Architecture.h"
20 Architecture getArchitectureFromCpuType(uint32_t CPUType, uint32_t CPUSubType) { in getArchitectureFromCpuType()
25 #include "llvm/TextAPI/MachO/Architecture.def" in getArchitectureFromCpuType()
31 Architecture getArchitectureFromName(StringRef Name) { in getArchitectureFromName()
32 return StringSwitch<Architecture>(Name) in getArchitectureFromName()
34 #include "llvm/TextAPI/MachO/Architecture.def" in getArchitectureFromName()
39 StringRef getArchitectureName(Architecture Arch) { in getArchitectureName()
44 #include "llvm/TextAPI/MachO/Architecture.def" in getArchitectureName()
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| D | ArchitectureSet.cpp | 9 // Implements the architecture set.
18 ArchitectureSet::ArchitectureSet(const std::vector<Architecture> &Archs) in ArchitectureSet()
51 ArchitectureSet::operator std::vector<Architecture>() const { in operator std::vector<Architecture>()
52 std::vector<Architecture> archs; in operator std::vector<Architecture>()
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| D | TextStubCommon.cpp | 124 #include "llvm/TextAPI/MachO/Architecture.def" in bitset()
128 void ScalarTraits<Architecture>::output(const Architecture &Value, void *, in output()
132 StringRef ScalarTraits<Architecture>::input(StringRef Scalar, void *, in input()
133 Architecture &Value) { in input()
137 QuotingType ScalarTraits<Architecture>::mustQuote(StringRef) { in mustQuote()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/fuchsia/include/llvm/Config/ |
| D | llvm-config.h | 36 #error "unknown architecture"
51 #error "unknown architecture"
54 /* LLVM architecture name for the native architecture, if available */
66 #error "unknown architecture"
81 #error "unknown architecture"
96 #error "unknown architecture"
111 #error "unknown architecture"
126 #error "unknown architecture"
141 #error "unknown architecture"
156 #error "unknown architecture"
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/darwin/include/llvm/Config/ |
| D | llvm-config.h | 36 #error "unknown architecture"
51 #error "unknown architecture"
54 /* LLVM architecture name for the native architecture, if available */
66 #error "unknown architecture"
81 #error "unknown architecture"
96 #error "unknown architecture"
111 #error "unknown architecture"
126 #error "unknown architecture"
141 #error "unknown architecture"
156 #error "unknown architecture"
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/linux/include/llvm/Config/ |
| D | llvm-config.h | 46 #error "unknown architecture"
71 #error "unknown architecture"
74 /* LLVM architecture name for the native architecture, if available */
86 #error "unknown architecture"
101 #error "unknown architecture"
116 #error "unknown architecture"
131 #error "unknown architecture"
146 #error "unknown architecture"
161 #error "unknown architecture"
176 #error "unknown architecture"
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/windows/include/llvm/Config/ |
| D | llvm-config.h | 44 #error "unknown architecture"
67 #error "unknown architecture"
70 /* LLVM architecture name for the native architecture, if available */
82 #error "unknown architecture"
97 #error "unknown architecture"
112 #error "unknown architecture"
127 #error "unknown architecture"
142 #error "unknown architecture"
157 #error "unknown architecture"
172 #error "unknown architecture"
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/android/include/llvm/Config/ |
| D | llvm-config.h | 40 #error "unknown architecture"
59 #error "unknown architecture"
62 /* LLVM architecture name for the native architecture, if available */
74 #error "unknown architecture"
89 #error "unknown architecture"
104 #error "unknown architecture"
119 #error "unknown architecture"
134 #error "unknown architecture"
149 #error "unknown architecture"
164 #error "unknown architecture"
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARM.td | 323 "Model MVE instructions as a 1 beat per tick architecture">;
326 "Model MVE instructions as a 2 beats per tick architecture">;
329 "Model MVE instructions as a 4 beats per tick architecture">;
434 // ARM architecture class
620 class Architecture<string fname, string aname, list<SubtargetFeature> features>
622 !strconcat(aname, " architecture"), features>;
632 def ARMv2 : Architecture<"armv2", "ARMv2", []>;
634 def ARMv2a : Architecture<"armv2a", "ARMv2a", []>;
636 def ARMv3 : Architecture<"armv3", "ARMv3", []>;
638 def ARMv3m : Architecture<"armv3m", "ARMv3m", []>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
| D | Triple.h | 27 /// ARCHITECTURE-VENDOR-OPERATING_SYSTEM
29 /// ARCHITECTURE-VENDOR-OPERATING_SYSTEM-ENVIRONMENT
296 /// getArch - Get the parsed architecture type of this triple.
370 /// getArchName - Get the architecture (first) component of the
394 /// Test whether the architecture is 64-bit
403 /// Test whether the architecture is 32-bit
408 /// Test whether the architecture is 16-bit
758 /// setArch - Set the architecture (first) component of the triple
780 /// setArchName - Set the architecture (first) component of the
804 /// Form a triple with a 32-bit variant of the current architecture.
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonDepArch.td | 11 …tFeature<"v66", "HexagonArchVersion", "Hexagon::ArchEnum::V66", "Enable Hexagon V66 architecture">;
13 …tFeature<"v65", "HexagonArchVersion", "Hexagon::ArchEnum::V65", "Enable Hexagon V65 architecture">;
15 …tFeature<"v62", "HexagonArchVersion", "Hexagon::ArchEnum::V62", "Enable Hexagon V62 architecture">;
17 …tFeature<"v60", "HexagonArchVersion", "Hexagon::ArchEnum::V60", "Enable Hexagon V60 architecture">;
19 …tFeature<"v55", "HexagonArchVersion", "Hexagon::ArchEnum::V55", "Enable Hexagon V55 architecture">;
21 …rgetFeature<"v5", "HexagonArchVersion", "Hexagon::ArchEnum::V5", "Enable Hexagon V5 architecture">;
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| /third_party/mindspore/mindspore-src/source/mindspore/lite/tools/converter/config_parser/ |
| D | cpu_option_param_parser.cc | 23 if (cpu_option_string.architecture.empty() || cpu_option_string.instruction.empty()) { in ParseCpuOptionCfg()
27 if (cpu_option_string.architecture != "ARM64") { in ParseCpuOptionCfg()
28 …S_LOG(ERROR) << "cpu instruction only supported ARM64. But get " << cpu_option_string.architecture; in ParseCpuOptionCfg()
37 cpu_option_cfg->architecture = cpu_option_string.architecture; in ParseCpuOptionCfg()
|
| /third_party/opencl-headers/tests/ |
| D | test_headers.c | 63 printf( "__cl_char2 SIMD vectors not supported on this architecture.\n" ); in test_char()
70 printf( "__cl_char4 SIMD vectors not supported on this architecture.\n" ); in test_char()
77 printf( "__cl_char8 SIMD vectors not supported on this architecture.\n" ); in test_char()
85 printf( "__cl_char16 SIMD vectors not supported on this architecture.\n" ); in test_char()
123 printf( "__cl_uchar2 SIMD vectors not supported on this architecture.\n" ); in test_uchar()
130 printf( "__cl_uchar4 SIMD vectors not supported on this architecture.\n" ); in test_uchar()
137 printf( "__cl_uchar8 SIMD vectors not supported on this architecture.\n" ); in test_uchar()
145 printf( "__cl_uchar16 SIMD vectors not supported on this architecture.\n" ); in test_uchar()
183 printf( "__cl_short2 SIMD vectors not supported on this architecture.\n" ); in test_short()
190 printf( "__cl_short4 SIMD vectors not supported on this architecture.\n" ); in test_short()
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| /third_party/icu/vendor/double-conversion/upstream/ |
| D | Changelog | 9 Add support of Synopsys ARC64 architecture.
22 Loongarch is a RISC-style command system architecture.
23 Add support for loongarch architecture.
29 Add support for xtensa architecture.
30 Add support for nios2 architecture.
37 Add support for e2k architecture. Thanks to Michael Shigorin.
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/MCDisassembler/ |
| D | Disassembler.h | 11 // individual instructions according to a given architecture and disassembly
61 // The assembly information for the target architecture.
63 // The register information for the target architecture.
65 // The subtarget information for the target architecture.
67 // The instruction information for the target architecture.
71 // The disassembler for the target architecture.
73 // The instruction printer for the target architecture.
|
| /third_party/elfio/c_wrapper/ |
| D | elf_types_c_wrapper.hpp | 180 #define EM_XTENSA 94 // Tensilica Xtensa Architecture
225 #define EM_LATTICEMICO32 138 // RISC processor for Lattice FPGA architecture
250 #define EM_TRIMEDIA 163 // NXP Semiconductors TriMedia architecture family
260 #define EM_CRAYNV2 172 // Cray Inc. NV2 vector architecture
262 #define EM_METAG 174 // Imagination Technologies META processor architecture
263 #define EM_MCST_ELBRUS 175 // MCST Elbrus general purpose hardware architecture
275 #define EM_TILE64 187 // Tilera TILE64 multicore architecture family
276 #define EM_TILEPRO 188 // Tilera TILEPro multicore architecture family
278 #define EM_CUDA 190 // NVIDIA CUDA architecture
279 #define EM_TILEGX 191 // Tilera TILE-Gx multicore architecture family
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| /third_party/ltp/include/lapi/ |
| D | shmbuf.h | 20 * The shmid64_ds structure for the MIPS architecture.
66 * The shmid64_ds structure for parisc architecture.
102 * The shmid64_ds structure for PPC architecture.
140 * The shmid64_ds structure for sparc architecture.
176 * The shmid64_ds structure for x86 architecture with x32 ABI.
201 * The shmid64_ds structure for Xtensa architecture.
234 * shmid64_ds was originally meant to be architecture specific, but
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| D | sembuf.h | 20 * The semid64_ds structure for the MIPS architecture.
52 * The semid64_ds structure for parisc architecture.
80 * The semid64_ds structure for PPC architecture.
109 * The semid64_ds structure for sparc architecture.
138 * The semid64_ds structure for x86 architecture.
198 * semid64_ds was originally meant to be architecture specific, but
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| D | msgbuf.h | 22 * The msqid64_ds structure for the MIPS architecture.
86 * The msqid64_ds structure for parisc architecture, copied from sparc.
123 * The msqid64_ds structure for the PowerPC architecture.
157 * The msqid64_ds structure for sparc64 architecture.
193 * The msqid64_ds structure for x86 architecture with x32 ABI.
219 * The msqid64_ds structure for the Xtensa architecture.
266 * msqid64_ds was originally meant to be architecture specific, but
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| /third_party/libsnd/cmake/ |
| D | CheckCPUArch.cmake | 3 message (STATUS "Check CPU architecture is ${ARCH}")
9 message (STATUS "Check CPU architecture is ${ARCH} - yes")
12 message (STATUS "Check CPU architecture is ${ARCH} - no")
|
| /third_party/lame/ |
| D | INSTALL.configure | 71 same time, by placing the object files for each architecture in their
79 variable, you have to compile the package for one architecture at a time
81 one architecture, use `make distclean' before reconfiguring for another
82 architecture.
93 architecture-specific files and architecture-independent files. If you
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| /third_party/curl/projects/ |
| D | README.md | 52 | |_<architecture>
60 | |_<architecture>
66 |_<architecture>
142 - `<architecture>` - The platform architecture (For example: Win32, Win64)
|