Home
last modified time | relevance | path

Searched +full:ave +full:- +full:ctrl (Results 1 – 25 of 72) sorted by relevance

123

/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dmxs-lradc.txt4 - compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc"
6 - reg: Address and length of the register set for the device
7 - interrupts: Should contain the LRADC interrupts
10 - fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen
14 - fsl,ave-ctrl: number of samples per direction to calculate an average value.
16 - fsl,ave-delay: delay between consecutive samples. Allowed value is
17 2 ... 2048. It is used if 'fsl,ave-ctrl' > 1, counts at
19 - fsl,settling: delay between plate switch to next sample. Allowed value is
26 compatible = "fsl,imx23-lradc";
29 fsl,lradc-touchscreen-wires = <4>;
[all …]
Dst,stmpe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Linus Walleij <linus.walleij@linaro.org>
18 - $ref: /schemas/spi/spi-peripheral-props.yaml#
23 - st,stmpe601
24 - st,stmpe801
25 - st,stmpe811
26 - st,stmpe1600
27 - st,stmpe1601
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/
Dmxs-lradc.txt4 - compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc"
6 - reg: Address and length of the register set for the device
7 - interrupts: Should contain the LRADC interrupts
10 - fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen
14 - fsl,ave-ctrl: number of samples per direction to calculate an average value.
16 - fsl,ave-delay: delay between consecutive samples. Allowed value is
17 2 ... 2048. It is used if 'fsl,ave-ctrl' > 1, counts at
19 - fsl,settling: delay between plate switch to next sample. Allowed value is
26 compatible = "fsl,imx23-lradc";
29 fsl,lradc-touchscreen-wires = <4>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/input/touchscreen/
Dstmpe.txt2 ----------------
5 - compatible: "st,stmpe-ts"
8 - st,ave-ctrl : Sample average control
9 0 -> 1 sample
10 1 -> 2 samples
11 2 -> 4 samples
12 3 -> 8 samples
13 - st,touch-det-delay : Touch detect interrupt delay (recommended is 3)
14 0 -> 10 us
15 1 -> 50 us
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/intel/socfpga/
Dsocfpga_cyclone5_mcvevk.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "denx,mcvevk", "altr,socfpga-cyclone5", "altr,socfpga";
14 stmpe-i2c0 = &stmpe1;
18 stdout-path = "serial0:115200n8";
31 phy-mode = "rgmii";
49 clock-frequency = <100000>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 irq-gpio = <&portb 28 0x4>; /* GPIO 57, trig. level HI */
61 compatible = "st,stmpe-ts";
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dsocfpga_cyclone5_mcvevk.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "denx,mcvevk", "altr,socfpga-cyclone5", "altr,socfpga";
14 stmpe-i2c0 = &stmpe1;
18 stdout-path = "serial0:115200n8";
31 phy-mode = "rgmii";
49 clock-frequency = <100000>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 irq-gpio = <&portb 28 0x4>; /* GPIO 57, trig. level HI */
61 compatible = "st,stmpe-ts";
[all …]
Dimx53-m53.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
10 compatible = "aries,imx53-m53", "denx,imx53-m53", "fsl,imx53";
19 compatible = "simple-bus";
20 #address-cells = <1>;
21 #size-cells = <0>;
24 compatible = "regulator-fixed";
26 regulator-name = "3P2V";
27 regulator-min-microvolt = <3200000>;
28 regulator-max-microvolt = <3200000>;
29 regulator-always-on;
[all …]
Dspear1310-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1310-evb", "st,spear1310";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
63 smi-pmx {
127 label = "u-boot";
149 compatible = "gpio-keys";
[all …]
Dimx28-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
10 compatible = "fsl,imx28-evk", "fsl,imx28";
18 reg_3p3v: regulator-3p3v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P3V";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-always-on;
26 reg_vddio_sd0: regulator-vddio-sd0 {
[all …]
Dspear1340-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1340-evb", "st,spear1340";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
47 spdif-in {
51 spdif-out {
59 smi-pmx {
[all …]
Dspear320-hmi.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear320-hmi", "st,spear320";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 st,pinmux-mode = <4>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
107 label = "u-boot";
129 compatible = "gpio-keys";
[all …]
Dstm32f429-disco.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53 #include <dt-bindings/gpio/gpio.h>
56 model = "STMicroelectronics STM32F429i-DISCO board";
57 compatible = "st,stm32f429i-disco", "st,stm32f429";
[all …]
Dimx6ul-phytec-segin.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 model = "PHYTEC phyBOARD-Segin i.MX6 UltraLite";
9 compatible = "phytec,imx6ul-pbacd-10", "phytec,imx6ul-pcl063", "fsl,imx6ul";
16 reg_sound_1v8: regulator-1v8 {
17 compatible = "regulator-fixed";
18 regulator-name = "i2s-audio-1v8";
19 regulator-min-microvolt = <1800000>;
20 regulator-max-microvolt = <1800000>;
24 reg_sound_3v3: regulator-3v3 {
25 compatible = "regulator-fixed";
[all …]
Dr8a7745-iwg22d-sodimm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1E SODIMM carrier board
9 * SSI-SGTL5000
31 /dts-v1/;
32 #include "r8a7745-iwg22m.dtsi"
33 #include <dt-bindings/pwm/pwm.h>
36 model = "iWave Systems RainboW-G22D-SODIMM board based on RZ/G1E";
47 stdout-path = "serial3:115200n8";
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-omap1/
Dcommon.h23 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <linux/platform_data/i2c-omap.h>
58 unsigned int ctrl);
66 return -ENODEV; in omap_32k_timer_init()
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/imx/
Dimx53-m53.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
10 compatible = "aries,imx53-m53", "denx,imx53-m53", "fsl,imx53";
18 reg_3p2v: regulator-3p2v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P2V";
21 regulator-min-microvolt = <3200000>;
22 regulator-max-microvolt = <3200000>;
23 regulator-always-on;
26 reg_backlight: regulator-backlight {
27 compatible = "regulator-fixed";
[all …]
Dimx6ul-phytec-segin-peb-av-02.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
9 backlight_lcd: backlight-lcd {
10 compatible = "pwm-backlight";
11 brightness-levels = <0 4 8 16 32 64 128 255>;
12 default-brightness-level = <5>;
13 power-supply = <&reg_backlight_en>;
18 lcd_panel: lcd-panel {
25 remote-endpoint = <&lcdif_parallel_out>;
30 reg_backlight_en: regulator-backlight-en {
31 compatible = "regulator-fixed";
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-omap1/
Dcommon.h23 * 675 Mass Ave, Cambridge, MA 02139, USA.
29 #include <linux/platform_data/i2c-omap.h>
86 unsigned int ctrl);
94 return -ENODEV; in omap_32k_timer_init()
/kernel/linux/linux-6.6/arch/arm/boot/dts/nxp/mxs/
Dimx28-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
5 /dts-v1/;
10 compatible = "fsl,imx28-evk", "fsl,imx28";
18 reg_3p3v: regulator-3p3v {
19 compatible = "regulator-fixed";
20 regulator-name = "3P3V";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-always-on;
26 reg_vddio_sd0: regulator-vddio-sd0 {
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/st/
Dspear1310-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1310-evb", "st,spear1310";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
63 smi-pmx {
127 label = "u-boot";
149 compatible = "gpio-keys";
[all …]
Dspear1340-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1340-evb", "st,spear1340";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
47 spdif-in {
51 spdif-out {
59 smi-pmx {
[all …]
Dspear320-hmi.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear320-hmi", "st,spear320";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 st,pinmux-mode = <4>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
107 label = "u-boot";
129 compatible = "gpio-keys";
[all …]
Dstm32f429-disco.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53 #include <dt-bindings/gpio/gpio.h>
56 model = "STMicroelectronics STM32F429i-DISCO board";
57 compatible = "st,stm32f429i-disco", "st,stm32f429";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/renesas/
Dr8a7745-iwg22d-sodimm.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the iWave-RZG1E SODIMM carrier board
9 * SSI-SGTL5000
31 /dts-v1/;
32 #include "r8a7745-iwg22m.dtsi"
33 #include <dt-bindings/pwm/pwm.h>
36 model = "iWave Systems RainboW-G22D-SODIMM board based on RZ/G1E";
47 stdout-path = "serial3:115200n8";
51 compatible = "fixed-clock";
52 #clock-cells = <0>;
[all …]
/kernel/linux/linux-5.10/include/clocksource/
Dtimer-ti-dm.h2 * OMAP Dual-Mode Timers
4 * Copyright (C) 2010 Texas Instruments Incorporated - https://www.ti.com/
30 * 675 Mass Ave, Cambridge, MA 02139, USA.
140 * These registers are offsets from timer->iobase.
156 * These registers are offsets from timer->func_base. The func_base
175 #define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */
259 while (readl_relaxed(timer->pend) & (reg >> WPSHIFT)) in __omap_dm_timer_read()
262 return readl_relaxed(timer->func_base + (reg & 0xff)); in __omap_dm_timer_read()
269 while (readl_relaxed(timer->pend) & (reg >> WPSHIFT)) in __omap_dm_timer_write()
272 writel_relaxed(val, timer->func_base + (reg & 0xff)); in __omap_dm_timer_write()
[all …]

123