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/arkcompiler/runtime_core/static_core/plugins/ets/templates/stdlib/
DDataView.sts.j279 {%- for bit in [8, 16, 32, 64] %}
81 {%- if mode != "Float" or bit >= 32 %}
82 // === {{mode}}{{bit}} ===
83 {%- set impls = ['Little', 'Big'] if bit != 8 else ['Big'] %}
95 … {%- set methodName = ('Big' if bit == 64 and mode != 'Float' else '') + mode + '{}'.format(bit) %}
102 public get{{methodName}}(byteOffset: int): {{type2name[bit]}} {
110 public set{{methodName}}(byteOffset: int, value: {{type2name[bit]}}): void {
114 {%- if bit == 8 %}
121 public get{{methodName}}(byteOffset: number): {{type2nameCompat[bit]}} {
129 public set{{methodName}}(byteOffset: number, value: {{type2nameCompat[bit]}}): void {
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/arkcompiler/runtime_core/libpandabase/utils/
Dregmask.h90 constexpr bool Test(size_t bit) const in Test() argument
92 ASSERT(bit < Size()); in Test()
93 return ((value_ >> static_cast<ValueType>(bit)) & 1U) != 0; in Test()
105 constexpr void Set(size_t bit) in Set() argument
107 ASSERT(bit < Size()); in Set()
108 value_ |= (1U << bit); in Set()
111 constexpr void Set(size_t bit, bool value) in Set() argument
113 ASSERT(bit < Size()); in Set()
115 Set(bit); in Set()
117 Reset(bit); in Set()
[all …]
Dbit_field.h53 * Make BitField type that follows right after current bit range.
68 * Make Flag field that follows right after current bit range.
75 * Return maximum value that fits bit range [START_BIT : START_BIT+END_BIT]
83 * Return mask of bit range, f.e. 0b1110 for BitField<T, 1, 3>
91 * Check if given value fits into the bit field
99 * Set 'value' to current bit range [START_BIT : START_BIT+END_BIT] within the 'stor' parameter.
109 * Return bit range [START_BIT : START_BIT+END_BIT] value from given integer 'value'
117 * Encode 'value' to current bit range [START_BIT : START_BIT+END_BIT] and return it
126 * Update 'value' to current bit range [START_BIT : START_BIT+END_BIT] and return it
/arkcompiler/runtime_core/static_core/libpandabase/utils/
Dregmask.h90 constexpr bool Test(size_t bit) const in Test() argument
92 ASSERT(bit < Size()); in Test()
93 return ((value_ >> static_cast<ValueType>(bit)) & 1U) != 0; in Test()
105 constexpr void Set(size_t bit) in Set() argument
107 ASSERT(bit < Size()); in Set()
108 value_ |= (1U << bit); in Set()
111 constexpr void Set(size_t bit, bool value) in Set() argument
113 ASSERT(bit < Size()); in Set()
115 Set(bit); in Set()
117 Reset(bit); in Set()
[all …]
Dbit_field.h52 * Make BitField type that follows right after current bit range.
67 * Make Flag field that follows right after current bit range.
74 * Return maximum value that fits bit range [START_BIT : START_BIT+END_BIT]
82 * Return mask of bit range, f.e. 0b1110 for BitField<T, 1, 3>
90 * Check if given value fits into the bit field
98 * Set 'value' to current bit range [START_BIT : START_BIT+END_BIT] within the 'stor' parameter.
108 * Return bit range [START_BIT : START_BIT+END_BIT] value from given integer 'value'
116 * Encode 'value' to current bit range [START_BIT : START_BIT+END_BIT] and return it
125 * Update 'value' to current bit range [START_BIT : START_BIT+END_BIT] and return it
/arkcompiler/runtime_core/static_core/runtime/mem/gc/
Dbitmap.h71 * @brief Set the bit indexed by bit_offset.
72 * @param bit_offset - index of the bit to set.
81 * @brief Clear the bit indexed by bit_offset.
82 * @param bit_offset - index of the bit to clear.
91 * @brief Test the bit indexed by bit_offset.
92 * @param bit_offset - index of the bit to test.
93 * @return Returns value of indexed bit.
102 …* @brief Atomically set bit indexed by bit_offset. If the bit is not set, set it atomically. Other…
103 * @param bit_offset - index of the bit to set.
104 * @return Returns old value of the bit.
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/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_util/include/
Dmpl_int_val.h23 …f this class provides different operations on signed and unsigned integers with arbitrary bit-width
26 /// @brief create zero value with zero bit-width
31 DEBUG_ASSERT(width <= valBitSize && width != 0, "bit-width is too wide"); in IntVal()
51 // Allow 'this' to be assigned with new bit-width and sign iff
52 // its original bit-width is zero (i.e. the value was created by the default ctor)
56 DEBUG_ASSERT(width == other.width && sign == other.sign, "different bit-width or sign");
79 /// @return bit-width of the value
111 /// @return true if the (most significant bit) MSB is set
135 // Comparison operators that manipulate on values with the same sign and bit-width
138 DEBUG_ASSERT(width == rhs.width && sign == rhs.sign, "bit-width and sign must be the same");
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/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_ir/include/
Dcmpl.h37 uint8 *formalWordsTypetagged; // bit vector where the Nth bit tells whether
44 uint8 *localWordsTypetagged; // bit vector where the Nth bit tells whether
51 uint8 *formalWordsRefCounted; // bit vector where the Nth bit tells whether
58 uint8 *localWordsRefCounted; // bit vector where the Nth bit tells whether
90 uint8 *globalWordsTypetagged; // bit vector where the Nth bit tells whether
95 uint8 *globalWordsRefCounted; // bit vector where the Nth bit tells whether
142 // only support 32bit int const (lower 32bit). higher 32bit are tags
145 uint32 val[2]; // ARM target load/store 2 32bit val instead of 1 64bit
222 // typeFlag is a 8bit flag to provide short-cut information for its
229 // bit 0 - bit 3 is for type size information. (now not used in VM?)
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/arkcompiler/runtime_core/docs/changelogs/
D2022-08-18-isa-changelog.md20 8. We add 8-bit or 16-bit imm as inline cache slot for some specific opcodes.
26 We reuse the field 32-bit field `access_flags_` to encode Function Kind and Header index.
27 This will not introduce compatibility issue because the later 24-bit of `access_flags_` is unused i…
30 |<- 16-bit header index ->|<- 8-bit function kind ->|<- 8-bit original access flag ->|
39 As we use 16-bit to encode methodId, stringId and literalarrayId, the number of these Ids in one me…
45 3. In bytecode, we still use 16-bit literalarrayId rather than offset.
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/aarch64/
Daarch64_imm_valid.h94 // For the 32-bit variant: is the bitmask immediate
111 // For the 64-bit variant: is the bitmask immediate
130 // For the 32-bit variant: is the shift amount, in the range 0 to 31, opnd input is bitshiftopnd
137 // For the 64-bit variant: is the shift amount, in the range 0 to 63, opnd input is bitshiftopnd
144 // For the 32-bit variant: is the shift amount, in the range 0 to 31, opnd input is immopnd
151 // For the 64-bit variant: is the shift amount, in the range 0 to 63, opnd input is immopnd
158 // Is a 16-bit unsigned immediate, in the range 0 to 65535, used by BRK
165 // Is the flag bit specifier, an immediate in the range 0 to 15, used by CCMP
172 // For the 32-bit variant: is the bit number of the lsb of the source bitfield, in the range 0 to 31
179 // For the 32-bit variant: is the width of the bitfield, in the range 1 to 32-<lsb>
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Daarch64_int_regs.def27 * to it as WZR in a 32-bit context or XZR in a 64-bit context.
31 /* ID, 32-bit prefix, 64-bit prefix, canBeAssigned, isCalleeSave, isParam, isSpill, isExtraSpill */
66 * We should not use "W" prefix in 64-bit context, though!!
71 /* Alias ID, ID, 32-bit prefix, 64-bit prefix */
Daarch64_fp_simd_regs.def22 * ID, 128 bit vector prefix, followed by scalar prefixes
23 …* scalar prefixes: 8-bit, 16-bit, 32-bit, 64-bit, 128-bit, canBeAssigned, isCalleeSave, isParam, i…
24 * (e.g., we use D0 when V0 contains a 64-bit scalar FP number (aka, double))
/arkcompiler/ets_runtime/ecmascript/snapshot/mem/
Dencode_bit.h29 * 16bit 8bit 1bit 1bit 1bit 8bit 1bit 18bit 10bit
44 // encode bit
52 static constexpr int UNUSED_BIT_NUMBER = 8; // unused bit number
/arkcompiler/runtime_core/static_core/verification/util/
Dflags.h52 class Bit : public ConstBit {
54 Bit(UInt bitMask, UInt &givenFlags) : ConstBit {bitMask, givenFlags} {}; in Bit() function
55 ~Bit() = default;
56 NO_COPY_SEMANTIC(Bit);
57 NO_MOVE_SEMANTIC(Bit);
59 Bit &operator=(bool b)
86 Bit operator[](Enum f)
97 Bit operator[](Enum /* unused */)
122 typename Base::Bit operator[](Enum f)
Dmem.h29 Linux is using a split address space for 32 bit systems, although in the past there
31 …architecture that supports it, e.g. x86). Linux always uses split address space for 64 bit systems.
33 [For 32-bit Linux, the split is usually 3/1, i.e. 0x00000000-0xc0000000 is user space,
38 For a 32-bit process, the virtual address space is usually the 2-gigabyte range 0x00000000
40 For a 64-bit process on 64-bit Windows, the virtual address space is the 128-terabyte range
/arkcompiler/runtime_core/compiler/docs/
Dinterface_inline_cache.md20 * must be 64bit system
27 Cache structure:（offset addr)/(class addr) 32bit/32bit
47 1. one cache is 64bit
51 5. why use 64bit?
52 because read and write 64bit is atomic, same `cache` maybe use at same time
55 1. `class addr` is just the point to a class, in ark runtime, class point is 32bit
63 because method* is 64bit, it must be indirectly stored,cache only have 32bit to use
100 because Method* is 8bit align, so Method* can be compressed. So the actual range we can store is:
/arkcompiler/runtime_core/static_core/compiler/docs/
Dinterface_inline_cache.md20 * must be 64bit system
27 Cache structure:（offset addr)/(class addr) 32bit/32bit
47 1. one cache is 64bit
51 5. why use 64bit?
52 because read and write 64bit is atomic, same `cache` maybe use at same time
55 1. `class addr` is just the point to a class, in ark runtime, class point is 32bit
63 because method* is 64bit, it must be indirectly stored,cache only have 32bit to use
100 because Method* is 8bit align, so Method* can be compressed. So the actual range we can store is:
/arkcompiler/ets_frontend/es2panda/util/
Dbase64.cpp30 // convert three 8bit into four 6bit; then add two 0 bit in each 6 bit in Base64Encode()
101 // the last 6 bit of the first char + the 2~3 bit of the second char(first 4 bit - 00) in Base64Decode()
109 // the last 4 bit of the second char + the 2~5 bit of the third char(first 6 bit - 00) in Base64Decode()
117 // the last 2 bit of the third char + the last 6 bit of the fourth char in Base64Decode()
/arkcompiler/ets_runtime/ecmascript/
Djs_tagged_value_internals.h25 // Every double with all of its exponent bits set and its highest mantissa bit set is a quiet NaN.
29 // to the value will begin with a 16-bit pattern within the range 0x0001..0xFFFE.
32 // Object: [0x0000] [48 bit direct pointer]
34 // / [0x0001] [48 bit any value]
36 // \ [0xFFFE] [48 bit any value]
37 // TaggedInt: [0xFFFF] [0x0000] [32 bit signed integer]
50 static constexpr size_t TAG_BITS_SIZE = 16; // 16 means bit numbers of 0xFFFF
Dproperty_attributes.h66 * Common | WritableField (bit 1)
67 * | EnumerableField (bit 2)
68 * | ConfigurableField (bit 3)
69 * | IsAccessorField (bit 4)
70 * | IsInlinedPropsField(bit 5)
71 * | RepresentationField(bit 6...7)
73 * Fast | OffsetField(bit 8...17)
74 * | TrackTypeField(bit 18...20)
75 * | SharedFieldTypeField(bit 21...28)
76 * | SortedIndexField(bit 29...38)
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/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/x86_64/
Dx64_fp_simd_regs.def23 …* ID, prefixes: 8-bit, 16-bit, 32-bit, 64-bit, 128-bit, canBeAssigned, isCalleeSave, isParam, isSp…
/arkcompiler/ets_runtime/ecmascript/mem/
Didle_gc_trigger.h77 uint8_t bit = static_cast<uint8_t>(gcType); in IsPossiblePostGCTask() local
78 return (bit & gcTaskPostedState_) != bit; in IsPossiblePostGCTask()
83 uint8_t bit = static_cast<uint8_t>(gcType); in SetPostGCTask() local
84 gcTaskPostedState_ = (gcTaskPostedState_ | bit); in SetPostGCTask()
89 uint8_t bit = static_cast<uint8_t>(gcType); in ClearPostGCTask() local
90 gcTaskPostedState_ = (gcTaskPostedState_ & ~bit); in ClearPostGCTask()
/arkcompiler/ets_runtime/ecmascript/compiler/codegen/maple/maple_be/include/cg/x86_64/assembler/
Doperand.h30 …The fifth bit from right to left is used to identity register rip, the bit equals 1 represents the…
31 …The sixth bit from right to left is used to identity float register, the bit equals 1 represents t…
32 The eighth bit from right to left is used to determine whether
33 …it is the high 8-bit register or the lower 8-bit register, the bit equals 1 represents the lower 8…
141 // To implement operating 64/32 bit float with 128bit asm insn,
142 // 32bit/64bit/128bit regs in kRegArray has done some processes same with openArkCompiler.
/arkcompiler/runtime_core/bytecode_optimizer/
Dtagged_value.h27 // Every double with all of its exponent bits set and its highest mantissa bit set is a quiet NaN.
31 // to the value will begin with a 16-bit pattern within the range 0x0001..0xFFFE.
34 // Object: [0x0000] [48 bit direct pointer]
35 // WeakRef: [0x0000] [47 bits direct pointer] | 1 bit 1
36 // / [0x0001] [48 bit any value]
38 // \ [0xFFFE] [48 bit any value]
39 // TaggedInt: [0xFFFF] [0x0000] [32 bit signed integer]
/arkcompiler/runtime_core/static_core/docs/
Dcode_metainfo.md31 | | Bit Tables | Method indexes |
40 ## Bit table
53 Column width can't be greater than 32 bits, because `BitTableBuilder` class, that aims to build bit…
80 Bitmap table is a Bit table with one column, that doesn't have 32-bits limitation for the width.
108 | TABLE_MASK | Bit mask of existing bit tables |
135 | METHOD_HI | Hi 32-bit part of the method pointer (actual only for jit) |
136 | METHOD_LOW | Low 32-bit part of the method pointer (actual only for jit) |
156 This is a Bitmap table, where column is a bit mask, that determines which CPU register holds a mana…
160 This is a Bitmap table, where column is a bit mask, that determines which stack slot holds a manage…
168 This is a Bitmap table, where column is a bit mask, that determines which virtual register is modif…

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