| /kernel/linux/linux-5.10/drivers/staging/rtl8723bs/include/ |
| D | hal_pwr_seq.h | 50 … PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x…
58 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable fallin…
59 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 …
60 …{0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1…
62 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR …
71 …{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1…
73 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 …
74 …SK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x…
89 …, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power s…
96 …WR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power s…
[all …]
|
| D | rtw_ht.h | 69 #define LDPC_HT_ENABLE_TX BIT1
74 #define STBC_HT_ENABLE_TX BIT1
79 #define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT1 /* Declare our NIC supports beamformee */
|
| D | hal_com_reg.h | 609 #define RRSR_2M BIT1
634 #define HAL92C_WOL_GTK_UPDATE_EVENT BIT1
728 #define BW_OPMODE_5G BIT1
760 #define WOW_WOMEN BIT1 /* WoW function on or off. */
803 #define IMR_VODOK BIT1 /* AC_VO DMA Interrupt */
814 #define IMR_OCPINT BIT1
851 #define PHIMR_RDU BIT1 /* Receive Descriptor Unavailable */
869 #define PHIMR_OCPINT BIT1
902 #define UHIMR_RDU BIT1 /* Receive Descriptor Unavailable */
922 #define UHIMR_OCPINT BIT1
[all …]
|
| /kernel/linux/linux-6.6/drivers/staging/rtl8723bs/include/ |
| D | hal_pwr_seq.h | 50 … PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1},/* wait till 0x…
58 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable fallin…
59 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable GPIO9 …
60 …{0x0062, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1…
62 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1},/*Enable HSISR …
71 …{0x0049, PWR_CUT_ALL_MSK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1…
73 …K, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1}, /*0x04[9] = 1 …
74 …SK, PWR_FAB_ALL_MSK, PWR_INTF_ALL_MSK, PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0}, /*wait till 0x…
89 …, PWR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, 0}, /*wait power s…
96 …WR_FAB_ALL_MSK, PWR_INTF_SDIO_MSK, PWR_BASEADDR_SDIO, PWR_CMD_POLLING, BIT1, BIT1}, /*wait power s…
[all …]
|
| D | rtw_ht.h | 65 #define LDPC_HT_ENABLE_TX BIT1
70 #define STBC_HT_ENABLE_TX BIT1
75 #define BEAMFORMING_HT_BEAMFORMEE_ENABLE BIT1 /* Declare our NIC supports beamformee */
|
| /kernel/linux/linux-5.10/include/linux/ |
| D | mman.h | 126 * (x & bit1) ? bit2 : 0
128 * ("bit1" and "bit2" must be single bits)
130 #define _calc_vm_trans(x, bit1, bit2) \ argument
131 ((!(bit1) || !(bit2)) ? 0 : \
132 ((bit1) <= (bit2) ? ((x) & (bit1)) * ((bit2) / (bit1)) \
133 : ((x) & (bit1)) / ((bit1) / (bit2))))
|
| /kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
| D | pwrseq.h | 29 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1 \
57 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
66 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
69 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0 \
170 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
173 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
253 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
259 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
288 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
294 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0 \
[all …]
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| /kernel/linux/linux-6.6/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/ |
| D | pwrseq.h | 29 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, BIT1 \
57 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
66 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
69 PWR_BASEADDR_MAC, PWR_CMD_POLLING, BIT1, 0 \
170 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
173 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
253 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
259 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, 0 \
288 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1, BIT1 \
294 PWR_BASEADDR_MAC, PWR_CMD_WRITE, BIT1|BIT0, BIT1|BIT0 \
[all …]
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| /kernel/linux/linux-6.6/include/linux/ |
| D | mman.h | 130 * (x & bit1) ? bit2 : 0
132 * ("bit1" and "bit2" must be single bits)
134 #define _calc_vm_trans(x, bit1, bit2) \ argument
135 ((!(bit1) || !(bit2)) ? 0 : \
136 ((bit1) <= (bit2) ? ((x) & (bit1)) * ((bit2) / (bit1)) \
137 : ((x) & (bit1)) / ((bit1) / (bit2))))
|
| /kernel/linux/linux-6.6/Documentation/driver-api/mtd/ |
| D | nand_ecc.rst | 45 byte 0: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp4 ... rp14
46 byte 1: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp2 rp4 ... rp14
47 byte 2: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp4 ... rp14
48 byte 3: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp4 ... rp14
49 byte 4: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp5 ... rp14
51 byte 254: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp5 ... rp15
52 byte 255: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp5 ... rp15
67 Similarly cp1 is the sum of all bit1, bit3, bit5 and bit7.
69 - cp2 is the parity over bit0, bit1, bit4 and bit5
71 - cp4 is the parity over bit0, bit1, bit2 and bit3.
[all …]
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| /kernel/linux/linux-5.10/Documentation/driver-api/mtd/ |
| D | nand_ecc.rst | 45 byte 0: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp4 ... rp14
46 byte 1: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp2 rp4 ... rp14
47 byte 2: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp4 ... rp14
48 byte 3: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp4 ... rp14
49 byte 4: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp2 rp5 ... rp14
51 byte 254: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp0 rp3 rp5 ... rp15
52 byte 255: bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 rp1 rp3 rp5 ... rp15
67 Similarly cp1 is the sum of all bit1, bit3, bit5 and bit7.
69 - cp2 is the parity over bit0, bit1, bit4 and bit5
71 - cp4 is the parity over bit0, bit1, bit2 and bit3.
[all …]
|
| /kernel/linux/linux-5.10/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_hw.h | 130 #define RCR_FILTER_MASK (BIT0 | BIT1 | BIT2 | BIT3 | BIT5 | BIT12 | \
148 #define RCR_APM BIT1
202 #define SCR_RxUseDK BIT1
227 #define IMR_VODOK BIT1
232 #define TPPoll_BEQ BIT1
272 #define AcmHw_BeqEn BIT1
280 #define AcmFw_ViqStatus BIT1
333 #define BW_OPMODE_5G BIT1
362 #define RRSR_2M BIT1
|
| /kernel/linux/linux-6.6/drivers/video/fbdev/via/ |
| D | dvi.c | 45 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
52 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
325 viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); in dvi_patch_skew_dvp0()
335 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
338 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
345 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
346 viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1); in dvi_patch_skew_dvp0()
363 viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1); in dvi_patch_skew_dvp_low()
370 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
377 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
|
| /kernel/linux/linux-5.10/drivers/video/fbdev/via/ |
| D | dvi.c | 45 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
52 viafb_write_reg_mask(SR2A, VIASR, 0x03, BIT0 + BIT1); in viafb_tmds_trasmitter_identify()
325 viafb_write_reg_mask(SR1B, VIASR, 0, BIT1); in dvi_patch_skew_dvp0()
335 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
338 BIT0 + BIT1 + BIT2); in dvi_patch_skew_dvp0()
345 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp0()
346 viafb_write_reg_mask(SR1B, VIASR, 0x02, BIT1); in dvi_patch_skew_dvp0()
363 viafb_write_reg_mask(CR99, VIACR, 0x03, BIT0 + BIT1); in dvi_patch_skew_dvp_low()
370 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
377 BIT0 + BIT1 + BIT2 + BIT3); in dvi_patch_skew_dvp_low()
|
| /kernel/linux/linux-6.6/drivers/staging/rtl8192e/rtl8192e/ |
| D | r8192E_hw.h | 72 #define RCR_APM BIT1
99 #define SCR_RxUseDK BIT1
121 #define IMR_VODOK BIT1
139 #define ACM_HW_BEQ_EN BIT1
182 #define RRSR_2M BIT1
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| /kernel/linux/linux-6.6/drivers/video/fbdev/ |
| D | wm8505fb_regs.h | 17 * BIT1 GOVRH_VGA_YUV2RGB_ENABLE
26 * BIT1 GOVRH_DVO_YUV422
50 * BIT1 GOVRH_DVO_SYNC_POLAR
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| /kernel/linux/linux-5.10/drivers/video/fbdev/ |
| D | wm8505fb_regs.h | 17 * BIT1 GOVRH_VGA_YUV2RGB_ENABLE
26 * BIT1 GOVRH_DVO_YUV422
50 * BIT1 GOVRH_DVO_SYNC_POLAR
|
| /kernel/linux/linux-5.10/Documentation/input/devices/ |
| D | sentelic.rst | 38 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
70 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
75 Bit1 => the Vertical scrolling movement upward.
115 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
119 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
139 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
170 Bit1 => 0
174 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
195 Bit1 => 1
199 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
[all …]
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| /kernel/linux/linux-6.6/Documentation/input/devices/ |
| D | sentelic.rst | 38 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
70 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
75 Bit1 => the Vertical scrolling movement upward.
115 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
119 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
139 Bit1 => Right Button, 1 is pressed, 0 is not pressed.
170 Bit1 => 0
174 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
195 Bit1 => 1
199 Byte 4: Bit1~Bit0 => Y coordinate (xpos[1:0])
[all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_mqd_manager.c | 141 * cu_mask[0] bit1 -> se_mask[1] bit0 in mqd_symmetrically_map_cu_mask()
143 * cu_mask[0] bit4 -> se_mask[0] bit1 in mqd_symmetrically_map_cu_mask()
148 * cu_mask[0] bit1 -> se_mask[1] bit0 (SE1,SH0,CU0) in mqd_symmetrically_map_cu_mask()
153 * cu_mask[0] bit8 -> se_mask[0] bit1 (SE0,SH0,CU1) in mqd_symmetrically_map_cu_mask()
|
| /kernel/linux/linux-5.10/arch/sh/include/cpu-sh2/cpu/ |
| D | cache.h | 21 #define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */
25 #define CCR_CACHE_CB 0x04 /* CCR[bit1=0,bit2=0] */
|
| /kernel/linux/linux-6.6/arch/sh/include/cpu-sh2/cpu/ |
| D | cache.h | 21 #define CCR_CACHE_WT 0x02 /* CCR[bit1=1,bit2=1] */
25 #define CCR_CACHE_CB 0x04 /* CCR[bit1=0,bit2=0] */
|
| /kernel/linux/linux-6.6/Documentation/leds/ |
| D | leds-mlxcpld.rst | 53 [bit3,bit2,bit1,bit0] or
98 [bit3,bit2,bit1,bit0] or
110 [bit3,bit2,bit1,bit0]:
|
| /kernel/linux/linux-5.10/Documentation/leds/ |
| D | leds-mlxcpld.rst | 53 [bit3,bit2,bit1,bit0] or
98 [bit3,bit2,bit1,bit0] or
110 [bit3,bit2,bit1,bit0]:
|
| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_mqd_manager.c | 159 * cu_mask[0] bit1 -> se_mask[1] bit0 in mqd_symmetrically_map_cu_mask()
161 * cu_mask[0] bit4 -> se_mask[0] bit1 in mqd_symmetrically_map_cu_mask()
166 * cu_mask[0] bit1 -> se_mask[1] bit0 (SE1,SH0,CU0) in mqd_symmetrically_map_cu_mask()
171 * cu_mask[0] bit8 -> se_mask[0] bit1 (SE0,SH0,CU1) in mqd_symmetrically_map_cu_mask()
178 * cu_mask[0] bit1 -> XCC1 se_mask[0] bit0 (XCC1,SE0,SH0,CU0) in mqd_symmetrically_map_cu_mask()
|