| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | hip04-bootwrapper.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-bootwrapper.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bootwrapper boot method
10 - Wei Xu <xuwei5@hisilicon.com>
12 description: Bootwrapper boot method (software protocol on SMP)
17 - const: hisilicon,hip04-bootwrapper
19 boot-method:
21 Address and size of boot method.
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/hisilicon/controller/ |
| D | hip04-bootwrapper.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-bootwrapper.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Bootwrapper boot method
10 - Wei Xu <xuwei5@hisilicon.com>
12 description: Bootwrapper boot method (software protocol on SMP)
17 - const: hisilicon,hip04-bootwrapper
19 boot-method:
20 $ref: /schemas/types.yaml#/definitions/uint32-array
[all …]
|
| /kernel/linux/linux-6.6/Documentation/firmware-guide/acpi/ |
| D | chromeos-acpi-device.rst | 1 .. SPDX-License-Identifier: GPL-2.0
11 .. flat-table:: Supported ACPI Objects
13 :header-rows: 1
15 * - Object
16 - Description
18 * - CHSW
19 - Chrome OS switch positions
21 * - HWID
22 - Chrome OS hardware ID
24 * - FWID
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/kernel/ |
| D | cpu_ops.c | 1 // SPDX-License-Identifier: GPL-2.0-only
46 if (!strcmp(name, (*ops)->name)) in cpu_get_ops()
64 pr_err("Failed to find device node for boot cpu\n"); in cpu_read_enable_method()
68 enable_method = of_get_property(dn, "enable-method", NULL); in cpu_read_enable_method()
71 * The boot CPU may not have an enable method (e.g. in cpu_read_enable_method()
72 * when spin-table is used for secondaries). in cpu_read_enable_method()
76 pr_err("%pOF: missing enable-method property\n", in cpu_read_enable_method()
84 * In ACPI systems the boot CPU does not require in cpu_read_enable_method()
85 * checking the enable method since for some in cpu_read_enable_method()
86 * boot protocol (ie parking protocol) it need not in cpu_read_enable_method()
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/kernel/ |
| D | cpu_ops.c | 1 // SPDX-License-Identifier: GPL-2.0-only
46 if (!strcmp(name, (*ops)->name)) in cpu_get_ops()
64 pr_err("Failed to find device node for boot cpu\n"); in cpu_read_enable_method()
68 enable_method = of_get_property(dn, "enable-method", NULL); in cpu_read_enable_method()
71 * The boot CPU may not have an enable method (e.g. in cpu_read_enable_method()
72 * when spin-table is used for secondaries). in cpu_read_enable_method()
76 pr_err("%pOF: missing enable-method property\n", in cpu_read_enable_method()
84 * In ACPI systems the boot CPU does not require in cpu_read_enable_method()
85 * checking the enable method since for some in cpu_read_enable_method()
86 * boot protocol (ie parking protocol) it need not in cpu_read_enable_method()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,bcm63138.txt | 1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
11 An optional Boot lookup table Device Tree node is required for secondary CPU
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
16 Required properties for the Boot lookup table node:
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
21 - enable-method: should be "brcm,bcm63138"
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/bcm/ |
| D | brcm,bcm63138.txt | 1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
11 An optional Boot lookup table Device Tree node is required for secondary CPU
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
16 Required properties for the Boot lookup table node:
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
21 - enable-method: should be "brcm,bcm63138"
[all …]
|
| /kernel/linux/linux-5.10/Documentation/x86/ |
| D | microcode.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 :Authors: - Fenghua Yu <fenghua.yu@intel.com>
8 - Borislav Petkov <bp@suse.de>
12 updating the microcode on platforms beyond the OEM End-Of-Life support,
13 and updating the microcode on long-running systems without rebooting.
20 The kernel can update microcode very early during boot. Loading
22 kernel boot time.
24 The microcode is stored in an initrd file. During boot, it is read from
29 loader parses the combined initrd image during boot.
38 During BSP (BootStrapping Processor) boot (pre-SMP), the kernel
[all …]
|
| /kernel/linux/linux-6.6/arch/arm/kernel/ |
| D | devtree.c | 1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <asm/mach-types.h>
37 const char *method; in set_smp_ops_by_method() local
40 if (of_property_read_string(node, "enable-method", &method)) in set_smp_ops_by_method()
43 for (; m->method; m++) in set_smp_ops_by_method()
44 if (!strcmp(m->method, method)) { in set_smp_ops_by_method()
45 smp_set_ops(m->ops); in set_smp_ops_by_method()
60 * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
79 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; in arm_dt_init_cpu_maps()
116 * requires that if detected the boot CPU must be assigned in arm_dt_init_cpu_maps()
[all …]
|
| /kernel/linux/linux-6.6/Documentation/arch/arm64/ |
| D | arm-acpi.rst | 7 Base Boot Requirements) [1] specifications. Both BSA and BBR are publicly
23 industry-standard Arm systems, they also apply to more than one operating
25 ACPI and Linux only, on an Arm system -- that is, what Linux expects of
30 ----------------
33 exist in Linux for describing non-enumerable hardware, after all. In this
40 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
45 - ACPI’s OSPM defines a power management model that constrains what the
49 - In the enterprise server environment, ACPI has established bindings (such
55 - Choosing a single interface to describe the abstraction between a platform
61 - The new ACPI governance process works well and Linux is now at the same
[all …]
|
| /kernel/linux/linux-5.10/arch/arm/kernel/ |
| D | devtree.c | 1 // SPDX-License-Identifier: GPL-2.0-only
25 #include <asm/mach-types.h>
37 const char *method; in set_smp_ops_by_method() local
40 if (of_property_read_string(node, "enable-method", &method)) in set_smp_ops_by_method()
43 for (; m->method; m++) in set_smp_ops_by_method()
44 if (!strcmp(m->method, method)) { in set_smp_ops_by_method()
45 smp_set_ops(m->ops); in set_smp_ops_by_method()
60 * arm_dt_init_cpu_maps - Function retrieves cpu nodes from the device tree
79 u32 tmp_map[NR_CPUS] = { [0 ... NR_CPUS-1] = MPIDR_INVALID }; in arm_dt_init_cpu_maps()
110 prop_bytes -= sizeof(*cell); in arm_dt_init_cpu_maps()
[all …]
|
| /kernel/linux/linux-5.10/Documentation/arm64/ |
| D | arm-acpi.rst | 7 Base Boot Requirements) [1] specifications. Please note that the SBBR
22 industry-standard ARMv8 servers, they also apply to more than one operating
24 ACPI and Linux only, on an ARMv8 system -- that is, what Linux expects of
29 ----------------
32 exist in Linux for describing non-enumerable hardware, after all. In this
39 - ACPI’s byte code (AML) allows the platform to encode hardware behavior,
44 - ACPI’s OSPM defines a power management model that constrains what the
48 - In the enterprise server environment, ACPI has established bindings (such
54 - Choosing a single interface to describe the abstraction between a platform
60 - The new ACPI governance process works well and Linux is now at the same
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p2180.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
17 stdout-path = "serial0:115200n8";
26 vdd-supply = <&vdd_gpu>;
31 /delete-property/ dmas;
32 /delete-property/ dma-names;
45 vcc-supply = <&vdd_1v8>;
46 address-width = <8>;
49 read-only;
55 clock-frequency = <400000>;
[all …]
|
| D | tegra186-p3310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
47 phy: ethernet-phy@0 {
48 compatible = "ethernet-phy-ieee802.3-c22";
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p2180.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
17 stdout-path = "serial0:115200n8";
26 vdd-supply = <&vdd_gpu>;
36 clock-frequency = <400000>;
41 interrupt-parent = <&tegra_pmc>;
44 #interrupt-cells = <2>;
45 interrupt-controller;
47 #gpio-cells = <2>;
48 gpio-controller;
[all …]
|
| D | tegra186-p3310.dtsi | 1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/mfd/max77620.h>
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
48 compatible = "ethernet-phy-ieee802.3-c22";
50 interrupt-parent = <&gpio>;
[all …]
|
| /kernel/linux/linux-5.10/Documentation/arm/ |
| D | booting.rst | 9 The following documentation is relevant to 2.4.18-rmk6 and beyond.
11 In order to boot ARM Linux, you require a boot loader, which is a small
12 program that runs before the main kernel. The boot loader is expected
16 Essentially, the boot loader should provide (as a minimum) the
28 ---------------------------
30 Existing boot loaders:
32 New boot loaders:
35 The boot loader is expected to find and initialise all RAM that the
39 the RAM in the machine, or any other method the boot loader designer
44 -----------------------------
[all …]
|
| /kernel/linux/linux-6.6/Documentation/arch/arm/ |
| D | booting.rst | 9 The following documentation is relevant to 2.4.18-rmk6 and beyond.
11 In order to boot ARM Linux, you require a boot loader, which is a small
12 program that runs before the main kernel. The boot loader is expected
16 Essentially, the boot loader should provide (as a minimum) the
28 ---------------------------
30 Existing boot loaders:
32 New boot loaders:
35 The boot loader is expected to find and initialise all RAM that the
39 the RAM in the machine, or any other method the boot loader designer
44 -----------------------------
[all …]
|
| /kernel/linux/linux-5.10/Documentation/PCI/ |
| D | acpi-info.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 method for accessing PCI config space below it, the address space windows
34 know early in boot, before it can parse the ACPI namespace. If a new table
39 If the OS is expected to manage a non-discoverable device described via
50 These are all device-specific, non-architected things, so the only way a
52 the device-specific details. The host bridge registers also include ECAM
66 bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
67 With the exception of ECAM, the bridge register space is device-specific
78 PNP0C02 "motherboard" devices are basically a catch-all. There's no
84 The PCIe spec requires the Enhanced Configuration Access Method (ECAM)
[all …]
|
| /kernel/linux/linux-6.6/Documentation/PCI/ |
| D | acpi-info.rst | 1 .. SPDX-License-Identifier: GPL-2.0
12 method for accessing PCI config space below it, the address space windows
34 know early in boot, before it can parse the ACPI namespace. If a new table
39 If the OS is expected to manage a non-discoverable device described via
50 These are all device-specific, non-architected things, so the only way a
52 the device-specific details. The host bridge registers also include ECAM
66 bridge registers (including ECAM space) in PNP0C02 catch-all devices [6].
67 With the exception of ECAM, the bridge register space is device-specific
78 PNP0C02 "motherboard" devices are basically a catch-all. There's no
84 The PCIe spec requires the Enhanced Configuration Access Method (ECAM)
[all …]
|
| /kernel/linux/linux-6.6/Documentation/riscv/ |
| D | boot.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 RISC-V Kernel Boot Requirements and Constraints
10 This document describes what the RISC-V kernel expects from bootloaders and
12 touching the early boot process. For the purposes of this document, the
13 ``early boot process`` refers to any code that runs before the final virtual
16 Pre-kernel Requirements and Constraints
19 The RISC-V kernel expects the following of bootloaders and platform firmware:
22 --------------
24 The RISC-V kernel expects:
30 ---------
[all …]
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mtd/ |
| D | partition.txt | 4 Flash devices can be partitioned into one or more functional ranges (e.g. "boot
8 flash layout set at production time. Some may use on-flash table that describes
13 method is used for a given flash device. To describe the method there should be
15 'compatible' property, which is used to identify the method to use.
20 hierarchical (multi-level) layouts and should be used if there is some
22 another partitioning method.
30 Partitions can be represented by sub-nodes of a flash device. This can be used
32 used for what purposes, but which don't use an on-flash partition table such
37 - compatible : (required) must be "fixed-partitions"
45 #address-cells & #size-cells must both be present in the partitions subnode of the
[all …]
|
| /kernel/linux/linux-6.6/arch/arm64/include/asm/ |
| D | cpu_ops.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 * struct cpu_operations - Callback operations for hotplugging CPUs.
15 * enable-method property. On systems booting with ACPI, @name
17 * the boot protocol specified in the ACPI MADT table.
18 * @cpu_init: Reads any data necessary for a specific enable-method for a
20 * @cpu_prepare: Early one-time preparation step for a cpu. If there is a
21 * mechanism for doing so, tests whether it is possible to boot
24 * @cpu_postboot: Optionally, perform any post-boot cleanup or necessary
27 * mechanism-specific information.
28 * @cpu_disable: Prepares a cpu to die. May fail for some mechanism-specific
|
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | cpus.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
[all …]
|
| /kernel/linux/linux-5.10/arch/arm64/include/asm/ |
| D | cpu_ops.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
12 * struct cpu_operations - Callback operations for hotplugging CPUs.
15 * enable-method property. On systems booting with ACPI, @name
17 * the boot protocol specified in the ACPI MADT table.
18 * @cpu_init: Reads any data necessary for a specific enable-method for a
20 * @cpu_prepare: Early one-time preparation step for a cpu. If there is a
21 * mechanism for doing so, tests whether it is possible to boot
24 * @cpu_postboot: Optionally, perform any post-boot cleanup or necessary
27 * mechanism-specific information.
28 * @cpu_disable: Prepares a cpu to die. May fail for some mechanism-specific
|