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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/
Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt8365-evk.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022 BayLibre, SAS.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8365-pinfunc.h>
19 compatible = "mediatek,mt8365-evk", "mediatek,mt8365";
26 stdout-path = "serial0:921600n8";
31 compatible = "linaro,optee-tz";
36 gpio-keys {
[all …]
Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
25 stdout-path = "serial0:115200n8";
33 backlight_lcd0: backlight-lcd0 {
34 compatible = "pwm-backlight";
36 power-supply = <&ppvar_sys>;
37 enable-gpios = <&pio 152 0>;
38 brightness-levels = <0 1023>;
[all …]
Dmt8195-demo.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/mt8195-pinfunc.h>
14 #include <dt-bindings/regulator/mediatek,mt6360-regulator.h>
18 compatible = "mediatek,mt8195-demo", "mediatek,mt8195";
25 stdout-path = "serial0:921600n8";
30 compatible = "linaro,optee-tz";
35 gpio-keys {
[all …]
Dmt6795-sony-xperia-m5.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
14 compatible = "sony,xperia-m5", "mediatek,mt6795";
15 chassis-type = "handset";
30 reserved_memory: reserved-memory {
31 #address-cells = <2>;
32 #size-cells = <2>;
38 no-map;
42 preloader-region@44800000 {
[all …]
Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
25 backlight_lcd0: backlight-lcd0 {
26 compatible = "pwm-backlight";
27 brightness-levels = <0 1023>;
28 default-brightness-level = <576>;
29 enable-gpios = <&pio 82 GPIO_ACTIVE_HIGH>;
30 num-interpolated-steps = <1023>;
32 power-supply = <&ppvar_sys>;
[all …]
Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
33 sram-supply = <&mt6380_vm_reg>;
37 proc-supply = <&mt6380_vcpu_reg>;
[all …]
Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
[all …]
Dmt8183-kukui.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
21 stdout-path = "serial0:115200n8";
25 compatible = "pwm-backlight";
27 power-supply = <&bl_pp5000>;
28 enable-gpios = <&pio 176 0>;
29 brightness-levels = <0 1023>;
30 num-interpolated-steps = <1023>;
31 default-brightness-level = <576>;
[all …]
Dmt7986a-bananapi-bpi-r3.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Frank Wunderlich <frank-w@public-files.de>
9 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/leds/common.h>
13 #include <dt-bindings/pinctrl/mt65xx.h>
18 model = "Bananapi BPI-R3";
19 chassis-type = "embedded";
20 compatible = "bananapi,bpi-r3", "mediatek,mt7986a";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
25 stdout-path = "serial0:115200n8";
31 proc-supply = <&mt6380_vcpu_reg>;
32 sram-supply = <&mt6380_vm_reg>;
36 proc-supply = <&mt6380_vcpu_reg>;
37 sram-supply = <&mt6380_vm_reg>;
[all …]
Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
16 model = "Bananapi BPI-R64";
17 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
24 stdout-path = "serial0:115200n8";
30 proc-supply = <&mt6380_vcpu_reg>;
31 sram-supply = <&mt6380_vm_reg>;
35 proc-supply = <&mt6380_vcpu_reg>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/mediatek/
Dmt7623.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/clock/mt2701-clk.h>
13 #include <dt-bindings/pinctrl/mt7623-pinfunc.h>
14 #include <dt-bindings/power/mt2701-power.h>
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/phy/phy.h>
17 #include <dt-bindings/reset/mt2701-resets.h>
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt6795-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6795-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
11 - Sean Wang <sean.wang@kernel.org>
14 The MediaTek's MT6795 Pin controller is used to control SoC pins.
18 const: mediatek,mt6795-pinctrl
20 gpio-controller: true
22 '#gpio-cells':
[all …]
Dmediatek,mt6779-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Teng <andy.teng@mediatek.com>
11 - Sean Wang <sean.wang@kernel.org>
20 - mediatek,mt6779-pinctrl
21 - mediatek,mt6797-pinctrl
26 reg-names: true
28 gpio-controller: true
[all …]
Dmediatek,mt7986-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@kernel.org>
13 The MediaTek's MT7986 Pin controller is used to control SoC pins.
18 - mediatek,mt7986a-pinctrl
19 - mediatek,mt7986b-pinctrl
25 reg-names:
27 - const: gpio
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dmediatek,mt6779-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt6779-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Teng <andy.teng@mediatek.com>
15 - compatible: "syscon"
19 const: mediatek,mt6779-pinctrl
25 reg-names:
27 - const: "gpio"
28 - const: "iocfg_rm"
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/
Dpinctrl-u300.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2009-2011 ST-Ericsson AB
11 * pins, so we enumerate the pads we can mux rather than actual pins. The pads
12 * are connected to different pins in different packaging types, so it would
25 #include <linux/pinctrl/pinconf-generic.h>
26 #include "pinctrl-coh901.h"
170 #define DRIVER_NAME "pinctrl-u300"
361 PINCTRL_PIN(171, "MMC CMD DIR LS"),
366 PINCTRL_PIN(176, "MMC CMD"),
623 PINCTRL_PIN(431, "PIO ACC SDIO0 CMD"),
[all …]
/kernel/linux/linux-6.6/drivers/mmc/host/
Dalcor.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Oleksij Rempel <linux@rempel-privat.de>
12 * thing what I did. 2018 Oleksij Rempel <linux@rempel-privat.de>
47 struct mmc_command *cmd; member
75 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_rmw8()
89 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_mask_sd_irqs()
96 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_unmask_sd_irqs()
106 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_reset()
116 dev_err(host->dev, "%s: timeout\n", __func__); in alcor_reset()
124 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_data_set_dma()
[all …]
/kernel/linux/linux-5.10/drivers/mmc/host/
Dalcor.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2018 Oleksij Rempel <linux@rempel-privat.de>
12 * thing what I did. 2018 Oleksij Rempel <linux@rempel-privat.de>
47 struct mmc_command *cmd; member
75 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_rmw8()
89 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_mask_sd_irqs()
96 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_unmask_sd_irqs()
106 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_reset()
116 dev_err(host->dev, "%s: timeout\n", __func__); in alcor_reset()
124 struct alcor_pci_priv *priv = host->alcor_pci; in alcor_data_set_dma()
[all …]
/kernel/linux/linux-6.6/drivers/mtd/nand/raw/
Dcs553x_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3]
12 * where 0-3 reflects the chip select for NAND.
50 /* Pin function selection MSR (IDE vs. flash on the IDE pins) */
54 /* Registers within the NAND flash controller BAR -- memory mapped */
56 #define MM_NAND_CTL 0x800 /* Any even address 0x800-0x80e */
57 #define MM_NAND_IO 0x801 /* Any odd address 0x801-0x80f */
65 /* Registers within the NAND flash controller BAR -- I/O mapped */
108 writeb(ctl, cs553x->mmio + MM_NAND_CTL); in cs553x_write_ctrl_byte()
109 writeb(data, cs553x->mmio + MM_NAND_IO); in cs553x_write_ctrl_byte()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dcs553x_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3]
12 * where 0-3 reflects the chip select for NAND.
51 /* Pin function selection MSR (IDE vs. flash on the IDE pins) */
55 /* Registers within the NAND flash controller BAR -- memory mapped */
57 #define MM_NAND_CTL 0x800 /* Any even address 0x800-0x80e */
58 #define MM_NAND_IO 0x801 /* Any odd address 0x801-0x80f */
66 /* Registers within the NAND flash controller BAR -- I/O mapped */
110 writeb(ctl, cs553x->mmio + MM_NAND_CTL); in cs553x_write_ctrl_byte()
111 writeb(data, cs553x->mmio + MM_NAND_IO); in cs553x_write_ctrl_byte()
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/zte/
Dpinctrl-zx296718.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include "pinctrl-zx.h"
27 * The pin numbering starts from AON pins with reserved ones included,
28 * so that register data like offset and bit position for AON pins can
591 TOP_MUX(0x0, "SDIO1"), /* cmd */
647 TOP_MUX(0x0, "USIM1"), /* dat */
657 TOP_MUX(0x0, "SDIO0"), /* cmd */
689 TOP_MUX(0x0, "TSI2"), /* dat */
748 TOP_MUX(0x0, "TSI3"), /* dat */
873 TOP_MUX(0x4, "USIM0"), /* dat */
[all …]

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