| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra20-ac97.txt | 4 - compatible : "nvidia,tegra20-ac97"
5 - reg : Should contain AC97 controller registers location and length
6 - interrupts : Should contain AC97 interrupt
7 - resets : Must contain an entry for each entry in reset-names.
8 See ../reset/reset.txt for details.
9 - reset-names : Must include the following entries:
10 - ac97
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
14 - rx
[all …]
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| D | infineon,peb2466.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Infineon PEB2466 codec
10 - Herve Codina <herve.codina@bootlin.com>
13 The Infineon PEB2466 codec is a programmable DSP-based four channels codec
16 The time-slots used by the codec must be set and so, the properties
17 'dai-tdm-slot-num', 'dai-tdm-slot-width', 'dai-tdm-slot-tx-mask' and
18 'dai-tdm-slot-rx-mask' must be present in the sound card node for sub-nodes
19 that involve the codec. The codec uses one 8bit time-slot per channel.
[all …]
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| D | qcom,wcd938x.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm WCD9380/WCD9385 Audio Codec
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9380/WCD9385 Codec is a standalone Hi-Fi audio codec IC.
17 - $ref: dai-common.yaml#
22 - qcom,wcd9380-codec
23 - qcom,wcd9385-codec
25 reset-gpios:
[all …]
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| D | ti,tlv320aic3x.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320AIC3x Codec
11 TLV320AIC3x are a series of low-power stereo audio codecs with stereo
13 single-ended or fully differential configurations.
16 data bus is programmable for I2S, left/right-justified, DSP, or TDM modes.
20 CODEC output pins:
29 CODEC input pins for TLV320AIC3104:
35 CODEC input pins for other compatible codecs:
[all …]
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| D | tlv320aic31xx.txt | 1 Texas Instruments - tlv320aic31xx Codec module
7 - compatible - "string" - One of:
8 "ti,tlv320aic310x" - Generic TLV320AIC31xx with mono speaker amp
9 "ti,tlv320aic311x" - Generic TLV320AIC31xx with stereo speaker amp
10 "ti,tlv320aic3100" - TLV320AIC3100 (mono speaker amp, no MiniDSP)
11 "ti,tlv320aic3110" - TLV320AIC3110 (stereo speaker amp, no MiniDSP)
12 "ti,tlv320aic3120" - TLV320AIC3120 (mono speaker amp, MiniDSP)
13 "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
14 "ti,tlv320dac3100" - TLV320DAC3100 (no ADC, mono speaker amp, no MiniDSP)
15 "ti,tlv320dac3101" - TLV320DAC3101 (no ADC, stereo speaker amp, no MiniDSP)
[all …]
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| D | ti,tlv320adc3xxx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricard Wanderlof <ricardw@axis.com>
18 - $ref: dai-common.yaml#
23 - ti,tlv320adc3001
24 - ti,tlv320adc3101
30 '#sound-dai-cells':
33 '#gpio-cells':
36 gpio-controller: true
[all …]
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| D | rt5659.txt | 1 RT5659/RT5658 audio CODEC
7 - compatible : One of "realtek,rt5659" or "realtek,rt5658".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
16 - clock-names: Should be "mclk"
18 - realtek,in1-differential
19 - realtek,in3-differential
20 - realtek,in4-differential
21 Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended.
[all …]
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| D | rt5677.txt | 1 RT5677 audio CODEC
7 - compatible : "realtek,rt5677".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - gpio-controller : Indicates this device is a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
20 - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
21 - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
23 - realtek,in1-differential
24 - realtek,in2-differential
[all …]
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| D | cs42l52.txt | 1 CS42L52 audio CODEC
5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
12 of the GPIO used to reset the codec.
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
[all …]
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| D | qcom,wcd9335.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm WCD9335 Audio Codec
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9335 Codec is a standalone Hi-Fi audio codec IC with in-built
27 clock-names:
29 - const: mclk
30 - const: slimbus
35 interrupt-names:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/sound/ |
| D | nvidia,tegra20-ac97.txt | 4 - compatible : "nvidia,tegra20-ac97"
5 - reg : Should contain AC97 controller registers location and length
6 - interrupts : Should contain AC97 interrupt
7 - resets : Must contain an entry for each entry in reset-names.
8 See ../reset/reset.txt for details.
9 - reset-names : Must include the following entries:
10 - ac97
11 - dmas : Must contain an entry for each entry in clock-names.
13 - dma-names : Must include the following entries:
14 - rx
[all …]
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| D | tlv320aic3x.txt | 1 Texas Instruments - tlv320aic3x Codec module
7 - compatible - "string" - One of:
8 "ti,tlv320aic3x" - Generic TLV320AIC3x device
9 "ti,tlv320aic33" - TLV320AIC33
10 "ti,tlv320aic3007" - TLV320AIC3007
11 "ti,tlv320aic3106" - TLV320AIC3106
12 "ti,tlv320aic3104" - TLV320AIC3104
15 - reg - <int> - I2C slave address
20 - reset-gpios - GPIO specification for the active low RESET input.
21 - ai3x-gpio-func - <array of 2 int> - AIC3X_GPIO1 & AIC3X_GPIO2 Functionality
[all …]
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| D | tlv320aic31xx.txt | 1 Texas Instruments - tlv320aic31xx Codec module
7 - compatible - "string" - One of:
8 "ti,tlv320aic310x" - Generic TLV320AIC31xx with mono speaker amp
9 "ti,tlv320aic311x" - Generic TLV320AIC31xx with stereo speaker amp
10 "ti,tlv320aic3100" - TLV320AIC3100 (mono speaker amp, no MiniDSP)
11 "ti,tlv320aic3110" - TLV320AIC3110 (stereo speaker amp, no MiniDSP)
12 "ti,tlv320aic3120" - TLV320AIC3120 (mono speaker amp, MiniDSP)
13 "ti,tlv320aic3111" - TLV320AIC3111 (stereo speaker amp, MiniDSP)
14 "ti,tlv320dac3100" - TLV320DAC3100 (no ADC, mono speaker amp, no MiniDSP)
15 "ti,tlv320dac3101" - TLV320DAC3101 (no ADC, stereo speaker amp, no MiniDSP)
[all …]
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| D | rt5677.txt | 1 RT5677 audio CODEC
7 - compatible : "realtek,rt5677".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
13 - gpio-controller : Indicates this device is a GPIO controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and the
20 - realtek,pow-ldo2-gpio : The GPIO that controls the CODEC's POW_LDO2 pin.
21 - realtek,reset-gpio : The GPIO that controls the CODEC's RESET pin. Active low.
23 - realtek,in1-differential
24 - realtek,in2-differential
[all …]
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| D | cs42l52.txt | 1 CS42L52 audio CODEC
5 - compatible : "cirrus,cs42l52"
7 - reg : the I2C address of the device for I2C
11 - cirrus,reset-gpio : GPIO controller's phandle and the number
12 of the GPIO used to reset the codec.
14 - cirrus,chgfreq-divisor : Values used to set the Charge Pump Frequency.
21 - cirrus,mica-differential-cfg : boolean, If present, then the MICA input is configured
23 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
25 - cirrus,micb-differential-cfg : boolean, If present, then the MICB input is configured
27 Single-ended input. Single-ended mode allows for MIC1 or MIC2 muxing for input.
[all …]
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| D | rt5659.txt | 1 RT5659/RT5658 audio CODEC
7 - compatible : One of "realtek,rt5659" or "realtek,rt5658".
9 - reg : The I2C address of the device.
11 - interrupts : The CODEC's interrupt output.
15 - clocks: The phandle of the master clock to the CODEC
16 - clock-names: Should be "mclk"
18 - realtek,in1-differential
19 - realtek,in3-differential
20 - realtek,in4-differential
21 Boolean. Indicate MIC1/3/4 input are differential, rather than single-ended.
[all …]
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| D | cs35l32.txt | 1 CS35L32 audio CODEC
5 - compatible : "cirrus,cs35l32"
7 - reg : the I2C address of the device for I2C. Address is determined by the level
10 - VA-supply, VP-supply : power supplies for the device,
15 - reset-gpios : a GPIO spec for the reset pin. If specified, it will be
16 deasserted before communication to the codec starts.
18 - cirrus,boost-manager : Boost voltage control.
19 0 = Automatically managed. Boost-converter output voltage is the higher
21 1 = Automatically managed irrespective of audio, adapting for low-power
22 dissipation when LEDs are ON, and operating in Fixed-Boost Bypass Mode
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/ |
| D | qcom,lcc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm LPASS Clock & Reset Controller
10 - Bjorn Andersson <andersson@kernel.org>
15 - qcom,lcc-apq8064
16 - qcom,lcc-ipq8064
17 - qcom,lcc-mdm9615
18 - qcom,lcc-msm8960
23 clock-names:
[all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mfd/ |
| D | allwinner,sun8i-a23-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 const: allwinner,sun8i-a23-prcm
23 "^.*(clk|rst|codec).*$":
29 - fixed-factor-clock
30 - allwinner,sun8i-a23-apb0-clk
[all …]
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| /kernel/linux/linux-6.6/sound/soc/tegra/ |
| D | tegra20_ac97.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * tegra20_ac97.c - Tegra20 AC97 platform driver
23 #include <linux/reset.h>
33 #define DRV_NAME "tegra20-ac97"
42 /* reset line is not driven by DAC pad group, have to toggle GPIO */ in tegra20_ac97_codec_reset()
43 gpio_set_value(workdata->reset_gpio, 0); in tegra20_ac97_codec_reset()
46 gpio_set_value(workdata->reset_gpio, 1); in tegra20_ac97_codec_reset()
52 regmap_read(workdata->regmap, TEGRA20_AC97_STATUS1, &readback); in tegra20_ac97_codec_reset()
65 * although sync line is driven by the DAC pad group warm reset using in tegra20_ac97_codec_warm_reset()
69 gpio_request(workdata->sync_gpio, "codec-sync"); in tegra20_ac97_codec_warm_reset()
[all …]
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| /kernel/linux/linux-6.6/include/linux/mfd/madera/ |
| D | pdata.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2015-2018 Cirrus Logic
12 #include <linux/regulator/arizona-ldo1.h>
13 #include <linux/regulator/arizona-micsupp.h>
15 #include <sound/madera-pdata.h>
26 * struct madera_pdata - Configuration data for Madera devices
28 * @reset: GPIO controlling /RESET (NULL = none)
34 * Documentation/driver-api/pin-control.rst)
38 * in the datasheet for the available values for your codec)
39 * @codec: Substruct of pdata for the ASoC codec driver
[all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/madera/ |
| D | pdata.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * Copyright (C) 2015-2018 Cirrus Logic
12 #include <linux/regulator/arizona-ldo1.h>
13 #include <linux/regulator/arizona-micsupp.h>
15 #include <sound/madera-pdata.h>
26 * struct madera_pdata - Configuration data for Madera devices
28 * @reset: GPIO controlling /RESET (NULL = none)
34 * Documentation/driver-api/pinctl.rst)
38 * in the datasheet for the available values for your codec)
39 * @codec: Substruct of pdata for the ASoC codec driver
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/ |
| D | allwinner,sun8i-a23-prcm.yaml | 1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/mfd/allwinner,sun8i-a23-prcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
17 const: allwinner,sun8i-a23-prcm
23 "^.*(clk|rst|codec).*$":
30 - fixed-factor-clock
31 - allwinner,sun8i-a23-apb0-clk
[all …]
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| /kernel/linux/linux-6.6/drivers/media/platform/verisilicon/ |
| D | rockchip_vpu_hw.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * Hantro VPU codec driver
6 * Jeffy Chen <jeffy.chen@rock-chips.com>
432 clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ); in rk3036_vpu_hw_init()
439 clk_set_rate(vpu->clocks[0].clk, RK3066_ACLK_MAX_FREQ); in rk3066_vpu_hw_init()
440 clk_set_rate(vpu->clocks[2].clk, RK3066_ACLK_MAX_FREQ); in rk3066_vpu_hw_init()
447 clk_set_rate(vpu->clocks[0].clk, RK3588_ACLK_MAX_FREQ); in rk3588_vpu981_hw_init()
454 clk_set_rate(vpu->clocks[0].clk, RK3288_ACLK_MAX_FREQ); in rockchip_vpu_hw_init()
460 struct hantro_dev *vpu = ctx->dev; in rk3066_vpu_dec_reset()
468 struct hantro_dev *vpu = ctx->dev; in rockchip_vpu1_enc_reset()
[all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxbb-kii-pro.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb-p20x.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/sound/meson-aiu.h>
15 compatible = "videostrong,kii-pro", "amlogic,meson-gxbb";
18 spdif_dit: audio-codec-0 {
19 #sound-dai-cells = <0>;
[all …]
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