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/kernel/linux/linux-5.10/arch/arm/mach-tegra/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
36 static void tegra_secondary_init(unsigned int cpu) in tegra_secondary_init() argument
38 cpumask_set_cpu(cpu, &tegra_cpu_init_mask); in tegra_secondary_init()
42 static int tegra20_boot_secondary(unsigned int cpu, struct task_struct *idle) in tegra20_boot_secondary() argument
44 cpu = cpu_logical_map(cpu); in tegra20_boot_secondary()
47 * Force the CPU into reset. The CPU must remain in reset when in tegra20_boot_secondary()
48 * the flow controller state is cleared (which will cause the in tegra20_boot_secondary()
49 * flow controller to stop driving reset if the CPU has been in tegra20_boot_secondary()
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-tegra/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-tegra/platsmp.c
26 #include <asm/mach-types.h>
36 static void tegra_secondary_init(unsigned int cpu) in tegra_secondary_init() argument
38 cpumask_set_cpu(cpu, &tegra_cpu_init_mask); in tegra_secondary_init()
42 static int tegra20_boot_secondary(unsigned int cpu, struct task_struct *idle) in tegra20_boot_secondary() argument
44 cpu = cpu_logical_map(cpu); in tegra20_boot_secondary()
47 * Force the CPU into reset. The CPU must remain in reset when in tegra20_boot_secondary()
48 * the flow controller state is cleared (which will cause the in tegra20_boot_secondary()
49 * flow controller to stop driving reset if the CPU has been in tegra20_boot_secondary()
[all …]
/kernel/linux/linux-6.6/kernel/
Dcpu_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
53 * cpu_pm_register_notifier - register a driver with cpu_pm
57 * CPU and CPU cluster low power entry and exit.
74 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm
77 * Remove a driver from the CPU PM notifier list.
94 * cpu_pm_enter - CPU low power entry notifier
96 * Notifies listeners that a single CPU is entering a low power state that may
97 * cause some blocks in the same power domain as the cpu to reset.
99 * Must be called on the affected CPU with interrupts disabled. Platform is
101 * CPU before cpu_pm_exit is called. Notified drivers can include VFP
[all …]
/kernel/linux/linux-5.10/kernel/
Dcpu_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
35 * disfunctional in cpu idle. Copy RCU_NONIDLE code to let RCU know in cpu_pm_notify()
62 * cpu_pm_register_notifier - register a driver with cpu_pm
66 * CPU and CPU cluster low power entry and exit.
83 * cpu_pm_unregister_notifier - unregister a driver with cpu_pm
86 * Remove a driver from the CPU PM notifier list.
103 * cpu_pm_enter - CPU low power entry notifier
105 * Notifies listeners that a single CPU is entering a low power state that may
106 * cause some blocks in the same power domain as the cpu to reset.
108 * Must be called on the affected CPU with interrupts disabled. Platform is
[all …]
/kernel/linux/linux-5.10/drivers/clk/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
27 the CPU with frequencies above 1GHz.
28 Say Y if you want to support higher CPU frequencies on MSM8916
32 tristate "MSM8916 APCS Clock Controller"
35 Support for the APCS Clock Controller on msm8916 devices. The
37 Say Y if you want to support CPU frequency scaling on devices
41 tristate "MSM8996 CPU Clock Controller"
45 Support for the CPU clock controller on msm8996 devices.
46 Say Y if you want to support CPU clock scaling using CPUfreq
47 drivers for dyanmic power management.
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dsm4450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 interrupt-parent = <&intc>;
12 #address-cells = <2>;
13 #size-cells = <2>;
18 xo_board: xo-board {
19 compatible = "fixed-clock";
20 clock-frequency = <76800000>;
21 #clock-cells = <0>;
[all …]
Dsdx75.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sdx75-gcc.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom,rpmhpd.h>
13 #include <dt-bindings/power/qcom-rpmpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
19 interrupt-parent = <&intc>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/apple/
Dt8103.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
16 compatible = "apple,t8103", "apple,arm-platform";
18 #address-cells = <2>;
19 #size-cells = <2>;
22 #address-cells = <2>;
23 #size-cells = <0>;
[all …]
Dt8112.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/apple-aic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/pinctrl/apple.h>
14 #include <dt-bindings/spmi/spmi.h>
17 compatible = "apple,t8112", "apple,arm-platform";
19 #address-cells = <2>;
20 #size-cells = <2>;
23 #address-cells = <2>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/msm/
Dqcom,saw2.txt3 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
5 power-controller that transitions a piece of hardware (like a processor or
6 subsystem) into and out of low power modes via a direct connection to
8 system, notifying them when a low power state is entered or exited.
14 version of the SAW hardware in that SoC and the distinction between cpu (big
21 - compatible:
27 "qcom,apq8064-saw2-v1.1-cpu"
28 "qcom,msm8226-saw2-v2.1-cpu"
29 "qcom,msm8974-saw2-v2.1-cpu"
30 "qcom,apq8084-saw2-v2.1-cpu"
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/renesas/
Dr8a779f0.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car S4-8 (R8A779F0) SoC
8 #include <dt-bindings/clock/r8a779f0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a779f0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
17 cluster01_opp: opp-table-0 {
18 compatible = "operating-points-v2";
19 opp-shared;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
23 - compatible: "brcm,bcm<chip_id>-hif-continuation", "syscon"
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt6795.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/mediatek,mt6795-clk.h>
10 #include <dt-bindings/gce/mediatek,mt6795-gce.h>
11 #include <dt-bindings/memory/mt6795-larb-port.h>
12 #include <dt-bindings/pinctrl/mt6795-pinfunc.h>
13 #include <dt-bindings/power/mt6795-power.h>
14 #include <dt-bindings/reset/mediatek,mt6795-resets.h>
18 interrupt-parent = <&sysirq>;
[all …]
Dmt8192.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/clock/mt8192-clk.h>
9 #include <dt-bindings/gce/mt8192-gce.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/memory/mt8192-larb-port.h>
13 #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
14 #include <dt-bindings/phy/phy.h>
15 #include <dt-bindings/power/mt8192-power.h>
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/msm/
Dqcom,saw2.txt3 The SAW2 is a wrapper around the Subsystem Power Manager (SPM) and the
5 power-controller that transitions a piece of hardware (like a processor or
6 subsystem) into and out of low power modes via a direct connection to
8 system, notifying them when a low power state is entered or exited.
14 version of the SAW hardware in that SoC and the distinction between cpu (big
21 - compatible:
27 "qcom,apq8064-saw2-v1.1-cpu"
28 "qcom,msm8974-saw2-v2.1-cpu"
29 "qcom,apq8084-saw2-v2.1-cpu"
31 - reg:
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-vexpress/
Dtc2_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-vexpress/tc2_pm.c - TC2 power management support
6 * Copyright: (C) 2012-2013 Linaro Limited
19 #include <linux/irqchip/arm-gic.h>
22 #include <asm/proc-fns.h>
27 #include <linux/arm-cci.h>
33 #define RESET_A15_NCORERESET(cpu) (1 << (2 + (cpu))) argument
34 #define RESET_A7_NCORERESET(cpu) (1 << (16 + (cpu))) argument
48 static int tc2_pm_cpu_powerup(unsigned int cpu, unsigned int cluster) in tc2_pm_cpu_powerup() argument
50 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); in tc2_pm_cpu_powerup()
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-versatile/
Dtc2_pm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright: (C) 2012-2013 Linaro Limited
17 #include <linux/irqchip/arm-gic.h>
20 #include <asm/proc-fns.h>
25 #include <linux/arm-cci.h>
31 #define RESET_A15_NCORERESET(cpu) (1 << (2 + (cpu))) argument
32 #define RESET_A7_NCORERESET(cpu) (1 << (16 + (cpu))) argument
46 static int tc2_pm_cpu_powerup(unsigned int cpu, unsigned int cluster) in tc2_pm_cpu_powerup() argument
48 pr_debug("%s: cpu %u cluster %u\n", __func__, cpu, cluster); in tc2_pm_cpu_powerup()
49 if (cluster >= TC2_CLUSTERS || cpu >= tc2_nr_cpus[cluster]) in tc2_pm_cpu_powerup()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra20-pmc
18 - nvidia,tegra30-pmc
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/freescale/
Dimx8qxp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx8-clock.h>
9 #include <dt-bindings/firmware/imx/rsrc.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/pinctrl/pads-imx8qxp.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&gic>;
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/tegra/
Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Power Management Controller (PMC)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
24 #address-cells = <2>;
25 #size-cells = <2>;
[all …]
/kernel/linux/linux-6.6/drivers/clk/qcom/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
27 the CPU with frequencies above 1GHz.
28 Say Y if you want to support higher CPU frequencies on MSM8916
34 Support for the A7 PLL on SDX55 and SDX65 devices. It provides the CPU with
36 Say Y if you want to support higher CPU frequencies on SDX55 and SDX65
40 tristate "MSM8916 APCS Clock Controller"
43 Support for the APCS Clock Controller on msm8916 devices. The
45 Say Y if you want to support CPU frequency scaling on devices
49 tristate "MSM8996 CPU Clock Controller"
54 Support for the CPU clock controller on msm8996 devices.
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/brcm/
Dbcm6362.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <200000000>;
13 cpu@0 {
15 device_type = "cpu";
19 cpu@1 {
21 device_type = "cpu";
[all …]
Dbcm6328.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <160000000>;
13 cpu@0 {
15 device_type = "cpu";
19 cpu@1 {
21 device_type = "cpu";
[all …]

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