Home
last modified time | relevance | path

Searched +full:cpu +full:- +full:syscon (Results 1 – 25 of 745) sorted by relevance

12345678910>>...30

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mips/
Dmscc.txt7 - compatible: "mscc,ocelot"
12 o CPU chip regs:
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
20 - reg : Should contain registers location and length
23 syscon@71070000 {
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
29 o CPU system control:
32 the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU
33 endianness, CPU bus control, CPU status.
36 - compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mips/
Dmscc.txt7 - compatible: "mscc,ocelot", "mscc,luton", "mscc,serval" or "mscc,jr2"
12 o CPU chip regs:
19 - compatible: Should be "mscc,ocelot-chip-regs", "simple-mfd", "syscon"
20 - reg : Should contain registers location and length
23 syscon@71070000 {
24 compatible = "mscc,ocelot-chip-regs", "simple-mfd", "syscon";
29 o CPU system control:
32 the CPU: 8 general purpose registers, reset control, CPU en/disabling, CPU
33 endianness, CPU bus control, CPU status.
36 - compatible: Should be "mscc,ocelot-cpu-syscon", "syscon"
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/sprd/
Dums512.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/sprd,ums512-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
20 cpu-map {
23 cpu = <&CPU0>;
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
22 "syscon"
[all …]
Dbrcm,bcm63138.txt1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
11 An optional Boot lookup table Device Tree node is required for secondary CPU
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
20 Optional properties for the primary CPU node:
21 - enable-method: should be "brcm,bcm63138"
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/bcm/
Dbrcm,brcmstb.txt2 -----------------------------------------------
3 Boards with Broadcom Brahma15 ARM-based BCMxxxx (generally BCM7xxx variants)
7 - compatible: "brcm,bcm<chip_id>", "brcm,brcmstb"
11 #address-cells = <2>;
12 #size-cells = <2>;
16 Further, syscon nodes that map platform-specific registers used for general
19 - compatible: "brcm,bcm<chip_id>-sun-top-ctrl", "syscon"
20 - compatible: "brcm,bcm<chip_id>-cpu-biu-ctrl",
21 "brcm,brcmstb-cpu-biu-ctrl",
22 "syscon"
[all …]
Dbrcm,bcm63138.txt1 Broadcom BCM63138 DSL System-on-a-Chip device tree bindings
2 -----------------------------------------------------------
4 Boards compatible with the BCM63138 DSL System-on-a-Chip should have the
11 An optional Boot lookup table Device Tree node is required for secondary CPU
13 defined in reset/brcm,bcm63138-pmb.txt for this secondary CPU, and an
14 'enable-method' property.
17 - compatible: should be "brcm,bcm63138-bootlut"
18 - reg: register base address and length for the Boot Lookup table
20 Optional properties for the primary CPU node:
21 - enable-method: should be "brcm,bcm63138"
[all …]
/kernel/linux/linux-6.6/arch/arm/mach-axxia/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-axxia/platsmp.c
15 /* Syscon register offsets for releasing cores from reset */
31 static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle) in axxia_boot_secondary() argument
34 void __iomem *syscon; in axxia_boot_secondary() local
37 syscon_np = of_find_compatible_node(NULL, NULL, "lsi,axxia-syscon"); in axxia_boot_secondary()
39 return -ENOENT; in axxia_boot_secondary()
41 syscon = of_iomap(syscon_np, 0); in axxia_boot_secondary()
43 if (!syscon) in axxia_boot_secondary()
44 return -ENOMEM; in axxia_boot_secondary()
[all …]
/kernel/linux/linux-5.10/arch/arm/mach-axxia/
Dplatsmp.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-axxia/platsmp.c
15 /* Syscon register offsets for releasing cores from reset */
31 static int axxia_boot_secondary(unsigned int cpu, struct task_struct *idle) in axxia_boot_secondary() argument
34 void __iomem *syscon; in axxia_boot_secondary() local
37 syscon_np = of_find_compatible_node(NULL, NULL, "lsi,axxia-syscon"); in axxia_boot_secondary()
39 return -ENOENT; in axxia_boot_secondary()
41 syscon = of_iomap(syscon_np, 0); in axxia_boot_secondary()
43 if (!syscon) in axxia_boot_secondary()
44 return -ENOMEM; in axxia_boot_secondary()
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/mediatek/
Dmt8183.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt8183-clk.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/reset-controller/mt8183-resets.h>
12 #include <dt-bindings/phy/phy.h>
13 #include "mt8183-pinfunc.h"
17 interrupt-parent = <&sysirq>;
18 #address-cells = <2>;
19 #size-cells = <2>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/mediatek/
Dmt6779.dtsi1 // SPDX-License-Identifier: GPL-2.0+
8 #include <dt-bindings/clock/mt6779-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/mt6779-pinfunc.h>
15 interrupt-parent = <&sysirq>;
16 #address-cells = <2>;
17 #size-cells = <2>;
20 compatible = "arm,psci-0.2";
25 #address-cells = <1>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/realtek/
Drtd16xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
17 reserved-memory {
18 #address-cells = <1>;
19 #size-cells = <1>;
32 no-map;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/realtek/
Drtd16xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
17 reserved-memory {
18 #address-cells = <1>;
19 #size-cells = <1>;
32 no-map;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dkeystone-k2hk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
20 cpu@0 {
21 compatible = "arm,cortex-a15";
22 device_type = "cpu";
26 cpu@1 {
[all …]
Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu@0 {
20 compatible = "brcm,brahma-b15";
21 device_type = "cpu";
[all …]
Drtd1195.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 * Copyright (c) 2017-2019 Andreas Färber
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/realtek,rtd1195.h>
15 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <1>;
20 #address-cells = <1>;
21 #size-cells = <0>;
23 cpu0: cpu@0 {
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/ti/keystone/
Dkeystone-k2hk.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
8 #include <dt-bindings/reset/ti-syscon.h>
15 #address-cells = <1>;
16 #size-cells = <0>;
18 interrupt-parent = <&gic>;
20 cpu@0 {
21 compatible = "arm,cortex-a15";
22 device_type = "cpu";
26 cpu@1 {
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/
Darm,realview.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
14 11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
24 pluggable CPU modules, see ARM DUI 0303E.
26 - const: arm,realview-eb
27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S
28 (HBI-0147) was created as a development board to test ARM TrustZone,
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/
Darm,realview.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
14 11, Cortex A-8 and Cortex A-9 CPUs. This included new features compared to
22 - description: ARM RealView Emulation Baseboard (HBI-0140) was created
24 pluggable CPU modules, see ARM DUI 0303E.
26 - const: arm,realview-eb
27 - description: ARM RealView Platform Baseboard for ARM1176JZF-S
28 (HBI-0147) was created as a development board to test ARM TrustZone,
[all …]
/kernel/linux/linux-6.6/drivers/power/reset/
Docelot-reset.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
12 #include <linux/mfd/syscon.h>
19 const char *syscon; member
48 u32 if_si_owner_bit = ctx->props->if_si_owner_bit; in ocelot_restart_handle()
51 regmap_update_bits(ctx->cpu_ctrl, ctx->props->protect_reg, in ocelot_restart_handle()
52 ctx->props->vcore_protect, 0); in ocelot_restart_handle()
56 regmap_update_bits(ctx->cpu_ctrl, in ocelot_restart_handle()
63 writel(SOFT_CHIP_RST, ctx->base); in ocelot_restart_handle()
72 struct device *dev = &pdev->dev; in ocelot_reset_probe()
75 ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); in ocelot_reset_probe()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/
Dmicrochip,rst.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
16 - One Time Switch Core Reset (Soft Reset)
20 pattern: "^reset-controller@[0-9a-f]+$"
24 - microchip,sparx5-switch-reset
25 - microchip,lan966x-switch-reset
29 - description: global control block registers
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mfd/
Dsyscon.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mfd/syscon.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 represent as any specific type of device. The typical use-case is
13 for some other node's driver, or platform-specific code, to acquire
14 a reference to the syscon node (e.g. by phandle, node path, or
20 - Lee Jones <lee@kernel.org>
27 - syscon
30 - compatible
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
19 cpu@0 {
20 compatible = "brcm,brahma-b15";
21 device_type = "cpu";
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/brcm/
Dbcm3368.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #address-cells = <1>;
4 #size-cells = <1>;
8 #address-cells = <1>;
9 #size-cells = <0>;
11 mips-hpt-frequency = <150000000>;
13 cpu@0 {
15 device_type = "cpu";
19 cpu@1 {
21 device_type = "cpu";
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/brcm/
Dbcm3368.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "dt-bindings/clock/bcm3368-clock.h"
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
14 mips-hpt-frequency = <150000000>;
16 cpu@0 {
18 device_type = "cpu";
22 cpu@1 {
[all …]

12345678910>>...30