Searched +full:cycle +full:- +full:slip +full:- +full:reduction +full:- +full:enable (Results 1 – 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/iio/frequency/ |
| D | adf4350.txt | 4 - compatible: Should be one of
7 - reg: SPI chip select numbert for the device
8 - spi-max-frequency: Max SPI frequency to use (< 20000000)
9 - clocks: From common clock binding. Clock is phandle to clock for
13 - gpios: GPIO Lock detect - If set with a valid phandle and GPIO number,
15 - adi,channel-spacing: Channel spacing in Hz (influences MODULUS).
16 - adi,power-up-frequency: If set in Hz the PLL tunes to
18 - adi,reference-div-factor: If set the driver skips dynamic calculation
20 - adi,reference-doubler-enable: Enables reference doubler.
21 - adi,reference-div2-enable: Enables reference divider.
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/iio/frequency/ |
| D | adi,adf4350.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
28 clock-names:
35 adi,channel-spacing:
40 adi,power-up-frequency:
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| /kernel/linux/linux-5.10/drivers/iio/frequency/ |
| D | adf4350.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 Analog Devices Inc.
77 for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) { in adf4350_sync_config()
78 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
87 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
88 ret = spi_write(st->spi, &st->val, 4); in adf4350_sync_config()
91 st->regs_hw[i] = st->regs[i]; in adf4350_sync_config()
92 dev_dbg(&st->spi->dev, "[%d] 0x%X\n", in adf4350_sync_config()
93 i, (u32)st->regs[i] | i); in adf4350_sync_config()
107 return -EINVAL; in adf4350_reg_access()
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| /kernel/linux/linux-6.6/drivers/iio/frequency/ |
| D | adf4350.c | 1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2012-2013 Analog Devices Inc.
77 for (i = ADF4350_REG5; i >= ADF4350_REG0; i--) { in adf4350_sync_config()
78 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
87 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
88 ret = spi_write(st->spi, &st->val, 4); in adf4350_sync_config()
91 st->regs_hw[i] = st->regs[i]; in adf4350_sync_config()
92 dev_dbg(&st->spi->dev, "[%d] 0x%X\n", in adf4350_sync_config()
93 i, (u32)st->regs[i] | i); in adf4350_sync_config()
107 return -EINVAL; in adf4350_reg_access()
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