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/kernel/linux/linux-6.6/Documentation/driver-api/dmaengine/
Dprovider.rst20 DMA-eligible devices to the controller itself. Whenever the device
21 will want to start a transfer, it will assert a DMA request (DRQ) by
25 parameter: the transfer size. At each clock cycle, it would transfer a
26 byte of data from one buffer to another, until the transfer size has
31 cycle. For example, we may want to transfer as much data as the
34 that requires data to be written exactly 16 or 24 bits at a time. This
36 parameter called the transfer width.
44 transfer into smaller sub-transfers.
47 that involve a single contiguous block of data. However, some of the
48 transfers we usually have are not, and want to copy data from
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/dmaengine/
Dprovider.rst20 DMA-eligible devices to the controller itself. Whenever the device
21 will want to start a transfer, it will assert a DMA request (DRQ) by
25 parameter: the transfer size. At each clock cycle, it would transfer a
26 byte of data from one buffer to another, until the transfer size has
31 cycle. For example, we may want to transfer as much data as the
34 that requires data to be written exactly 16 or 24 bits at a time. This
36 parameter called the transfer width.
44 transfer into smaller sub-transfers.
47 that involve a single contiguous block of data. However, some of the
48 transfers we usually have are not, and want to copy data from
[all …]
/kernel/linux/linux-5.10/Documentation/mhi/
Dmhi.rst1 .. SPDX-License-Identifier: GPL-2.0
17 modem protocols, such as IP data packets, modem control messages, and
19 protocol provides data acknowledgment feature and manages the power state of the
26 ----
47 Data structures
48 ---------------
50 All data structures used by MHI are in the host system memory. Using the
51 physical interface, the device accesses those data structures. MHI data
52 structures and data buffers in the host system memory regions are mapped for
56 context data array.
[all …]
/kernel/linux/linux-6.6/Documentation/mhi/
Dmhi.rst1 .. SPDX-License-Identifier: GPL-2.0
17 modem protocols, such as IP data packets, modem control messages, and
19 protocol provides data acknowledgment feature and manages the power state of the
26 ----
47 Data structures
48 ---------------
50 All data structures used by MHI are in the host system memory. Using the
51 physical interface, the device accesses those data structures. MHI data
52 structures and data buffers in the host system memory regions are mapped for
56 context data array.
[all …]
/kernel/linux/linux-5.10/drivers/net/wireless/ralink/rt2x00/
Drt2x00crypto.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
21 switch (key->cipher) { in rt2x00crypto_key_to_cipher()
40 struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; in rt2x00crypto_create_tx_descriptor()
45 __set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
47 txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key); in rt2x00crypto_create_tx_descriptor()
49 if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE) in rt2x00crypto_create_tx_descriptor()
50 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
52 txdesc->key_idx = hw_key->hw_key_idx; in rt2x00crypto_create_tx_descriptor()
53 txdesc->iv_offset = txdesc->header_length; in rt2x00crypto_create_tx_descriptor()
[all …]
/kernel/linux/linux-6.6/drivers/net/wireless/ralink/rt2x00/
Drt2x00crypto.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 Copyright (C) 2004 - 2009 Ivo van Doorn <IvDoorn@gmail.com>
21 switch (key->cipher) { in rt2x00crypto_key_to_cipher()
40 struct ieee80211_key_conf *hw_key = tx_info->control.hw_key; in rt2x00crypto_create_tx_descriptor()
45 __set_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
47 txdesc->cipher = rt2x00crypto_key_to_cipher(hw_key); in rt2x00crypto_create_tx_descriptor()
49 if (hw_key->flags & IEEE80211_KEY_FLAG_PAIRWISE) in rt2x00crypto_create_tx_descriptor()
50 __set_bit(ENTRY_TXD_ENCRYPT_PAIRWISE, &txdesc->flags); in rt2x00crypto_create_tx_descriptor()
52 txdesc->key_idx = hw_key->hw_key_idx; in rt2x00crypto_create_tx_descriptor()
53 txdesc->iv_offset = txdesc->header_length; in rt2x00crypto_create_tx_descriptor()
[all …]
/kernel/linux/linux-5.10/drivers/mtd/devices/
Dmchp23k256.c1 // SPDX-License-Identifier: GPL-2.0-only
51 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
57 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
64 struct spi_transfer transfer[2] = {}; in mchp23k256_write() local
76 transfer[0].tx_buf = command; in mchp23k256_write()
77 transfer[0].len = cmd_len; in mchp23k256_write()
78 spi_message_add_tail(&transfer[0], &message); in mchp23k256_write()
80 transfer[1].tx_buf = buf; in mchp23k256_write()
81 transfer[1].len = len; in mchp23k256_write()
82 spi_message_add_tail(&transfer[1], &message); in mchp23k256_write()
[all …]
/kernel/linux/linux-6.6/drivers/mtd/devices/
Dmchp23k256.c1 // SPDX-License-Identifier: GPL-2.0-only
51 for (i = flash->caps->addr_width; i > 0; i--, addr >>= 8) in mchp23k256_addr2cmd()
57 return 1 + flash->caps->addr_width; in mchp23k256_cmdsz()
64 struct spi_transfer transfer[2] = {}; in mchp23k256_write() local
76 transfer[0].tx_buf = command; in mchp23k256_write()
77 transfer[0].len = cmd_len; in mchp23k256_write()
78 spi_message_add_tail(&transfer[0], &message); in mchp23k256_write()
80 transfer[1].tx_buf = buf; in mchp23k256_write()
81 transfer[1].len = len; in mchp23k256_write()
82 spi_message_add_tail(&transfer[1], &message); in mchp23k256_write()
[all …]
/kernel/linux/linux-5.10/drivers/spi/
Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
199 * @rx: SPI RX data register
200 * @tx: SPI TX data register
217 * struct stm32_spi_cfg - stm32 compatible configuration data
228 * number of data (if driver has this functionality)
229 * @can_dma: routine to determine if the transfer is eligible for DMA use
230 * @transfer_one_dma_start: routine to start transfer a single spi_transfer
[all …]
Dspi-mpc52xx.c1 // SPDX-License-Identifier: GPL-2.0-only
26 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
59 /* Driver internal data */
79 /* Details of current transfer (length, and buffer pointers) */
81 struct spi_transfer *transfer; /* current transfer */ member
82 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
99 if (ms->gpio_cs_count > 0) { in mpc52xx_spi_chipsel()
100 cs = ms->message->spi->chip_select; in mpc52xx_spi_chipsel()
101 gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1); in mpc52xx_spi_chipsel()
103 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08); in mpc52xx_spi_chipsel()
[all …]
Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
16 #include <linux/spi/spi-mem.h>
20 #include "spi-dw.h"
63 snprintf(name, 32, "dw_spi%d", dws->master->bus_num); in dw_spi_debugfs_init()
64 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
65 if (!dws->debugfs) in dw_spi_debugfs_init()
66 return -ENOMEM; in dw_spi_debugfs_init()
68 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
69 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/mailbox/
Darm,mhuv2.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tushar Khandelwal <tushar.khandelwal@arm.com>
11 - Viresh Kumar <viresh.kumar@linaro.org>
15 between 1 and 124 channel windows (each 32-bit wide) to provide unidirectional
28 protocols. The transport protocols determine the method of data transmission
33 - Data-transfer: Each transfer is made of one or more words, using one or more
36 - Doorbell: Each transfer is made up of single bit flag, using any one of the
38 and the entire window shall be used in doorbell protocol. Optionally, data
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/kernel/linux/linux-6.6/drivers/spi/
Dspi-stm32.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright (C) 2017, STMicroelectronics - All Rights Reserved
175 #define STM32_SPI_MASTER_MODE(stm32_spi) (!(stm32_spi)->device_mode)
176 #define STM32_SPI_DEVICE_MODE(stm32_spi) ((stm32_spi)->device_mode)
179 * struct stm32_spi_reg - stm32 SPI register & bitfield desc
191 * struct stm32_spi_regspec - stm32 registers definition, compatible dependent data
200 * @rx: SPI RX data register
201 * @tx: SPI TX data register
219 * struct stm32_spi_cfg - stm32 compatible configuration data
230 * number of data (if driver has this functionality)
[all …]
Dspi-mpc52xx.c1 // SPDX-License-Identifier: GPL-2.0-only
30 MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
63 /* Driver internal data */
83 /* Details of current transfer (length, and buffer pointers) */
85 struct spi_transfer *transfer; /* current transfer */ member
86 int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
103 if (ms->gpio_cs_count > 0) { in mpc52xx_spi_chipsel()
104 cs = spi_get_chipselect(ms->message->spi, 0); in mpc52xx_spi_chipsel()
105 gpiod_set_value(ms->gpio_cs[cs], value); in mpc52xx_spi_chipsel()
107 out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08); in mpc52xx_spi_chipsel()
[all …]
Dspi-dw-core.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/dma-mapping.h>
17 #include <linux/spi/spi-mem.h>
21 #include "spi-dw.h"
64 snprintf(name, 32, "dw_spi%d", dws->host->bus_num); in dw_spi_debugfs_init()
65 dws->debugfs = debugfs_create_dir(name, NULL); in dw_spi_debugfs_init()
67 dws->regset.regs = dw_spi_dbgfs_regs; in dw_spi_debugfs_init()
68 dws->regset.nregs = ARRAY_SIZE(dw_spi_dbgfs_regs); in dw_spi_debugfs_init()
69 dws->regset.base = dws->regs; in dw_spi_debugfs_init()
70 debugfs_create_regset32("registers", 0400, dws->debugfs, &dws->regset); in dw_spi_debugfs_init()
[all …]
/kernel/linux/linux-5.10/include/linux/spi/
Dspi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later
25 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
31 * struct spi_statistics - statistics for spi transfers
34 * @messages: number of spi-messages handled
50 * transfer bytes histogramm
85 spin_lock_irqsave(&(stats)->lock, flags); \
86 (stats)->field += count; \
87 spin_unlock_irqrestore(&(stats)->lock, flags); \
94 * struct spi_delay - SPI delay information
110 * struct spi_device - Controller side proxy for an SPI slave device
[all …]
/kernel/linux/linux-6.6/include/linux/spi/
Dspi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later
33 * INTERFACES between SPI master-side drivers and SPI slave protocol handlers,
39 * struct spi_statistics - statistics for spi transfers
40 * @syncp: seqcount to protect members in this struct for per-cpu update
41 * on 32-bit systems
43 * @messages: number of spi-messages handled
59 * transfer bytes histogram
92 u64_stats_update_begin(&__lstats->syncp); \
93 u64_stats_add(&__lstats->field, count); \
94 u64_stats_update_end(&__lstats->syncp); \
[all …]
/kernel/linux/linux-5.10/Documentation/networking/
Dplip.rst1 .. SPDX-License-Identifier: GPL-2.0
14 -----------------
17 This device interface allows a point-to-point connection between two
25 printer port. PLIP is a non-standard, but [can use] uses the standard
26 LapLink null-printer cable [can also work in turbo mode, with a PLIP
62 -------------------
72 PLIP driver is signaled whenever data is sent to it via the cable, such that
73 when no data is available, the driver isn't being used.
77 On these machines, the PLIP driver can be used in IRQ-less mode, where
78 the PLIP driver would constantly poll the parallel port for data waiting,
[all …]
/kernel/linux/linux-6.6/Documentation/networking/
Dplip.rst1 .. SPDX-License-Identifier: GPL-2.0
14 -----------------
17 This device interface allows a point-to-point connection between two
25 printer port. PLIP is a non-standard, but [can use] uses the standard
26 LapLink null-printer cable [can also work in turbo mode, with a PLIP
62 -------------------
72 PLIP driver is signaled whenever data is sent to it via the cable, such that
73 when no data is available, the driver isn't being used.
77 On these machines, the PLIP driver can be used in IRQ-less mode, where
78 the PLIP driver would constantly poll the parallel port for data waiting,
[all …]
/kernel/linux/linux-6.6/drivers/i3c/master/mipi-i3c-hci/
Dxfer_mode_rate.h1 /* SPDX-License-Identifier: BSD-3-Clause */
7 * Transfer Mode/Rate Table definitions as found in extended capability
16 * Master Transfer Mode Table Fixed Indexes.
23 #define XFERMODE_IDX_I3C_HDR_DDR 0x01 /* I3C HDR-DDR Mode */
24 #define XFERMODE_IDX_I3C_HDR_T 0x02 /* I3C HDR-Ternary Mode */
25 #define XFERMODE_IDX_I3C_HDR_BT 0x03 /* I3C HDR-BT Mode */
29 * Transfer Mode Table Entry Bits Definitions
38 * Master Data Transfer Rate Selector Values.
44 * Data Transfer Rate Table. Indicated are typical rates. The actual
45 * rates may vary slightly and are also specified in the Data Transfer
[all …]
/kernel/linux/linux-6.6/Documentation/arch/arm/stm32/
Dstm32-dma-mdma-chaining.rst1 .. SPDX-License-Identifier: GPL-2.0
4 STM32 DMA-MDMA chaining
9 ------------
11 This document describes the STM32 DMA-MDMA chaining feature. But before going
14 To offload data transfers from the CPU, STM32 microprocessors (MPUs) embed
28 STM32 DMA is mainly used to implement central data buffer storage (usually in
30 without the ability to generate convenient burst transfer ensuring the best
35 STM32 MDMA (Master DMA) is mainly used to manage direct data transfers between
36 RAM data buffers without CPU intervention. It can also be used in a
37 hierarchical structure that uses STM32 DMA as first level data buffer
[all …]
/kernel/linux/linux-6.6/fs/ntfs/
Dmst.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mst.c - NTFS multi sector transfer protection handling code. Part of the
4 * Linux-NTFS project.
6 * Copyright (c) 2001-2004 Anton Altaparmakov
12 * post_read_mst_fixup - deprotect multi sector transfer protected data
13 * @b: pointer to the data to deprotect
16 * Perform the necessary post read multi sector transfer fixup and detect the
17 * presence of incomplete multi sector transfers. - In that case, overwrite the
21 * Return 0 on success and -EINVAL on error ("BAAD" magic will be present).
34 usa_ofs = le16_to_cpu(b->usa_ofs); in post_read_mst_fixup()
[all …]
/kernel/linux/linux-5.10/fs/ntfs/
Dmst.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * mst.c - NTFS multi sector transfer protection handling code. Part of the
4 * Linux-NTFS project.
6 * Copyright (c) 2001-2004 Anton Altaparmakov
12 * post_read_mst_fixup - deprotect multi sector transfer protected data
13 * @b: pointer to the data to deprotect
16 * Perform the necessary post read multi sector transfer fixup and detect the
17 * presence of incomplete multi sector transfers. - In that case, overwrite the
21 * Return 0 on success and -EINVAL on error ("BAAD" magic will be present).
34 usa_ofs = le16_to_cpu(b->usa_ofs); in post_read_mst_fixup()
[all …]
/kernel/linux/linux-6.6/arch/sh/drivers/pci/
Dpci-sh4.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include "pci-sh7780.h"
10 #include "pci-sh7751.h"
40 #define SH4_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */
41 #define SH4_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */
45 #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
50 #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
54 #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
55 #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
57 #define SH4_PCICLR 0x120 /* Error Command/Data */
[all …]
/kernel/linux/linux-5.10/arch/sh/drivers/pci/
Dpci-sh4.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 #include "pci-sh7780.h"
10 #include "pci-sh7751.h"
40 #define SH4_PCIINT_MTABT 0x00000008 /* Master-Tgt. Abort Error */
41 #define SH4_PCIINT_MMABT 0x00000004 /* Master-Master Abort Error */
45 #define SH4_PCIINTM_TTADIM BIT(14) /* Target-target abort interrupt */
50 #define SH4_PCIINTM_DPEITWM BIT(5) /* Data parity error for target write */
54 #define SH4_PCIINTM_MWPDIM BIT(1) /* Master write data parity error */
55 #define SH4_PCIINTM_MRDPEIM BIT(0) /* Master read data parity error */
57 #define SH4_PCICLR 0x120 /* Error Command/Data */
[all …]

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