Searched +full:dw +full:- +full:mshc +full:- +full:ddr +full:- +full:timing (Results 1 – 25 of 61) sorted by relevance
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/mmc/ |
| D | samsung,exynos-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 3 --- 4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 - Jaehoon Chung <jh80.chung@samsung.com> 13 - Krzysztof Kozlowski <krzk@kernel.org> 18 - samsung,exynos4210-dw-mshc 19 - samsung,exynos4412-dw-mshc 20 - samsung,exynos5250-dw-mshc 21 - samsung,exynos5420-dw-mshc [all …]
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/ |
| D | exynos-dw-mshc.txt | 6 differences between the core Synopsys dw mshc controller properties described 7 by synopsys-dw-mshc.txt and the properties used by the Samsung Exynos specific 13 - "samsung,exynos4210-dw-mshc": for controllers with Samsung Exynos4210 15 - "samsung,exynos4412-dw-mshc": for controllers with Samsung Exynos4412 17 - "samsung,exynos5250-dw-mshc": for controllers with Samsung Exynos5250 19 - "samsung,exynos5420-dw-mshc": for controllers with Samsung Exynos5420 21 - "samsung,exynos7-dw-mshc": for controllers with Samsung Exynos7 23 - "samsung,exynos7-dw-mshc-smu": for controllers with Samsung Exynos7 26 * samsung,dw-mshc-ciu-div: Specifies the divider value for the card interface 30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value [all …]
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/samsung/ |
| D | exynos5260-xyref5260.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 27 stdout-path = "serial2:115200n8"; 31 compatible = "fixed-clock"; 32 clock-frequency = <24000000>; 33 clock-output-names = "fin_pll"; 34 #clock-cells = <0>; 37 ioclk_pcm: clock-pcm-ext { 38 compatible = "fixed-clock"; 39 clock-frequency = <2048000>; [all …]
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| D | exynos5410-smdk5410.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 27 stdout-path = "serial2:115200n8"; 31 compatible = "fixed-clock"; 32 clock-frequency = <24000000>; 33 clock-output-names = "fin_pll"; 34 #clock-cells = <0>; 37 pmic_ap_clk: pmic-ap-clk { 39 compatible = "fixed-clock"; [all …]
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| D | exynos5420-smdk5420.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include "exynos5420-cpus.dtsi" 12 #include <dt-bindings/clock/samsung,s2mps11.h> 13 #include <dt-bindings/gpio/gpio.h> 31 stdout-path = "serial2:115200n8"; 34 fixed-rate-clocks { 36 compatible = "samsung,exynos5420-oscclk"; 37 clock-frequency = <24000000>; 41 vdd: regulator-0 { [all …]
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| D | exynos5250-smdk5250.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/clock/maxim,max77686.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 31 stdout-path = "serial2:115200n8"; 34 vdd: fixed-regulator-vdd { 35 compatible = "regulator-fixed"; 36 regulator-name = "vdd-supply"; 37 regulator-min-microvolt = <1800000>; [all …]
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| D | exynos3250-artik5-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 12 /dts-v1/; 13 #include "exynos3250-artik5.dtsi" 17 compatible = "samsung,artik5-eval", "samsung,artik5", 26 cap-sd-highspeed; 27 disable-wp; 28 vqmmc-supply = <&ldo3_reg>; 29 card-detect-delay = <200>; 30 clock-frequency = <100000000>; 31 max-frequency = <100000000>; [all …]
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| D | exynos3250-artik5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/samsung,s2mps11.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 26 stdout-path = &serial_2; 35 compatible = "samsung,secure-firmware"; 39 thermal-zones { 40 cpu_thermal: cpu-thermal { 41 cooling-maps { 44 cooling-device = <&cpu0 5 5>, [all …]
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| D | exynos5250-snow-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/samsung-i2s.h> 30 stdout-path = "serial3:115200n8"; 33 gpio-keys { 34 compatible = "gpio-keys"; 35 pinctrl-names = "default"; [all …]
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| D | exynos5420-galaxy-tab-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd. 10 /dts-v1/; 12 #include "exynos5420-cpus.dtsi" 13 #include <dt-bindings/input/input.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/samsung,s2mps11.h> 18 chassis-type = "tablet"; 24 * The same hack is also needed to boot exynos4412-i9300 with 27 * https://lore.kernel.org/all/1355276466-18295-1-git-send-email-arve@android.com [all …]
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| D | exynos5250-spring.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/clock/samsung,s2mps11.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/input/input.h> 19 chassis-type = "laptop"; 33 stdout-path = "serial3:115200n8"; 36 gpio-keys { 37 compatible = "gpio-keys"; [all …]
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| D | exynos5420-peach-pit.dts | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/maxim,max77802.h> 13 #include <dt-bindings/regulator/maxim,max77802.h> 14 #include <dt-bindings/sound/samsung-i2s.h> 16 #include "exynos5420-cpus.dtsi" 21 compatible = "google,pit-rev16", [all …]
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | exynos5260-xyref5260.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 22 stdout-path = "serial2:115200n8"; 26 compatible = "fixed-clock"; 27 clock-frequency = <24000000>; 28 clock-output-names = "fin_pll"; 29 #clock-cells = <0>; 33 compatible = "fixed-clock"; 34 clock-frequency = <32768>; 35 clock-output-names = "xrtcxti"; [all …]
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| D | exynos5410-smdk5410.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 22 stdout-path = "serial2:115200n8"; 26 compatible = "fixed-clock"; 27 clock-frequency = <24000000>; 28 clock-output-names = "fin_pll"; 29 #clock-cells = <0>; 32 pmic_ap_clk: pmic-ap-clk { 34 compatible = "fixed-clock"; [all …]
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| D | exynos3250-artik5-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 12 /dts-v1/; 13 #include "exynos3250-artik5.dtsi" 17 compatible = "samsung,artik5-eval", "samsung,artik5", 22 cap-sd-highspeed; 23 disable-wp; 24 vqmmc-supply = <&ldo3_reg>; 25 card-detect-delay = <200>; 26 clock-frequency = <100000000>; 27 max-frequency = <100000000>; [all …]
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| D | exynos5420-smdk5420.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include "exynos5420-cpus.dtsi" 12 #include <dt-bindings/clock/samsung,s2mps11.h> 13 #include <dt-bindings/gpio/gpio.h> 26 stdout-path = "serial2:115200n8"; 29 fixed-rate-clocks { 31 compatible = "samsung,exynos5420-oscclk"; 32 clock-frequency = <24000000>; 36 vdd: regulator-0 { [all …]
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| D | exynos5250-smdk5250.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 10 #include <dt-bindings/clock/maxim,max77686.h> 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/interrupt-controller/irq.h> 29 stdout-path = "serial2:115200n8"; 32 vdd: fixed-regulator-vdd { 33 compatible = "regulator-fixed"; 34 regulator-name = "vdd-supply"; 35 regulator-min-microvolt = <1800000>; [all …]
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| D | exynos5250-snow-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/maxim,max77686.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/input/input.h> 12 #include <dt-bindings/sound/samsung-i2s.h> 27 stdout-path = "serial3:115200n8"; 30 gpio-keys { 31 compatible = "gpio-keys"; 32 pinctrl-names = "default"; [all …]
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| D | exynos3250-artik5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 13 #include <dt-bindings/clock/samsung,s2mps11.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/interrupt-controller/irq.h> 21 stdout-path = &serial_2; 30 compatible = "samsung,secure-firmware"; 34 thermal-zones { 35 cpu_thermal: cpu-thermal { 36 cooling-maps { 39 cooling-device = <&cpu0 5 5>, [all …]
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| /kernel/linux/linux-5.10/drivers/mmc/host/ |
| D | dw_mmc-exynos.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Exynos Specific Extensions for Synopsys DW Multimedia Card Interface driver 19 #include "dw_mmc-pltfm.h" 20 #include "dw_mmc-exynos.h" 22 /* Variations in Exynos specific dw-mshc controller */ 52 .compatible = "samsung,exynos4210-dw-mshc", 55 .compatible = "samsung,exynos4412-dw-mshc", 58 .compatible = "samsung,exynos5250-dw-mshc", 61 .compatible = "samsung,exynos5420-dw-mshc", 64 .compatible = "samsung,exynos5420-dw-mshc-smu", [all …]
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| /kernel/linux/linux-6.6/drivers/mmc/host/ |
| D | dw_mmc-exynos.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * Exynos Specific Extensions for Synopsys DW Multimedia Card Interface driver 19 #include "dw_mmc-pltfm.h" 20 #include "dw_mmc-exynos.h" 22 /* Variations in Exynos specific dw-mshc controller */ 53 .compatible = "samsung,exynos4210-dw-mshc", 56 .compatible = "samsung,exynos4412-dw-mshc", 59 .compatible = "samsung,exynos5250-dw-mshc", 62 .compatible = "samsung,exynos5420-dw-mshc", 65 .compatible = "samsung,exynos5420-dw-mshc-smu", [all …]
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/exynos/ |
| D | exynos7885-jackpotlte.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Samsung Galaxy A8 2018 (jackpotlte/SM-A530F) device tree source 9 /dts-v1/; 11 #include <dt-bindings/gpio/gpio.h> 12 #include <dt-bindings/input/input.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 18 chassis-type = "handset"; 28 stdout-path = &serial_2; 38 gpio-keys { 39 compatible = "gpio-keys"; [all …]
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| D | exynos7-espresso.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/samsung,s2mps11.h> 13 #include <dt-bindings/gpio/gpio.h> 17 compatible = "samsung,exynos7-espresso", "samsung,exynos7"; 26 stdout-path = &serial_2; 34 usb30_vbus_reg: regulator-usb30 { 35 compatible = "regulator-fixed"; 36 regulator-name = "VBUS_5V"; [all …]
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| D | exynos850-e850-96.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * WinLink E850-96 board device tree source 8 * Device tree source file for WinLink's E850-96 board which is based on 12 /dts-v1/; 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/input/input.h> 17 #include <dt-bindings/leds/common.h> 20 model = "WinLink E850-96 board"; 21 compatible = "winlink,e850-96", "samsung,exynos850"; 29 stdout-path = &serial_0; [all …]
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/exynos/ |
| D | exynos7-espresso.dts | 1 // SPDX-License-Identifier: GPL-2.0 9 /dts-v1/; 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/clock/samsung,s2mps11.h> 13 #include <dt-bindings/gpio/gpio.h> 17 compatible = "samsung,exynos7-espresso", "samsung,exynos7"; 26 stdout-path = &serial_2; 34 usb30_vbus_reg: regulator-usb30 { 35 compatible = "regulator-fixed"; 36 regulator-name = "VBUS_5V"; [all …]
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