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/kernel/linux/linux-6.6/arch/arm/boot/dts/nvidia/
Dtegra124-nyan-blaze.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra124-nyan.dtsi"
6 #include "tegra124-nyan-blaze-emc.dtsi"
10 compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9",
11 "google,nyan-blaze-rev8", "google,nyan-blaze-rev7",
12 "google,nyan-blaze-rev6", "google,nyan-blaze-rev5",
13 "google,nyan-blaze-rev4", "google,nyan-blaze-rev3",
14 "google,nyan-blaze-rev2", "google,nyan-blaze-rev1",
15 "google,nyan-blaze-rev0", "google,nyan-blaze",
[all …]
Dtegra124-nyan-big.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra124-nyan.dtsi"
6 #include "tegra124-nyan-big-emc.dtsi"
9 model = "Acer Chromebook 13 CB5-311";
10 compatible = "google,nyan-big-rev7", "google,nyan-big-rev6",
11 "google,nyan-big-rev5", "google,nyan-big-rev4",
12 "google,nyan-big-rev3", "google,nyan-big-rev2",
13 "google,nyan-big-rev1", "google,nyan-big-rev0",
14 "google,nyan-big", "google,nyan", "nvidia,tegra124";
[all …]
Dtegra30-beaver.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
19 stdout-path = "serial0:115200n8";
29 avdd-pexa-supply = <&ldo1_reg>;
30 vdd-pexa-supply = <&ldo1_reg>;
31 avdd-pexb-supply = <&ldo1_reg>;
32 vdd-pexb-supply = <&ldo1_reg>;
33 avdd-pex-pll-supply = <&ldo1_reg>;
[all …]
Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
[all …]
Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
27 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
26 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
Dtegra114-roth.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
15 linux,initrd-start = <0x82000000>;
16 linux,initrd-end = <0x82800000>;
24 trusted-foundations {
25 compatible = "tlm,trusted-foundations";
26 tlm,version-major = <2>;
27 tlm,version-minor = <8>;
40 avdd-dsi-csi-supply = <&vdd_1v2_ap>;
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dtegra124-nyan-blaze.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra124-nyan.dtsi"
6 #include "tegra124-nyan-blaze-emc.dtsi"
10 compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9",
11 "google,nyan-blaze-rev8", "google,nyan-blaze-rev7",
12 "google,nyan-blaze-rev6", "google,nyan-blaze-rev5",
13 "google,nyan-blaze-rev4", "google,nyan-blaze-rev3",
14 "google,nyan-blaze-rev2", "google,nyan-blaze-rev1",
15 "google,nyan-blaze-rev0", "google,nyan-blaze",
[all …]
Dtegra124-nyan-big.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra124-nyan.dtsi"
6 #include "tegra124-nyan-big-emc.dtsi"
9 model = "Acer Chromebook 13 CB5-311";
10 compatible = "google,nyan-big-rev7", "google,nyan-big-rev6",
11 "google,nyan-big-rev5", "google,nyan-big-rev4",
12 "google,nyan-big-rev3", "google,nyan-big-rev2",
13 "google,nyan-big-rev1", "google,nyan-big-rev0",
14 "google,nyan-big", "google,nyan", "nvidia,tegra124";
[all …]
Dtegra30-beaver.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
19 stdout-path = "serial0:115200n8";
29 avdd-pexa-supply = <&ldo1_reg>;
30 vdd-pexa-supply = <&ldo1_reg>;
31 avdd-pexb-supply = <&ldo1_reg>;
32 vdd-pexb-supply = <&ldo1_reg>;
33 avdd-pex-pll-supply = <&ldo1_reg>;
[all …]
Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
[all …]
Dtegra124-apalis-v1.2.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
3 * Copyright 2016-2018 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
21 avddio-pex-supply = <&reg_1v05_vdd>;
22 avdd-pex-pll-supply = <&reg_1v05_vdd>;
23 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
24 dvddio-pex-supply = <&reg_1v05_vdd>;
25 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
26 hvdd-pex-supply = <&reg_module_3v3>;
27 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
Dtegra124-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
3 * Copyright 2016-2019 Toradex AG
7 #include "tegra124-apalis-emc.dtsi"
20 avddio-pex-supply = <&reg_1v05_vdd>;
21 avdd-pex-pll-supply = <&reg_1v05_vdd>;
22 avdd-pll-erefe-supply = <&reg_1v05_avdd>;
23 dvddio-pex-supply = <&reg_1v05_vdd>;
24 hvdd-pex-pll-e-supply = <&reg_module_3v3>;
25 hvdd-pex-supply = <&reg_module_3v3>;
26 vddio-pex-ctl-supply = <&reg_module_3v3>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/nvidia/
Dtegra210-p2571.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra210-p2530.dtsi"
12 pinctrl-names = "boot";
13 pinctrl-0 = <&state_boot>;
20 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
21 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
22 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
29 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
Dtegra210-p2595.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
10 pinctrl-names = "boot";
11 pinctrl-0 = <&state_boot>;
19 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
20 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
21 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
28 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
29 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
30 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
[all …]
Dtegra210-p2597.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
23 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
33 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
35 hdmi-supply = <&vdd_hdmi>;
37 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
38 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
[all …]
Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-path = "serial0:115200n8";
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
35 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
[all …]
Dtegra210-smaug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
25 stdout-path = "serial0:115200n8";
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/
Dtegra210-p2571.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra210-p2530.dtsi"
12 pinctrl-names = "boot";
13 pinctrl-0 = <&state_boot>;
20 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
21 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
22 nvidia,io-hv = <TEGRA_PIN_DISABLE>;
29 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
Dtegra210-p2595.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 pinctrl-names = "boot";
8 pinctrl-0 = <&state_boot>;
16 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
17 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
18 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
25 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
26 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
27 nvidia,io-hv = <TEGRA_PIN_ENABLE>;
34 nvidia,enable-input = <TEGRA_PIN_ENABLE>;
[all …]
Dtegra210-p2597.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
20 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
30 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
31 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
32 hdmi-supply = <&vdd_hdmi>;
34 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
35 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(CC, 1)
41 pinctrl-names = "boot";
42 pinctrl-0 = <&state_boot>;
[all …]
Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
16 stdout-path = "serial0:115200n8";
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
35 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
36 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
[all …]
Dtegra210-smaug.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
12 compatible = "google,smaug-rev8", "google,smaug-rev7",
13 "google,smaug-rev6", "google,smaug-rev5",
14 "google,smaug-rev4", "google,smaug-rev3",
15 "google,smaug-rev2", "google,smaug-rev1",
24 stdout-path = "serial0:115200n8";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/nuvoton/
Dnuvoton-npcm750-runbmc-olympus-pincfg.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0ol_pins: gpio0ol-pins {
8 bias-disable;
9 output-low;
11 gpio1ol_pins: gpio1ol-pins {
13 bias-disable;
14 output-low;
16 gpio2ol_pins: gpio2ol-pins {
18 bias-disable;
19 output-low;
[all …]
Dnuvoton-npcm730-gsj-gpio.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 gpio0pp_pins: gpio0pp-pins {
8 bias-disable;
9 drive-push-pull;
11 gpio1pp_pins: gpio1pp-pins {
13 bias-disable;
14 drive-push-pull;
16 gpio2pp_pins: gpio2pp-pins {
18 bias-disable;
19 drive-push-pull;
[all …]

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