| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/phy/ |
| D | phy-mtk-xsphy.txt | 1 MediaTek XS-PHY binding 2 -------------------------- 4 The XS-PHY controller supports physical layer functionality for USB3.1 8 - compatible : should be "mediatek,<soc-model>-xsphy", "mediatek,xsphy", 9 soc-model is the name of SoC, such as mt3611 etc; 12 - "mediatek,mt3611-xsphy" 14 - #address-cells, #size-cells : should use the same values as the root node 15 - ranges: must be present 18 - reg : offset and length of register shared by multiple U3 ports, 21 - mediatek,src-ref-clk-mhz : u32, frequency of reference clock for slew rate [all …]
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| D | phy-mtk-tphy.txt | 1 MediaTek T-PHY binding 2 -------------------------- 4 T-phy controller supports physical layer functionality for a number of 8 - compatible : should be one of 9 "mediatek,generic-tphy-v1" 10 "mediatek,generic-tphy-v2" 11 "mediatek,mt2701-u3phy" (deprecated) 12 "mediatek,mt2712-u3phy" (deprecated) 13 "mediatek,mt8173-u3phy"; 14 make use of "mediatek,generic-tphy-v1" on mt2701 instead and [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/phy/ |
| D | mediatek,xsphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek XS-PHY Controller 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 The XS-PHY controller supports physical layer functionality for USB3.1 18 ---------------------------------- 45 pattern: "^xs-phy@[0-9a-f]+$" 49 - enum: 50 - mediatek,mt3611-xsphy [all …]
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| D | mediatek,tphy.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 4 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 title: MediaTek T-PHY Controller 11 - Chunfeng Yun <chunfeng.yun@mediatek.com> 14 The T-PHY controller supports physical layer functionality for a number of 17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and 18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode: 19 ----------------------------------- 67 pattern: "^t-phy(@[0-9a-f]+)?$" [all …]
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| /kernel/linux/linux-6.6/drivers/phy/mediatek/ |
| D | phy-mtk-xsphy.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <dt-bindings/phy/phy.h> 19 #include "phy-mtk-io.h" 94 /* u2 eye diagram */ 112 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate() 118 if (inst->eye_src) in u2_phy_slew_rate_calibrate() 149 tmp = xsphy->src_ref_clk * xsphy->src_coef; in u2_phy_slew_rate_calibrate() 156 dev_dbg(xsphy->dev, "phy.%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n", in u2_phy_slew_rate_calibrate() 157 inst->index, fm_out, calib_val, in u2_phy_slew_rate_calibrate() 158 xsphy->src_ref_clk, xsphy->src_coef); in u2_phy_slew_rate_calibrate() [all …]
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| D | phy-mtk-tphy.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/phy/phy.h> 15 #include <linux/nvmem-consumer.h> 22 #include "phy-mtk-io.h" 24 /* version V1 sub-banks offset base address */ 35 /* version V2/V3 sub-banks offset base address */ 216 /* CDR Charge Pump P-path current adjustment */ 235 /* TX driver tail current control for 0dB de-empahsis mdoe for Gen1 speed */ 244 /* I-path capacitance adjustment for Gen1 */ 372 [U3P_EFUSE_TX_IMP] = "tx-imp", [all …]
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| /kernel/linux/linux-5.10/drivers/phy/mediatek/ |
| D | phy-mtk-xsphy.c | 1 // SPDX-License-Identifier: GPL-2.0 10 #include <dt-bindings/phy/phy.h> 101 /* u2 eye diagram */ 119 void __iomem *pbase = inst->port_base; in u2_phy_slew_rate_calibrate() 125 if (inst->eye_src) in u2_phy_slew_rate_calibrate() 168 tmp = xsphy->src_ref_clk * xsphy->src_coef; in u2_phy_slew_rate_calibrate() 175 dev_dbg(xsphy->dev, "phy.%d, fm_out:%d, calib:%d (clk:%d, coef:%d)\n", in u2_phy_slew_rate_calibrate() 176 inst->index, fm_out, calib_val, in u2_phy_slew_rate_calibrate() 177 xsphy->src_ref_clk, xsphy->src_coef); in u2_phy_slew_rate_calibrate() 194 void __iomem *pbase = inst->port_base; in u2_phy_instance_init() [all …]
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| D | phy-mtk-tphy.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/phy/phy.h> 19 /* version V1 sub-banks offset base address */ 30 /* version V2 sub-banks offset base address */ 213 /* CDR Charge Pump P-path current adjustment */ 239 /* TX driver tail current control for 0dB de-empahsis mdoe for Gen1 speed */ 251 /* I-path capacitance adjustment for Gen1 */ 326 struct u2phy_banks *u2_banks = &instance->u2_banks; in hs_slew_rate_calibrate() 327 void __iomem *fmreg = u2_banks->fmreg; in hs_slew_rate_calibrate() 328 void __iomem *com = u2_banks->com; in hs_slew_rate_calibrate() [all …]
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| /kernel/linux/linux-5.10/drivers/phy/ |
| D | phy-xgene.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * AppliedMicro X-Gene Multi-purpose PHY driver 10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes. 19 * ----------------- 20 * | Internal | |------| 21 * | Ref PLL CMU |----| | ------------- --------- 22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes| 23 * | | | | --------- 24 * External Clock ------| | ------------- 25 * |------| [all …]
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| /kernel/linux/linux-6.6/drivers/phy/ |
| D | phy-xgene.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * AppliedMicro X-Gene Multi-purpose PHY driver 10 * The APM X-Gene PHY consists of two PLL clock macro's (CMU) and lanes. 19 * ----------------- 20 * | Internal | |------| 21 * | Ref PLL CMU |----| | ------------- --------- 22 * ------------ ---- | MUX |-----|PHY PLL CMU|----| Serdes| 23 * | | | | --------- 24 * External Clock ------| | ------------- 25 * |------| [all …]
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| /kernel/linux/linux-6.6/Documentation/userspace-api/media/v4l/ |
| D | metafmt-d4xx.rst | 1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 3 .. _v4l2-meta-fmt-d4xx: 15 Intel D4xx (D435, D455 and others) cameras include per-frame metadata in their UVC 37 .. flat-table:: D4xx metadata 39 :header-rows: 1 40 :stub-columns: 0 42 * - **Field** 43 - **Description** 44 * - :cspan:`1` *Depth Control* 45 * - __u32 ID [all …]
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| /kernel/linux/linux-6.6/drivers/phy/hisilicon/ |
| D | phy-hi3670-pcie.c | 1 // SPDX-License-Identifier: GPL-2.0 171 writel(val, phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_writel() 176 return readl(phy->base + APB_PHY_START_ADDR + reg); in hi3670_apb_phy_readl() 193 writel(val, phy->base + reg); in kirin_apb_natural_phy_writel() 199 return readl(phy->base + reg); in kirin_apb_natural_phy_readl() 206 regmap_read(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, &val); in hi3670_pcie_phy_oe_enable() 212 regmap_write(phy->sysctrl, SCTRL_PCIE_OE_OFFSET, val); in hi3670_pcie_phy_oe_enable() 217 struct device *dev = phy->dev; in hi3670_pcie_get_eyeparam() 221 np = dev->of_node; in hi3670_pcie_get_eyeparam() 223 ret = of_property_read_u32_array(np, "hisilicon,eye-diagram-param", in hi3670_pcie_get_eyeparam() [all …]
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| /kernel/linux/linux-6.6/fs/nfs/ |
| D | write.c | 1 // SPDX-License-Identifier: GPL-2.0-only 23 #include <linux/backing-dev.h> 86 INIT_LIST_HEAD(&p->pages); in nfs_commitdata_alloc() 108 p->rw_mode = FMODE_WRITE; in nfs_writehdr_alloc() 125 ioc->complete = complete; in nfs_io_completion_init() 126 ioc->data = data; in nfs_io_completion_init() 127 kref_init(&ioc->refcount); in nfs_io_completion_init() 134 ioc->complete(ioc->data); in nfs_io_completion_release() 141 kref_get(&ioc->refcount); in nfs_io_completion_get() 147 kref_put(&ioc->refcount, nfs_io_completion_release); in nfs_io_completion_put() [all …]
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| /kernel/linux/linux-5.10/fs/nfs/ |
| D | write.c | 1 // SPDX-License-Identifier: GPL-2.0-only 23 #include <linux/backing-dev.h> 85 INIT_LIST_HEAD(&p->pages); in nfs_commitdata_alloc() 107 p->rw_mode = FMODE_WRITE; in nfs_writehdr_alloc() 124 ioc->complete = complete; in nfs_io_completion_init() 125 ioc->data = data; in nfs_io_completion_init() 126 kref_init(&ioc->refcount); in nfs_io_completion_init() 133 ioc->complete(ioc->data); in nfs_io_completion_release() 140 kref_get(&ioc->refcount); in nfs_io_completion_get() 146 kref_put(&ioc->refcount, nfs_io_completion_release); in nfs_io_completion_put() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/calcs/ |
| D | dce_calcs.c | 38 * This file is gcc-parseable HW gospel, coming straight from HW engineers. 42 * remain as-is as it provides us with a guarantee from HW that it is correct. 126 yclk[low] = vbios->low_yclk; in calculate_bandwidth() 127 yclk[mid] = vbios->mid_yclk; in calculate_bandwidth() 128 yclk[high] = vbios->high_yclk; in calculate_bandwidth() 129 sclk[s_low] = vbios->low_sclk; in calculate_bandwidth() 130 sclk[s_mid1] = vbios->mid1_sclk; in calculate_bandwidth() 131 sclk[s_mid2] = vbios->mid2_sclk; in calculate_bandwidth() 132 sclk[s_mid3] = vbios->mid3_sclk; in calculate_bandwidth() 133 sclk[s_mid4] = vbios->mid4_sclk; in calculate_bandwidth() [all …]
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| /kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_link_dp.c | 19 link->ctx->logger 38 /* to avoid infinite loop where-in the receiver 78 if (link->dpcd_caps.dpcd_rev.raw >= DPCD_REV_12) { in get_eq_training_aux_rd_interval() 79 /* DP 1.2 or later - retrieve delay through in get_eq_training_aux_rd_interval() 133 struct encoder_feature_support *features = &link->link_enc->features; in decide_eq_training_pattern() 134 struct dpcd_caps *dpcd_caps = &link->dpcd_caps; in decide_eq_training_pattern() 136 if (features->flags.bits.IS_TPS3_CAPABLE) in decide_eq_training_pattern() 139 if (features->flags.bits.IS_TPS4_CAPABLE) in decide_eq_training_pattern() 142 if (dpcd_caps->max_down_spread.bits.TPS4_SUPPORTED && in decide_eq_training_pattern() 146 if (dpcd_caps->max_ln_count.bits.TPS3_SUPPORTED && in decide_eq_training_pattern() [all …]
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| /kernel/linux/linux-6.6/drivers/gpu/drm/amd/display/dc/dml/calcs/ |
| D | dce_calcs.c | 38 * This file is gcc-parseable HW gospel, coming straight from HW engineers. 42 * remain as-is as it provides us with a guarantee from HW that it is correct. 141 yclk[low] = vbios->low_yclk; in calculate_bandwidth() 142 yclk[mid] = vbios->mid_yclk; in calculate_bandwidth() 143 yclk[high] = vbios->high_yclk; in calculate_bandwidth() 144 sclk[s_low] = vbios->low_sclk; in calculate_bandwidth() 145 sclk[s_mid1] = vbios->mid1_sclk; in calculate_bandwidth() 146 sclk[s_mid2] = vbios->mid2_sclk; in calculate_bandwidth() 147 sclk[s_mid3] = vbios->mid3_sclk; in calculate_bandwidth() 148 sclk[s_mid4] = vbios->mid4_sclk; in calculate_bandwidth() [all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/sfc/ |
| D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright 2009-2018 Solarflare Communications Inc. 5 * Copyright 2019-2020 Xilinx Inc. 13 /* Power-on reset state */ 35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */ 38 /* The rest of these are firmware-defined */ 46 /* Values to be written to the per-port status dword in shared 71 * | | \--- Response 72 * | \------- Error 73 * \------------------------------ Resync (always set) [all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/sfc/ |
| D | mcdi_pcol.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 4 * Copyright 2009-2018 Solarflare Communications Inc. 5 * Copyright 2019-2020 Xilinx Inc. 13 /* Power-on reset state */ 35 /* The 'doorbell' addresses are hard-wired to alert the MC when written */ 38 /* The rest of these are firmware-defined */ 46 /* Values to be written to the per-port status dword in shared 71 * | | \--- Response 72 * | \------- Error 73 * \------------------------------ Resync (always set) [all …]
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| /kernel/linux/patches/linux-5.10/yangfan_patch/ |
| D | drivers.patch | 1 diff --git a/drivers/Makefile b/drivers/Makefile 3 --- a/drivers/Makefile 5 @@ -6,6 +6,8 @@ 6 # Rewritten to use lists instead of if-statements. 11 obj-y += irqchip/ 12 obj-y += bus/ 14 diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c 16 --- a/drivers/block/nbd.c 18 @@ -2398,12 +2398,6 @@ static int nbd_genl_status(struct sk_buff *skb, struct genl_info *info) 22 - if (!dev_list) { [all …]
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| /kernel/linux/patches/linux-5.10/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig 3 --- a/arch/arm/Kconfig 5 @@ -322,7 +322,7 @@ config ARCH_MULTIPLATFORM 9 - select AUTO_ZRELADDR 14 @@ -650,6 +650,8 @@ source "arch/arm/mach-highbank/Kconfig" 16 source "arch/arm/mach-hisi/Kconfig" 18 +source "arch/arm/mach-hibvt/Kconfig" 20 source "arch/arm/mach-imx/Kconfig" 22 source "arch/arm/mach-integrator/Kconfig" 23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile [all …]
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| /kernel/linux/patches/linux-4.19/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 1 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig 3 --- a/arch/arm/Kconfig 5 @@ -330,7 +330,7 @@ config ARCH_MULTIPLATFORM 9 - select AUTO_ZRELADDR 14 @@ -751,6 +751,8 @@ source "arch/arm/mach-highbank/Kconfig" 16 source "arch/arm/mach-hisi/Kconfig" 18 +source "arch/arm/mach-hibvt/Kconfig" 20 source "arch/arm/mach-imx/Kconfig" 22 source "arch/arm/mach-integrator/Kconfig" 23 diff --git a/arch/arm/Makefile b/arch/arm/Makefile [all …]
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