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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/fpga/
Dfpga-region.txt1 FPGA Region Device Tree Binding
9 - FPGA Region
18 FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
19 the Device Tree. FPGA Regions provide a way to program FPGAs under device tree
22 This device tree binding document hits some of the high points of FPGA usage and
23 attempts to include terminology used by both major FPGA manufacturers. This
24 document isn't a replacement for any manufacturers specifications for FPGA
32 * The entire FPGA is programmed.
35 * A section of an FPGA is reprogrammed while the rest of the FPGA is not
37 * Not all FPGA's support PR.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/fpga/
Dfpga-region.txt1 FPGA Region Device Tree Binding
9 - FPGA Region
18 FPGA Regions represent FPGA's and partial reconfiguration regions of FPGA's in
19 the Device Tree. FPGA Regions provide a way to program FPGAs under device tree
22 This device tree binding document hits some of the high points of FPGA usage and
23 attempts to include terminology used by both major FPGA manufacturers. This
24 document isn't a replacement for any manufacturers specifications for FPGA
32 * The entire FPGA is programmed.
35 * A section of an FPGA is reprogrammed while the rest of the FPGA is not
37 * Not all FPGA's support PR.
[all …]
/kernel/linux/linux-5.10/drivers/fpga/
DKconfig3 # FPGA framework configuration
6 menuconfig FPGA config
7 tristate "FPGA Configuration Framework"
10 kernel. The FPGA framework adds a FPGA manager class and FPGA
13 if FPGA
16 tristate "Altera SOCFPGA FPGA Manager"
19 FPGA manager driver support for Altera SOCFPGA.
26 FPGA manager driver support for Altera Arria10 SoCFPGA.
41 tristate "Altera FPGA Passive Serial over SPI"
45 FPGA manager driver support for Altera Arria/Cyclone/Stratix
[all …]
Dfpga-mgr.c3 * FPGA Manager Core
12 #include <linux/fpga/fpga-mgr.h>
25 * fpga_image_info_alloc - Allocate a FPGA image info struct
49 * fpga_image_info_free - Free a FPGA image info struct
50 * @info: FPGA image info struct to free
70 * device-specific things to get the FPGA into the state where it is ready to
71 * receive an FPGA image. The low level driver only gets to see the first
88 dev_err(&mgr->dev, "Error preparing FPGA for writing\n"); in fpga_mgr_write_init_buf()
137 * After all the FPGA image has been written, do the device specific steps to
138 * finish and set the FPGA into operating mode.
[all …]
Dof-fpga-region.c3 * FPGA Region - Device Tree support for FPGA programming under Linux
8 #include <linux/fpga/fpga-bridge.h>
9 #include <linux/fpga/fpga-mgr.h>
10 #include <linux/fpga/fpga-region.h>
20 { .compatible = "fpga-region", },
26 * of_fpga_region_find - find FPGA region
27 * @np: device node of FPGA Region
31 * Returns FPGA Region struct or NULL
39 * of_fpga_region_get_mgr - get reference for FPGA manager
40 * @np: device node of FPGA region
[all …]
/kernel/linux/linux-6.6/drivers/fpga/
DKconfig3 # FPGA framework configuration
6 menuconfig FPGA config
7 tristate "FPGA Configuration Framework"
10 kernel. The FPGA framework adds an FPGA manager class and FPGA
13 if FPGA
16 tristate "Altera SOCFPGA FPGA Manager"
19 FPGA manager driver support for Altera SOCFPGA.
26 FPGA manager driver support for Altera Arria10 SoCFPGA.
41 tristate "Altera FPGA Passive Serial over SPI"
45 FPGA manager driver support for Altera Arria/Cyclone/Stratix
[all …]
Dof-fpga-region.c3 * FPGA Region - Device Tree support for FPGA programming under Linux
8 #include <linux/fpga/fpga-bridge.h>
9 #include <linux/fpga/fpga-mgr.h>
10 #include <linux/fpga/fpga-region.h>
22 { .compatible = "fpga-region", },
28 * of_fpga_region_find - find FPGA region
29 * @np: device node of FPGA Region
33 * Return: FPGA Region struct or NULL
41 * of_fpga_region_get_mgr - get reference for FPGA manager
42 * @np: device node of FPGA region
[all …]
Dfpga-mgr.c3 * FPGA Manager Core
12 #include <linux/fpga/fpga-mgr.h>
56 * After all the FPGA image has been written, do the device specific steps to
57 * finish and set the FPGA into operating mode.
68 dev_err(&mgr->dev, "Error after writing image data to FPGA\n"); in fpga_mgr_write_complete()
104 * fpga_image_info_alloc - Allocate an FPGA image info struct
128 * fpga_image_info_free - Free an FPGA image info struct
129 * @info: FPGA image info struct to free
148 * Call the low level driver's parse_header function with entire FPGA image
161 dev_err(&mgr->dev, "Bitstream data outruns FPGA image\n"); in fpga_mgr_parse_header_mapped()
[all …]
/kernel/linux/linux-6.6/Documentation/driver-api/fpga/
Dfpga-region.rst1 FPGA Region
7 This document is meant to be a brief overview of the FPGA region API usage. A
12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
13 FPGA or the whole FPGA. The API provides a way to register a region and to
16 Currently the only layer above fpga-region.c in the kernel is the Device Tree
17 support (of-fpga-region.c) described in [#f1]_. The DT support layer uses regions
18 to program the FPGA and then DT to handle enumeration. The common region code
22 An fpga-region can be set up to know the following things:
24 * which FPGA manager to use to do the programming
28 Additional info needed to program the FPGA image is passed in the struct
[all …]
Dfpga-programming.rst1 In-kernel API for FPGA Programming
7 The in-kernel API for FPGA programming is a combination of APIs from
8 FPGA manager, bridge, and regions. The actual function used to
9 trigger FPGA programming is fpga_region_program_fpga().
12 the FPGA manager and bridges. It will:
15 * lock the mutex of the region's FPGA manager
16 * build a list of FPGA bridges if a method has been specified to do so
18 * program the FPGA using info passed in :c:expr:`fpga_region->info`.
22 The struct fpga_image_info specifies what FPGA image to program. It is
26 How to program an FPGA using a region
[all …]
Dintro.rst4 The FPGA subsystem supports reprogramming FPGAs dynamically under
5 Linux. Some of the core intentions of the FPGA subsystems are:
7 * The FPGA subsystem is vendor agnostic.
9 * The FPGA subsystem separates upper layers (userspace interfaces and
11 FPGA.
16 other users. Write the linux-fpga mailing list and maintainers and
23 FPGA Manager
26 If you are adding a new FPGA or a new method of programming an FPGA,
27 this is the subsystem for you. Low level FPGA manager drivers contain
29 includes the framework in fpga-mgr.c and the low level drivers that
[all …]
Dfpga-mgr.rst1 FPGA Manager
7 The FPGA manager core exports a set of functions for programming an FPGA with
10 The FPGA image data itself is very manufacturer specific, but for our purposes
11 it's just binary data. The FPGA manager core won't parse it.
13 The FPGA image to be programmed can be in a scatter gather list, a single
20 FPGA image as well as image-specific particulars such as whether the image was
23 How to support a new FPGA device
26 To add another FPGA manager, write a driver that implements a set of ops. The
53 mgr = fpga_mgr_register(dev, "Altera SOCFPGA FPGA Manager",
80 do the programming sequence for this particular FPGA. These ops return 0 for
[all …]
/kernel/linux/linux-5.10/Documentation/driver-api/fpga/
Dfpga-region.rst1 FPGA Region
7 This document is meant to be a brief overview of the FPGA region API usage. A
12 an FPGA Manager and a bridge (or bridges) with a reprogrammable region of an
13 FPGA or the whole FPGA. The API provides a way to register a region and to
16 Currently the only layer above fpga-region.c in the kernel is the Device Tree
17 support (of-fpga-region.c) described in [#f1]_. The DT support layer uses regions
18 to program the FPGA and then DT to handle enumeration. The common region code
22 An fpga-region can be set up to know the following things:
24 * which FPGA manager to use to do the programming
28 Additional info needed to program the FPGA image is passed in the struct
[all …]
Dfpga-programming.rst1 In-kernel API for FPGA Programming
7 The in-kernel API for FPGA programming is a combination of APIs from
8 FPGA manager, bridge, and regions. The actual function used to
9 trigger FPGA programming is fpga_region_program_fpga().
12 the FPGA manager and bridges. It will:
15 * lock the mutex of the region's FPGA manager
16 * build a list of FPGA bridges if a method has been specified to do so
18 * program the FPGA using info passed in :c:expr:`fpga_region->info`.
22 The struct fpga_image_info specifies what FPGA image to program. It is
26 How to program an FPGA using a region
[all …]
Dintro.rst4 The FPGA subsystem supports reprogramming FPGAs dynamically under
5 Linux. Some of the core intentions of the FPGA subsystems are:
7 * The FPGA subsystem is vendor agnostic.
9 * The FPGA subsystem separates upper layers (userspace interfaces and
11 FPGA.
16 other users. Write the linux-fpga mailing list and maintainers and
23 FPGA Manager
26 If you are adding a new FPGA or a new method of programming an FPGA,
27 this is the subsystem for you. Low level FPGA manager drivers contain
29 includes the framework in fpga-mgr.c and the low level drivers that
[all …]
Dfpga-mgr.rst1 FPGA Manager
7 The FPGA manager core exports a set of functions for programming an FPGA with
10 The FPGA image data itself is very manufacturer specific, but for our purposes
11 it's just binary data. The FPGA manager core won't parse it.
13 The FPGA image to be programmed can be in a scatter gather list, a single
20 FPGA image as well as image-specific particulars such as whether the image was
23 How to support a new FPGA device
26 To add another FPGA manager, write a driver that implements a set of ops. The
52 mgr = devm_fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager",
73 do the programming sequence for this particular FPGA. These ops return 0 for
[all …]
Dfpga-bridge.rst1 FPGA Bridge
4 API to implement a new FPGA bridge
7 * struct fpga_bridge — The FPGA Bridge structure
13 .. kernel-doc:: include/linux/fpga/fpga-bridge.h
16 .. kernel-doc:: include/linux/fpga/fpga-bridge.h
19 .. kernel-doc:: drivers/fpga/fpga-bridge.c
22 .. kernel-doc:: drivers/fpga/fpga-bridge.c
25 .. kernel-doc:: drivers/fpga/fpga-bridge.c
/kernel/linux/linux-5.10/arch/arm/mach-pxa/
Dpxa_cplds_irqs.c36 struct cplds *fpga = d; in cplds_irq_handler() local
41 pending = readl(fpga->base + FPGA_IRQ_SET_CLR) & fpga->irq_mask; in cplds_irq_handler()
43 generic_handle_irq(irq_find_mapping(fpga->irqdomain, in cplds_irq_handler()
53 struct cplds *fpga = irq_data_get_irq_chip_data(d); in cplds_irq_mask() local
57 fpga->irq_mask &= ~bit; in cplds_irq_mask()
58 writel(fpga->irq_mask, fpga->base + FPGA_IRQ_MASK_EN); in cplds_irq_mask()
63 struct cplds *fpga = irq_data_get_irq_chip_data(d); in cplds_irq_unmask() local
67 set = readl(fpga->base + FPGA_IRQ_SET_CLR); in cplds_irq_unmask()
68 writel(set & ~bit, fpga->base + FPGA_IRQ_SET_CLR); in cplds_irq_unmask()
70 fpga->irq_mask |= bit; in cplds_irq_unmask()
[all …]
/kernel/linux/linux-6.6/include/linux/fpga/
Dfpga-mgr.h3 * FPGA Framework
18 * enum fpga_mgr_states - fpga framework states
20 * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
21 * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
22 * @FPGA_MGR_STATE_RESET: FPGA in reset state
25 * @FPGA_MGR_STATE_PARSE_HEADER: parse FPGA image header
27 * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
29 * @FPGA_MGR_STATE_WRITE: writing image to FPGA
30 * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
33 * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
[all …]
/kernel/linux/linux-5.10/include/linux/fpga/
Dfpga-mgr.h3 * FPGA Framework
18 * enum fpga_mgr_states - fpga framework states
20 * @FPGA_MGR_STATE_POWER_OFF: FPGA power is off
21 * @FPGA_MGR_STATE_POWER_UP: FPGA reports power is up
22 * @FPGA_MGR_STATE_RESET: FPGA in reset state
25 * @FPGA_MGR_STATE_WRITE_INIT: preparing FPGA for programming
27 * @FPGA_MGR_STATE_WRITE: writing image to FPGA
28 * @FPGA_MGR_STATE_WRITE_ERR: Error while writing FPGA
31 * @FPGA_MGR_STATE_OPERATING: FPGA is programmed and operating
34 /* default FPGA states */
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/board/
Dfsl-board.txt20 * Freescale on-board FPGA
22 This is the memory-mapped registers for on board FPGA.
26 indicating the type of FPGA. Example:
27 "fsl,<board>-fpga", "fsl,fpga-pixis", or
28 "fsl,<board>-fpga", "fsl,fpga-qixis"
29 - reg: should contain the address and the length of the FPGA register set.
37 compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
46 compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis";
50 * Freescale on-board FPGA connected on I2C bus
52 Some Freescale boards like BSC9132QDS have on board FPGA connected on
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/board/
Dfsl-board.txt20 * Freescale on-board FPGA
22 This is the memory-mapped registers for on board FPGA.
26 indicating the type of FPGA. Example:
27 "fsl,<board>-fpga", "fsl,fpga-pixis", or
28 "fsl,<board>-fpga", "fsl,fpga-qixis"
29 - reg: should contain the address and the length of the FPGA register set.
37 compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
46 compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis";
50 * Freescale on-board FPGA connected on I2C bus
52 Some Freescale boards like BSC9132QDS have on board FPGA connected on
[all …]
/kernel/linux/linux-5.10/Documentation/ABI/testing/
Dsysfs-class-fpga-manager1 What: /sys/class/fpga_manager/<fpga>/name
5 Description: Name of low level fpga manager driver.
7 What: /sys/class/fpga_manager/<fpga>/state
11 Description: Read fpga manager state as a string.
13 wrong during FPGA programming (something that the driver can't
18 This is a superset of FPGA states and fpga manager driver
19 states. The fpga manager driver is walking through these steps
20 to get the FPGA into a known operating state. It's a sequence,
21 though some steps may get skipped. Valid FPGA states will vary
25 * power off = FPGA power is off
[all …]
/kernel/linux/linux-6.6/Documentation/ABI/testing/
Dsysfs-class-fpga-manager1 What: /sys/class/fpga_manager/<fpga>/name
5 Description: Name of low level fpga manager driver.
7 What: /sys/class/fpga_manager/<fpga>/state
11 Description: Read fpga manager state as a string.
13 wrong during FPGA programming (something that the driver can't
18 This is a superset of FPGA states and fpga manager driver
19 states. The fpga manager driver is walking through these steps
20 to get the FPGA into a known operating state. It's a sequence,
21 though some steps may get skipped. Valid FPGA states will vary
25 * power off = FPGA power is off
[all …]
/kernel/linux/linux-5.10/drivers/staging/gs_fpgaboot/
DREADME2 Linux Driver Source for Xilinx FPGA firmware download
16 - Download Xilinx FPGA firmware
17 - This module downloads Xilinx FPGA firmware using gpio pins.
21 An FPGA (Field Programmable Gate Array) is a programmable hardware that is
24 This driver provides a way to download FPGA firmware.
28 - load Xilinx FPGA bitstream format[1] firmware image file using
30 - program the Xilinx FPGA using SelectMAP (parallel) mode [2]
31 - FPGA prgram is done by gpio based bit-banging, as an example
42 a. As a FPGA development support tool,
43 During FPGA firmware development, you need to download a new FPGA
[all …]

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