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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/rng/
Domap_rng.yaml33 - description: EIP150 gateable clock
34 - description: Main gateable clock
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/clock/
Dbaikal,bt1-ccu-pll.yaml19 by means of PLLs and gateable/non-gateable dividers embedded into the CCU.
Dallwinner,sun4i-a10-osc-clk.yaml7 title: Allwinner A10 Gateable Oscillator Clock
Dbaikal,bt1-ccu-div.yaml19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/clock/
Dbaikal,bt1-ccu-pll.yaml19 by means of PLLs and gateable/non-gateable dividers embedded into the CCU.
Dbaikal,bt1-ccu-div.yaml19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/arm/marvell/
Dcp110-system-controller.txt24 - a set of gateable clocks
29 gateable clocks.
30 - The second cell identifies the particular core clock or gateable
41 - Gateable clocks
/kernel/linux/linux-5.10/drivers/clk/baikal-t1/
DKconfig39 either gateable or ungateable. Some of the CCU dividers can be as well
/kernel/linux/linux-6.6/drivers/clk/baikal-t1/
DKconfig38 either gateable or ungateable. Some of the CCU dividers can be as well
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/bus/
Drenesas,bsc.yaml19 PM domain, and may have a gateable functional clock. Before a device
/kernel/linux/linux-6.6/Documentation/arch/arm/sunxi/
Dclocks.rst8 Q: Why is the main 24MHz oscillator gateable? Wouldn't that break the
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/bus/
Drenesas,bsc.yaml19 PM domain, and may have a gateable functional clock. Before a device
/kernel/linux/linux-6.6/drivers/clk/mvebu/
Dcp110-system-controller.c24 * CP110 has 32 gateable clocks, for the various peripherals in the IP.
60 /* A number of gateable clocks need special handling */
Dcommon.c243 pr_err("mvebu-clk-gating: cannot instantiate more than one gateable clock device\n"); in mvebu_clk_gating_setup()
/kernel/linux/linux-5.10/drivers/clk/mvebu/
Dcp110-system-controller.c24 * CP110 has 32 gateable clocks, for the various peripherals in the IP.
60 /* A number of gateable clocks need special handling */
Dcommon.c243 pr_err("mvebu-clk-gating: cannot instantiate more than one gateable clock device\n"); in mvebu_clk_gating_setup()
/kernel/linux/linux-5.10/drivers/clk/imx/
Dclk-gate2.c19 * DOC: basic gateable clock which can gate and ungate its output
/kernel/linux/linux-6.6/drivers/clk/imx/
Dclk-gate2.c19 * DOC: basic gateable clock which can gate and ungate its output
/kernel/linux/linux-6.6/drivers/thermal/ti-soc-thermal/
Dti-bandgap.h268 * device are gateable or not.
/kernel/linux/linux-5.10/drivers/thermal/ti-soc-thermal/
Dti-bandgap.h268 * device are gateable or not.
/kernel/linux/linux-5.10/Documentation/driver-api/
Dclk.rst108 vice versa. To illustrate consider the simple gateable clk implementation in
/kernel/linux/linux-6.6/Documentation/driver-api/
Dclk.rst108 vice versa. To illustrate consider the simple gateable clk implementation in
/kernel/linux/linux-5.10/scripts/
Dspelling.txt662 gatable||gateable
/kernel/linux/linux-6.6/scripts/
Dspelling.txt728 gatable||gateable
/kernel/linux/linux-6.6/drivers/clk/sunxi/
Dclk-sunxi.c888 u8 gate; /* is it independently gateable? */

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