| /kernel/linux/linux-6.6/sound/arm/ |
| D | pxa2xx-ac97-lib.c | 127 writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); in pxa_ac97_warm_pxa25x() 132 …writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything bu… in pxa_ac97_cold_pxa25x() 133 writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */ in pxa_ac97_cold_pxa25x() 137 writel(GCR_COLD_RST, ac97_reg_base + GCR); in pxa_ac97_cold_pxa25x() 149 writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); in pxa_ac97_warm_pxa27x() 156 …writel(readl(ac97_reg_base + GCR) & ( GCR_COLD_RST), ac97_reg_base + GCR); /* clear everything bu… in pxa_ac97_cold_pxa27x() 157 writel(readl(ac97_reg_base + GCR) & (~GCR_COLD_RST), ac97_reg_base + GCR); /* then assert nCRST */ in pxa_ac97_cold_pxa27x() 165 writel(GCR_COLD_RST | GCR_WARM_RST, ac97_reg_base + GCR); in pxa_ac97_cold_pxa27x() 175 writel(readl(ac97_reg_base + GCR) | (GCR_WARM_RST), ac97_reg_base + GCR); in pxa_ac97_warm_pxa3xx() 181 writel(0, ac97_reg_base + GCR); in pxa_ac97_cold_pxa3xx() [all …]
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| /kernel/linux/linux-5.10/sound/arm/ |
| D | pxa2xx-ac97-lib.c | 123 GCR |= GCR_WARM_RST; in pxa_ac97_warm_pxa25x() 128 GCR &= GCR_COLD_RST; /* clear everything but nCRST */ in pxa_ac97_cold_pxa25x() 129 GCR &= ~GCR_COLD_RST; /* then assert nCRST */ in pxa_ac97_cold_pxa25x() 133 GCR = GCR_COLD_RST; in pxa_ac97_cold_pxa25x() 145 GCR |= GCR_WARM_RST; in pxa_ac97_warm_pxa27x() 152 GCR &= GCR_COLD_RST; /* clear everything but nCRST */ in pxa_ac97_cold_pxa27x() 153 GCR &= ~GCR_COLD_RST; /* then assert nCRST */ in pxa_ac97_cold_pxa27x() 161 GCR = GCR_COLD_RST | GCR_WARM_RST; in pxa_ac97_cold_pxa27x() 171 GCR |= GCR_WARM_RST; in pxa_ac97_warm_pxa3xx() 177 GCR = 0; in pxa_ac97_cold_pxa3xx() [all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/nuvoton/ |
| D | nuvoton,npcm-gcr.yaml | 4 $id: http://devicetree.org/schemas/soc/nuvoton/nuvoton,npcm-gcr.yaml# 14 The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs 22 - nuvoton,wpcm450-gcr 23 - nuvoton,npcm750-gcr 24 - nuvoton,npcm845-gcr 40 gcr: syscon@800000 { 41 compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd";
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| /kernel/linux/linux-6.6/drivers/soc/nuvoton/ |
| D | wpcm450-soc.c | 52 struct regmap *gcr; in wpcm450_soc_init() local 59 gcr = syscon_regmap_lookup_by_compatible("nuvoton,wpcm450-gcr"); in wpcm450_soc_init() 60 if (IS_ERR(gcr)) in wpcm450_soc_init() 61 return PTR_ERR(gcr); in wpcm450_soc_init() 62 ret = regmap_read(gcr, GCR_PDID, &pdid); in wpcm450_soc_init() 67 pr_warn("Unknown chip ID in GCR.PDID: 0x%06x\n", PDID_CHIP(pdid)); in wpcm450_soc_init() 73 pr_warn("Unknown chip revision in GCR.PDID: 0x%02x\n", PDID_REV(pdid)); in wpcm450_soc_init()
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| /kernel/linux/linux-6.6/arch/s390/kvm/ |
| D | guestdbg.c | 62 u64 *cr9 = &vcpu->arch.sie_block->gcr[9]; in enable_all_hw_bp() 63 u64 *cr10 = &vcpu->arch.sie_block->gcr[10]; in enable_all_hw_bp() 64 u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; in enable_all_hw_bp() 102 u64 *cr9 = &vcpu->arch.sie_block->gcr[9]; in enable_all_hw_wp() 103 u64 *cr10 = &vcpu->arch.sie_block->gcr[10]; in enable_all_hw_wp() 104 u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; in enable_all_hw_wp() 132 vcpu->arch.guestdbg.cr0 = vcpu->arch.sie_block->gcr[0]; in kvm_s390_backup_guest_per_regs() 133 vcpu->arch.guestdbg.cr9 = vcpu->arch.sie_block->gcr[9]; in kvm_s390_backup_guest_per_regs() 134 vcpu->arch.guestdbg.cr10 = vcpu->arch.sie_block->gcr[10]; in kvm_s390_backup_guest_per_regs() 135 vcpu->arch.guestdbg.cr11 = vcpu->arch.sie_block->gcr[11]; in kvm_s390_backup_guest_per_regs() [all …]
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| D | gaccess.c | 398 asce->val = vcpu->arch.sie_block->gcr[1]; in ar_translation() 401 asce->val = vcpu->arch.sie_block->gcr[7]; in ar_translation() 409 ald_addr = vcpu->arch.sie_block->gcr[5]; in ar_translation() 411 ald_addr = vcpu->arch.sie_block->gcr[2]; in ar_translation() 444 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; in ar_translation() 589 asce->val = vcpu->arch.sie_block->gcr[1]; in get_vcpu_asce() 592 asce->val = vcpu->arch.sie_block->gcr[7]; in get_vcpu_asce() 595 asce->val = vcpu->arch.sie_block->gcr[13]; in get_vcpu_asce() 645 ctlreg0.val = vcpu->arch.sie_block->gcr[0]; in guest_translate() 805 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; in low_address_protection_enabled() [all …]
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| /kernel/linux/linux-5.10/arch/s390/kvm/ |
| D | guestdbg.c | 62 u64 *cr9 = &vcpu->arch.sie_block->gcr[9]; in enable_all_hw_bp() 63 u64 *cr10 = &vcpu->arch.sie_block->gcr[10]; in enable_all_hw_bp() 64 u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; in enable_all_hw_bp() 102 u64 *cr9 = &vcpu->arch.sie_block->gcr[9]; in enable_all_hw_wp() 103 u64 *cr10 = &vcpu->arch.sie_block->gcr[10]; in enable_all_hw_wp() 104 u64 *cr11 = &vcpu->arch.sie_block->gcr[11]; in enable_all_hw_wp() 132 vcpu->arch.guestdbg.cr0 = vcpu->arch.sie_block->gcr[0]; in kvm_s390_backup_guest_per_regs() 133 vcpu->arch.guestdbg.cr9 = vcpu->arch.sie_block->gcr[9]; in kvm_s390_backup_guest_per_regs() 134 vcpu->arch.guestdbg.cr10 = vcpu->arch.sie_block->gcr[10]; in kvm_s390_backup_guest_per_regs() 135 vcpu->arch.guestdbg.cr11 = vcpu->arch.sie_block->gcr[11]; in kvm_s390_backup_guest_per_regs() [all …]
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| D | gaccess.c | 397 asce->val = vcpu->arch.sie_block->gcr[1]; in ar_translation() 400 asce->val = vcpu->arch.sie_block->gcr[7]; in ar_translation() 408 ald_addr = vcpu->arch.sie_block->gcr[5]; in ar_translation() 410 ald_addr = vcpu->arch.sie_block->gcr[2]; in ar_translation() 443 eax = (vcpu->arch.sie_block->gcr[8] >> 16) & 0xffff; in ar_translation() 571 asce->val = vcpu->arch.sie_block->gcr[1]; in get_vcpu_asce() 574 asce->val = vcpu->arch.sie_block->gcr[7]; in get_vcpu_asce() 577 asce->val = vcpu->arch.sie_block->gcr[13]; in get_vcpu_asce() 627 ctlreg0.val = vcpu->arch.sie_block->gcr[0]; in guest_translate() 787 union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]}; in low_address_protection_enabled() [all …]
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| /kernel/linux/linux-5.10/include/linux/mfd/ |
| D | intel_pmc_bxt.h | 5 /* GCR reg offsets from GCR base */ 17 * @gcr_mem_base: Virtual base address of GCR (Global Configuration Registers) 18 * @gcr_lock: Lock used to serialize access to GCR registers
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| /kernel/linux/linux-6.6/include/linux/mfd/ |
| D | intel_pmc_bxt.h | 5 /* GCR reg offsets from GCR base */ 17 * @gcr_mem_base: Virtual base address of GCR (Global Configuration Registers) 18 * @gcr_lock: Lock used to serialize access to GCR registers
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/nuvoton/ |
| D | nuvoton-common-npcm8xx.dtsi | 20 gcr: system-controller@f0800000 { label 21 compatible = "nuvoton,npcm845-gcr", "syscon"; 54 nuvoton,sysgcr = <&gcr>; 157 syscon = <&gcr>; 166 syscon = <&gcr>; 175 syscon = <&gcr>;
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| /kernel/linux/linux-5.10/drivers/mfd/ |
| D | intel_pmc_bxt.c | 74 * intel_pmc_gcr_read64() - Read a 64-bit PMC GCR register 76 * @offset: offset of GCR register from GCR address base 79 * Reads the 64-bit PMC GCR register at given offset. 97 * intel_pmc_gcr_update() - Update PMC GCR register bits 99 * @offset: offset of GCR register from GCR address base 103 * Updates the bits of given GCR register as specified by 326 /* GCR registers */ in intel_pmc_get_resources()
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| /kernel/linux/linux-6.6/drivers/mfd/ |
| D | intel_pmc_bxt.c | 74 * intel_pmc_gcr_read64() - Read a 64-bit PMC GCR register 76 * @offset: offset of GCR register from GCR address base 79 * Reads the 64-bit PMC GCR register at given offset. 97 * intel_pmc_gcr_update() - Update PMC GCR register bits 99 * @offset: offset of GCR register from GCR address base 103 * Updates the bits of given GCR register as specified by 326 /* GCR registers */ in intel_pmc_get_resources()
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| /kernel/linux/linux-6.6/arch/mips/include/asm/ |
| D | mips-cm.h | 18 /* The base address of the CM GCR block */ 115 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_GCB_OFS + off, name) \ 116 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_COCB_OFS + off, redir_##name) 119 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_GCB_OFS + off, name) \ 120 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_COCB_OFS + off, redir_##name) 123 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_CLCB_OFS + off, cl_##name) \ 124 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_COCB_OFS + off, co_##name) 127 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_CLCB_OFS + off, cl_##name) \ 128 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_COCB_OFS + off, co_##name) 300 /* GCR_Cx_OTHER - Configure the core-other/redirect GCR block */
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| /kernel/linux/linux-5.10/arch/mips/include/asm/ |
| D | mips-cm.h | 18 /* The base address of the CM GCR block */ 115 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_GCB_OFS + off, name) \ 116 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_COCB_OFS + off, redir_##name) 119 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_GCB_OFS + off, name) \ 120 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_COCB_OFS + off, redir_##name) 123 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_CLCB_OFS + off, cl_##name) \ 124 CPS_ACCESSOR_RO(gcr, sz, MIPS_CM_COCB_OFS + off, co_##name) 127 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_CLCB_OFS + off, cl_##name) \ 128 CPS_ACCESSOR_RW(gcr, sz, MIPS_CM_COCB_OFS + off, co_##name) 296 /* GCR_Cx_OTHER - Configure the core-other/redirect GCR block */
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| /kernel/linux/linux-6.6/arch/arm/mach-npcm/ |
| D | platsmp.c | 28 gcr_np = of_find_compatible_node(NULL, NULL, "nuvoton,npcm750-gcr"); in npcm7xx_smp_boot_secondary() 30 pr_err("no gcr device node\n"); in npcm7xx_smp_boot_secondary() 36 pr_err("could not iomap gcr"); in npcm7xx_smp_boot_secondary()
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| /kernel/linux/linux-5.10/arch/arm/mach-npcm/ |
| D | platsmp.c | 31 gcr_np = of_find_compatible_node(NULL, NULL, "nuvoton,npcm750-gcr"); in npcm7xx_smp_boot_secondary() 33 pr_err("no gcr device node\n"); in npcm7xx_smp_boot_secondary() 39 pr_err("could not iomap gcr"); in npcm7xx_smp_boot_secondary()
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/reset/ |
| D | nuvoton,npcm750-reset.yaml | 26 description: a phandle to access GCR registers. 51 nuvoton,sysgcr = <&gcr>;
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| /kernel/linux/linux-6.6/sound/soc/stm/ |
| D | stm32_sai.c | 72 /* Enable peripheral clock to allow GCR register access */ in stm32_sai_sync_conf_client() 89 /* Enable peripheral clock to allow GCR register access */ in stm32_sai_sync_conf_provider() 252 sai->gcr = readl_relaxed(sai->base); in stm32_sai_suspend() 267 writel_relaxed(sai->gcr, sai->base); in stm32_sai_resume()
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | nuvoton-common-npcm7xx.dtsi | 66 gcr: gcr@800000 { label 67 compatible = "nuvoton,npcm750-gcr", "syscon",
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| /kernel/linux/linux-5.10/sound/soc/stm/ |
| D | stm32_sai.c | 72 /* Enable peripheral clock to allow GCR register access */ in stm32_sai_sync_conf_client() 89 /* Enable peripheral clock to allow GCR register access */ in stm32_sai_sync_conf_provider() 263 sai->gcr = readl_relaxed(sai->base); in stm32_sai_suspend() 278 writel_relaxed(sai->gcr, sai->base); in stm32_sai_resume()
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| /kernel/linux/linux-5.10/drivers/gpio/ |
| D | gpio-xra1403.c | 125 unsigned int gcr; in xra1403_dbg_show() local 138 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR]; in xra1403_dbg_show() 143 (gcr & BIT(i)) ? "in" : "out", in xra1403_dbg_show()
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| /kernel/linux/linux-6.6/drivers/gpio/ |
| D | gpio-xra1403.c | 124 unsigned int gcr; in xra1403_dbg_show() local 137 gcr = value[XRA_GCR + 1] << 8 | value[XRA_GCR]; in xra1403_dbg_show() 142 (gcr & BIT(i)) ? "in" : "out", in xra1403_dbg_show()
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| /kernel/linux/linux-6.6/drivers/reset/ |
| D | reset-npcm.c | 18 /* NPCM7xx GCR registers */ 346 dev_info(&pdev->dev, "Using nuvoton,npcm750-gcr for Poleg backward compatibility\n"); in npcm_usb_reset() 347 rc->gcr_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); in npcm_usb_reset() 349 dev_err(&pdev->dev, "Failed to find nuvoton,npcm750-gcr"); in npcm_usb_reset()
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| /kernel/linux/linux-5.10/drivers/usb/host/ |
| D | ehci-npcm7xx.c | 71 gcr_regmap = syscon_regmap_lookup_by_compatible("nuvoton,npcm750-gcr"); in npcm7xx_ehci_hcd_drv_probe() 73 dev_err(&pdev->dev, "%s: failed to find nuvoton,npcm750-gcr\n", in npcm7xx_ehci_hcd_drv_probe()
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