| /kernel/linux/linux-6.6/drivers/gpu/drm/arm/ |
| D | hdlcd_drv.c | 9 * ARM HDLCD Driver
43 struct hdlcd_drm_private *hdlcd = arg; in hdlcd_irq() local
46 irq_status = hdlcd_read(hdlcd, HDLCD_REG_INT_STATUS); in hdlcd_irq()
50 atomic_inc(&hdlcd->buffer_underrun_count); in hdlcd_irq()
53 atomic_inc(&hdlcd->dma_end_count); in hdlcd_irq()
56 atomic_inc(&hdlcd->bus_error_count); in hdlcd_irq()
59 atomic_inc(&hdlcd->vsync_count); in hdlcd_irq()
63 drm_crtc_handle_vblank(&hdlcd->crtc); in hdlcd_irq()
66 hdlcd_write(hdlcd, HDLCD_REG_INT_CLEAR, irq_status); in hdlcd_irq()
71 static int hdlcd_irq_install(struct hdlcd_drm_private *hdlcd) in hdlcd_irq_install() argument
[all …]
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| D | hdlcd_crtc.c | 9 * Implementation of a CRTC class for the HDLCD driver.
32 * The HDLCD controller is a dumb RGB streamer that gets connected to
40 struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); in hdlcd_crtc_cleanup() local
43 hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0); in hdlcd_crtc_cleanup()
49 struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); in hdlcd_crtc_enable_vblank() local
50 unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); in hdlcd_crtc_enable_vblank()
52 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask | HDLCD_INTERRUPT_VSYNC); in hdlcd_crtc_enable_vblank()
59 struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); in hdlcd_crtc_disable_vblank() local
60 unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); in hdlcd_crtc_disable_vblank()
62 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask & ~HDLCD_INTERRUPT_VSYNC); in hdlcd_crtc_disable_vblank()
[all …]
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| D | hdlcd_drv.h | 3 * ARM HDLCD Controller register definition
27 static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd, in hdlcd_write() argument
30 writel(value, hdlcd->mmio + reg); in hdlcd_write()
33 static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg) in hdlcd_read() argument
35 return readl(hdlcd->mmio + reg); in hdlcd_read()
39 void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);
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| D | Kconfig | 6 tristate "ARM HDLCD"
15 If M is selected the module will be called hdlcd.
23 HDLCD device did not fetch from framebuffer due to underrun
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| D | Makefile | 2 hdlcd-y := hdlcd_drv.o hdlcd_crtc.o
3 obj-$(CONFIG_DRM_HDLCD) += hdlcd.o
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| D | hdlcd_regs.h | 8 * ARM HDLCD Controller register definition
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| /kernel/linux/linux-5.10/drivers/gpu/drm/arm/ |
| D | hdlcd_drv.c | 9 * ARM HDLCD Driver
43 struct hdlcd_drm_private *hdlcd = drm->dev_private; in hdlcd_load() local
49 hdlcd->clk = devm_clk_get(drm->dev, "pxlclk"); in hdlcd_load()
50 if (IS_ERR(hdlcd->clk)) in hdlcd_load()
51 return PTR_ERR(hdlcd->clk); in hdlcd_load()
54 atomic_set(&hdlcd->buffer_underrun_count, 0); in hdlcd_load()
55 atomic_set(&hdlcd->bus_error_count, 0); in hdlcd_load()
56 atomic_set(&hdlcd->vsync_count, 0); in hdlcd_load()
57 atomic_set(&hdlcd->dma_end_count, 0); in hdlcd_load()
61 hdlcd->mmio = devm_ioremap_resource(drm->dev, res); in hdlcd_load()
[all …]
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| D | hdlcd_crtc.c | 9 * Implementation of a CRTC class for the HDLCD driver.
33 * The HDLCD controller is a dumb RGB streamer that gets connected to
41 struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); in hdlcd_crtc_cleanup() local
44 hdlcd_write(hdlcd, HDLCD_REG_COMMAND, 0); in hdlcd_crtc_cleanup()
50 struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); in hdlcd_crtc_enable_vblank() local
51 unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); in hdlcd_crtc_enable_vblank()
53 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask | HDLCD_INTERRUPT_VSYNC); in hdlcd_crtc_enable_vblank()
60 struct hdlcd_drm_private *hdlcd = crtc_to_hdlcd_priv(crtc); in hdlcd_crtc_disable_vblank() local
61 unsigned int mask = hdlcd_read(hdlcd, HDLCD_REG_INT_MASK); in hdlcd_crtc_disable_vblank()
63 hdlcd_write(hdlcd, HDLCD_REG_INT_MASK, mask & ~HDLCD_INTERRUPT_VSYNC); in hdlcd_crtc_disable_vblank()
[all …]
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| D | hdlcd_drv.h | 3 * ARM HDLCD Controller register definition
24 static inline void hdlcd_write(struct hdlcd_drm_private *hdlcd, in hdlcd_write() argument
27 writel(value, hdlcd->mmio + reg); in hdlcd_write()
30 static inline u32 hdlcd_read(struct hdlcd_drm_private *hdlcd, unsigned int reg) in hdlcd_read() argument
32 return readl(hdlcd->mmio + reg); in hdlcd_read()
36 void hdlcd_set_scanout(struct hdlcd_drm_private *hdlcd);
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| D | Kconfig | 5 tristate "ARM HDLCD"
14 If M is selected the module will be called hdlcd.
22 HDLCD device did not fetch from framebuffer due to underrun
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| D | Makefile | 2 hdlcd-y := hdlcd_drv.o hdlcd_crtc.o
3 obj-$(CONFIG_DRM_HDLCD) += hdlcd.o
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| D | hdlcd_regs.h | 8 * ARM HDLCD Controller register definition
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/display/ |
| D | arm,hdlcd.yaml | 4 $id: http://devicetree.org/schemas/display/arm,hdlcd.yaml#
7 title: Arm HDLCD display controller
14 The Arm HDLCD is a display controller found on several development platforms
15 produced by ARM Ltd and in more modern of its Fast Models. The HDLCD is an
21 const: arm,hdlcd
62 hdlcd@2b000000 {
63 compatible = "arm,hdlcd";
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/display/ |
| D | arm,hdlcd.txt | 1 ARM HDLCD
4 by ARM Ltd and in more modern of its' Fast Models. The HDLCD is an RGB
9 - compatible: "arm,hdlcd"
16 - clock-names: A list of clock names. For HDLCD it should contain:
20 - port: The HDLCD connection to an encoder chip. The connection is modeled
36 hdlcd@2b000000 {
37 compatible = "arm,hdlcd";
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| /kernel/linux/linux-6.6/arch/arm/boot/dts/arm/ |
| D | vexpress-v2p-ca5s.dts | 72 hdlcd@2a110000 {
73 compatible = "arm,hdlcd";
176 /* HDLCD */
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| D | vexpress-v2p-ca15-tc1.dts | 70 hdlcd@2b000000 {
71 compatible = "arm,hdlcd";
164 /* HDLCD PLL reference clock */
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| D | vexpress-v2p-ca15_a7.dts | 134 hdlcd@2b000000 {
135 compatible = "arm,hdlcd";
302 /* HDLCD PLL reference clock */
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/ |
| D | arm,scpi.txt | 181 hdlcd@7ff60000 {
208 Similarly the second example is hdlcd@7ff60000 and it has pxlclk1 as input
218 SCPI provides 2 power domains. The hdlcd node uses the power domain with
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| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | vexpress-v2p-ca5s.dts | 72 hdlcd@2a110000 {
73 compatible = "arm,hdlcd";
176 /* HDLCD */
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| D | vexpress-v2p-ca15-tc1.dts | 70 hdlcd@2b000000 {
71 compatible = "arm,hdlcd";
164 /* HDLCD PLL reference clock */
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| /kernel/linux/linux-5.10/drivers/gpu/drm/pl111/ |
| D | pl111_versatile.c | 394 * Check if we have a CLCD or HDLCD on the core tile by checking if a in pl111_vexpress_clcd_init()
395 * CLCD or HDLCD is available in the root of the device tree. in pl111_vexpress_clcd_init()
408 if (of_device_is_compatible(child, "arm,hdlcd")) { in pl111_vexpress_clcd_init()
418 * If there is a coretile HDLCD and it has a driver, in pl111_vexpress_clcd_init()
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| /kernel/linux/linux-6.6/drivers/gpu/drm/pl111/ |
| D | pl111_versatile.c | 397 * Check if we have a CLCD or HDLCD on the core tile by checking if a in pl111_vexpress_clcd_init()
398 * CLCD or HDLCD is available in the root of the device tree. in pl111_vexpress_clcd_init()
411 if (of_device_is_compatible(child, "arm,hdlcd")) { in pl111_vexpress_clcd_init()
421 * If there is a coretile HDLCD and it has a driver, in pl111_vexpress_clcd_init()
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| /kernel/linux/linux-6.6/arch/arm64/boot/dts/arm/ |
| D | juno-scmi.dtsi | 34 hdlcd@7ff50000 {
38 hdlcd@7ff60000 {
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| D | juno-base.dtsi | 869 hdlcd@7ff50000 {
870 compatible = "arm,hdlcd";
884 hdlcd@7ff60000 {
885 compatible = "arm,hdlcd";
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/arm/ |
| D | juno-base.dtsi | 716 hdlcd@7ff50000 {
717 compatible = "arm,hdlcd";
731 hdlcd@7ff60000 {
732 compatible = "arm,hdlcd";
|