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/kernel/linux/linux-5.10/include/linux/
Dhost1x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2009-2013, NVIDIA Corporation. All rights reserved.
20 struct host1x;
24 u64 host1x_get_dma_mask(struct host1x *host1x);
27 * struct host1x_client_ops - host1x client operations
28 * @init: host1x client initialization code
29 * @exit: host1x client tear down code
30 * @suspend: host1x client suspend code
31 * @resume: host1x client resume code
41 * struct host1x_client - host1x client structure
[all …]
/kernel/linux/linux-6.6/include/linux/
Dhost1x.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2009-2013, NVIDIA Corporation. All rights reserved.
10 #include <linux/dma-direction.h>
11 #include <linux/dma-fence.h>
25 struct host1x;
29 u64 host1x_get_dma_mask(struct host1x *host1x);
32 * struct host1x_bo_cache - host1x buffer object cache
48 INIT_LIST_HEAD(&cache->mappings); in host1x_bo_cache_init()
49 mutex_init(&cache->lock); in host1x_bo_cache_init()
55 mutex_destroy(&cache->lock); in host1x_bo_cache_destroy()
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/gpu/host1x/
Dnvidia,tegra210-nvdec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvdec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvdec@[0-9a-f]*$"
24 - nvidia,tegra210-nvdec
[all …]
Dnvidia,tegra210-nvenc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpu/host1x/nvidia,tegra210-nvenc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 and newer chips. It is located on the Host1x bus and typically
12 programmed through Host1x channels.
15 - Thierry Reding <treding@gmail.com>
16 - Mikko Perttunen <mperttunen@nvidia.com>
20 pattern: "^nvenc@[0-9a-f]*$"
24 - nvidia,tegra210-nvenc
[all …]
/kernel/linux/linux-6.6/drivers/gpu/host1x/hw/
Dcdma_hw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x Command DMA
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
10 #include <linux/dma-mapping.h>
22 *(u32 *)(pb->mapped + pb->size) = host1x_opcode_restart(0); in push_buffer_init()
34 host1x_syncpt_incr(cdma->timeout.syncpt); in cdma_timeout_cpu_incr()
37 host1x_syncpt_load(cdma->timeout.syncpt); in cdma_timeout_cpu_incr()
48 if (cdma->running) in cdma_start()
51 cdma->last_pos = cdma->push_buffer.pos; in cdma_start()
52 start = cdma->push_buffer.dma; in cdma_start()
[all …]
Dchannel_hw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x Channel
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
8 #include <linux/host1x.h>
12 #include <trace/events/host1x.h>
24 struct device *dev = cdma_to_channel(cdma)->dev; in trace_write_gather()
37 u32 num_words = min(words - i, TRACE_MAX_LENGTH); in trace_write_gather()
53 struct host1x_cdma *cdma = &job->channel->cdma; in submit_wait()
63 if (job->memory_context) in submit_wait()
64 stream_id = job->memory_context->stream_id; in submit_wait()
[all …]
Ddebug_hw_1x06.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011-2017 NVIDIA Corporation
14 static void host1x_debug_show_channel_cdma(struct host1x *host, in host1x_debug_show_channel_cdma()
18 struct host1x_cdma *cdma = &ch->cdma; in host1x_debug_show_channel_cdma()
21 u32 offset, class; in host1x_debug_show_channel_cdma() local
40 class = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDP_CLASS); in host1x_debug_show_channel_cdma()
43 host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev)); in host1x_debug_show_channel_cdma()
46 !ch->cdma.push_buffer.mapped) { in host1x_debug_show_channel_cdma()
51 if (class == HOST1X_CLASS_HOST1X && offset == HOST1X_UCLASS_WAIT_SYNCPT) in host1x_debug_show_channel_cdma()
54 host1x_debug_output(o, "active class %02x, offset %04x\n", in host1x_debug_show_channel_cdma()
[all …]
Ddebug_hw_1x01.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011-2013 NVIDIA Corporation
14 static void host1x_debug_show_channel_cdma(struct host1x *host, in host1x_debug_show_channel_cdma()
18 struct host1x_cdma *cdma = &ch->cdma; in host1x_debug_show_channel_cdma()
29 cbread = host1x_sync_readl(host, HOST1X_SYNC_CBREAD(ch->id)); in host1x_debug_show_channel_cdma()
30 cbstat = host1x_sync_readl(host, HOST1X_SYNC_CBSTAT(ch->id)); in host1x_debug_show_channel_cdma()
32 host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev)); in host1x_debug_show_channel_cdma()
35 !ch->cdma.push_buffer.mapped) { in host1x_debug_show_channel_cdma()
57 host1x_debug_output(o, "active class %02x, offset %04x, val %08x\n", in host1x_debug_show_channel_cdma()
71 static void host1x_debug_show_channel_fifo(struct host1x *host, in host1x_debug_show_channel_fifo()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/host1x/hw/
Ddebug_hw_1x06.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011-2017 NVIDIA Corporation
14 static void host1x_debug_show_channel_cdma(struct host1x *host, in host1x_debug_show_channel_cdma()
18 struct host1x_cdma *cdma = &ch->cdma; in host1x_debug_show_channel_cdma()
20 u32 offset, class; in host1x_debug_show_channel_cdma() local
27 class = host1x_ch_readl(ch, HOST1X_CHANNEL_CMDP_CLASS); in host1x_debug_show_channel_cdma()
30 host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev)); in host1x_debug_show_channel_cdma()
33 !ch->cdma.push_buffer.mapped) { in host1x_debug_show_channel_cdma()
38 if (class == HOST1X_CLASS_HOST1X && offset == HOST1X_UCLASS_WAIT_SYNCPT) in host1x_debug_show_channel_cdma()
41 host1x_debug_output(o, "active class %02x, offset %04x\n", in host1x_debug_show_channel_cdma()
[all …]
Dchannel_hw.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x Channel
5 * Copyright (c) 2010-2013, NVIDIA Corporation.
8 #include <linux/host1x.h>
12 #include <trace/events/host1x.h>
24 struct device *dev = cdma_to_channel(cdma)->dev; in trace_write_gather()
37 u32 num_words = min(words - i, TRACE_MAX_LENGTH); in trace_write_gather()
52 struct host1x_cdma *cdma = &job->channel->cdma; in submit_gathers()
54 struct device *dev = job->channel->dev; in submit_gathers()
58 for (i = 0; i < job->num_gathers; i++) { in submit_gathers()
[all …]
Ddebug_hw_1x01.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (C) 2011-2013 NVIDIA Corporation
14 static void host1x_debug_show_channel_cdma(struct host1x *host, in host1x_debug_show_channel_cdma()
18 struct host1x_cdma *cdma = &ch->cdma; in host1x_debug_show_channel_cdma()
26 cbread = host1x_sync_readl(host, HOST1X_SYNC_CBREAD(ch->id)); in host1x_debug_show_channel_cdma()
27 cbstat = host1x_sync_readl(host, HOST1X_SYNC_CBSTAT(ch->id)); in host1x_debug_show_channel_cdma()
29 host1x_debug_output(o, "%u-%s: ", ch->id, dev_name(ch->dev)); in host1x_debug_show_channel_cdma()
32 !ch->cdma.push_buffer.mapped) { in host1x_debug_show_channel_cdma()
54 host1x_debug_output(o, "active class %02x, offset %04x, val %08x\n", in host1x_debug_show_channel_cdma()
67 static void host1x_debug_show_channel_fifo(struct host1x *host, in host1x_debug_show_channel_fifo()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/drm/tegra/
Duapi.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/host1x.h>
20 host1x_bo_unpin(mapping->map); in tegra_drm_mapping_release()
21 host1x_bo_put(mapping->bo); in tegra_drm_mapping_release()
28 kref_put(&mapping->ref, tegra_drm_mapping_release); in tegra_drm_mapping_put()
36 if (context->memory_context) in tegra_drm_channel_context_close()
37 host1x_memory_context_put(context->memory_context); in tegra_drm_channel_context_close()
39 xa_for_each(&context->mappings, id, mapping) in tegra_drm_channel_context_close()
42 xa_destroy(&context->mappings); in tegra_drm_channel_context_close()
44 host1x_channel_put(context->channel); in tegra_drm_channel_context_close()
[all …]
Ddrm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/host1x.h>
27 #include <asm/dma-iommu.h>
76 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
77 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
79 if (tegra->hub) { in tegra_atomic_commit_tail()
108 return -ENOMEM; in tegra_drm_open()
110 idr_init_base(&fpriv->legacy_contexts, 1); in tegra_drm_open()
111 xa_init_flags(&fpriv->contexts, XA_FLAGS_ALLOC1); in tegra_drm_open()
[all …]
Ddrm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
10 #include <linux/host1x.h>
55 static inline struct host1x *tegra_drm_to_host1x(struct tegra_drm *tegra) in tegra_drm_to_host1x()
57 return dev_get_drvdata(tegra->drm->dev->parent); in tegra_drm_to_host1x()
78 int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
79 int (*is_valid_class)(u32 class);
Dgr2d.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2013, NVIDIA Corporation.
52 struct drm_device *dev = dev_get_drvdata(client->host); in gr2d_init()
57 gr2d->channel = host1x_channel_request(client); in gr2d_init()
58 if (!gr2d->channel) in gr2d_init()
59 return -ENOMEM; in gr2d_init()
61 client->syncpts[0] = host1x_syncpt_request(client, flags); in gr2d_init()
62 if (!client->syncpts[0]) { in gr2d_init()
63 err = -ENOMEM; in gr2d_init()
64 dev_err(client->dev, "failed to request syncpoint: %d\n", err); in gr2d_init()
[all …]
Dnvdec.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2015-2022, NVIDIA Corporation.
8 #include <linux/dma-mapping.h>
9 #include <linux/host1x.h>
50 /* RISC-V specific data */
63 writel(value, nvdec->regs + offset); in nvdec_writel()
71 if (nvdec->config->supports_sid && tegra_dev_iommu_get_stream_id(nvdec->dev, &stream_id)) { in nvdec_boot_falcon()
81 err = falcon_boot(&nvdec->falcon); in nvdec_boot_falcon()
85 err = falcon_wait_idle(&nvdec->falcon); in nvdec_boot_falcon()
87 dev_err(nvdec->dev, "falcon boot timed out\n"); in nvdec_boot_falcon()
[all …]
Dsubmit.c1 // SPDX-License-Identifier: GPL-2.0-only
4 #include <linux/dma-fence-array.h>
5 #include <linux/dma-mapping.h>
7 #include <linux/host1x.h>
27 dev_err_ratelimited(context->client->base.dev, \
29 current->comm, ##__VA_ARGS__)
46 kref_get(&bo->ref); in gather_bo_get()
55 dma_free_attrs(bo->dev, bo->gather_data_words * 4, bo->gather_data, bo->gather_data_dma, in gather_bo_release()
64 kref_put(&bo->ref, gather_bo_release); in gather_bo_put()
76 return ERR_PTR(-ENOMEM); in gather_bo_pin()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/host1x/
Djob.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x Job
5 * Copyright (c) 2010-2015, NVIDIA Corporation.
8 #include <linux/dma-mapping.h>
10 #include <linux/host1x.h>
17 #include <trace/events/host1x.h>
51 kref_init(&job->ref); in host1x_job_alloc()
52 job->channel = ch; in host1x_job_alloc()
56 job->relocs = num_relocs ? mem : NULL; in host1x_job_alloc()
58 job->unpins = num_unpins ? mem : NULL; in host1x_job_alloc()
[all …]
Dbus.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2013, NVIDIA Corporation
8 #include <linux/host1x.h>
33 * host1x_subdev_add() - add a new subdevice with an associated device node
34 * @device: host1x device to add the subdevice to
47 return -ENOMEM; in host1x_subdev_add()
49 INIT_LIST_HEAD(&subdev->list); in host1x_subdev_add()
50 subdev->np = of_node_get(np); in host1x_subdev_add()
52 mutex_lock(&device->subdevs_lock); in host1x_subdev_add()
53 list_add_tail(&subdev->list, &device->subdevs); in host1x_subdev_add()
[all …]
/kernel/linux/linux-6.6/drivers/gpu/host1x/
Djob.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Tegra host1x Job
5 * Copyright (c) 2010-2015, NVIDIA Corporation.
8 #include <linux/dma-mapping.h>
10 #include <linux/host1x.h>
17 #include <trace/events/host1x.h>
55 job->enable_firewall = enable_firewall; in host1x_job_alloc()
57 kref_init(&job->ref); in host1x_job_alloc()
58 job->channel = ch; in host1x_job_alloc()
62 job->relocs = num_relocs ? mem : NULL; in host1x_job_alloc()
[all …]
Dbus.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2013, NVIDIA Corporation
8 #include <linux/dma-mapping.h>
9 #include <linux/host1x.h>
34 * host1x_subdev_add() - add a new subdevice with an associated device node
35 * @device: host1x device to add the subdevice to
36 * @driver: host1x driver containing the subdevices
49 return -ENOMEM; in host1x_subdev_add()
51 INIT_LIST_HEAD(&subdev->list); in host1x_subdev_add()
52 subdev->np = of_node_get(np); in host1x_subdev_add()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/tegra/
Dgr2d.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2012-2013, NVIDIA Corporation.
37 struct drm_device *dev = dev_get_drvdata(client->host); in gr2d_init()
42 gr2d->channel = host1x_channel_request(client); in gr2d_init()
43 if (!gr2d->channel) in gr2d_init()
44 return -ENOMEM; in gr2d_init()
46 client->syncpts[0] = host1x_syncpt_request(client, flags); in gr2d_init()
47 if (!client->syncpts[0]) { in gr2d_init()
48 err = -ENOMEM; in gr2d_init()
49 dev_err(client->dev, "failed to request syncpoint: %d\n", err); in gr2d_init()
[all …]
Ddrm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (C) 2012-2016 NVIDIA CORPORATION. All rights reserved.
8 #include <linux/host1x.h>
64 struct drm_device *drm = old_state->dev; in tegra_atomic_commit_tail()
65 struct tegra_drm *tegra = drm->dev_private; in tegra_atomic_commit_tail()
67 if (tegra->hub) { in tegra_atomic_commit_tail()
91 return -ENOMEM; in tegra_drm_open()
93 idr_init_base(&fpriv->contexts, 1); in tegra_drm_open()
94 mutex_init(&fpriv->lock); in tegra_drm_open()
95 filp->driver_priv = fpriv; in tegra_drm_open()
[all …]
Dgr3d.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/host1x.h>
46 struct drm_device *dev = dev_get_drvdata(client->host); in gr3d_init()
51 gr3d->channel = host1x_channel_request(client); in gr3d_init()
52 if (!gr3d->channel) in gr3d_init()
53 return -ENOMEM; in gr3d_init()
55 client->syncpts[0] = host1x_syncpt_request(client, flags); in gr3d_init()
56 if (!client->syncpts[0]) { in gr3d_init()
57 err = -ENOMEM; in gr3d_init()
58 dev_err(client->dev, "failed to request syncpoint: %d\n", err); in gr3d_init()
[all …]
Dvic.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <linux/dma-mapping.h>
9 #include <linux/host1x.h>
53 writel(value, vic->regs + offset); in vic_writel()
61 err = clk_prepare_enable(vic->clk); in vic_runtime_resume()
67 err = reset_control_deassert(vic->rst); in vic_runtime_resume()
76 clk_disable_unprepare(vic->clk); in vic_runtime_resume()
85 err = reset_control_assert(vic->rst); in vic_runtime_suspend()
91 clk_disable_unprepare(vic->clk); in vic_runtime_suspend()
93 vic->booted = false; in vic_runtime_suspend()
[all …]

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