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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,htvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips for
18 const: loongson,htvec-1.0
21 maxItems: 1
24 minItems: 1
[all …]
Dloongson,pch-pic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
14 transforming interrupts from on-chip devices into HyperTransport vectorized
19 const: loongson,pch-pic-1.0
22 maxItems: 1
24 loongson,pic-base-vec:
32 interrupt-controller: true
[all …]
Dloongson,pch-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
19 const: loongson,pch-msi-1.0
22 maxItems: 1
24 loongson,msi-base-vec:
32 loongson,msi-num-vecs:
37 minimum: 1
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/interrupt-controller/
Dloongson,htvec.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Loongson-3 HyperTransport Interrupt Vector Controller
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
13 This interrupt controller is found in the Loongson-3 family of chips for
18 const: loongson,htvec-1.0
21 maxItems: 1
24 minItems: 1
[all …]
Dloongson,pch-pic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
14 transforming interrupts from on-chip devices into HyperTransport vectorized
19 const: loongson,pch-pic-1.0
22 maxItems: 1
24 loongson,pic-base-vec:
32 interrupt-controller: true
[all …]
Dloongson,pch-msi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-msi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jiaxun Yang <jiaxun.yang@flygoat.com>
19 const: loongson,pch-msi-1.0
22 maxItems: 1
24 loongson,msi-base-vec:
32 loongson,msi-num-vecs:
37 minimum: 1
[all …]
/kernel/linux/linux-6.6/arch/mips/boot/dts/loongson/
Dloongson64g_4core_ls7a.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "loongson64g-package.dtsi"
6 #include "ls7a-pch.dtsi"
9 compatible = "loongson,loongson64g-4core-ls7a";
13 htvec: interrupt-controller@efdfb000080 { label
14 compatible = "loongson,htvec-1.0";
16 interrupt-controller;
17 #interrupt-cells = <1>;
19 interrupt-parent = <&liointc>;
[all …]
Dloongson64c_4core_ls7a.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "loongson64c-package.dtsi"
6 #include "ls7a-pch.dtsi"
9 compatible = "loongson,loongson64c-4core-ls7a";
13 htvec: interrupt-controller@efdfb000080 { label
14 compatible = "loongson,htvec-1.0";
16 interrupt-controller;
17 #interrupt-cells = <1>;
19 interrupt-parent = <&liointc>;
[all …]
Dls7a-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
19 #interrupt-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/mips/boot/dts/loongson/
Dloongson64c_4core_ls7a.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "loongson64c-package.dtsi"
6 #include "ls7a-pch.dtsi"
9 compatible = "loongson,loongson64c-4core-ls7a";
13 htvec: interrupt-controller@efdfb000080 { label
14 compatible = "loongson,htvec-1.0";
16 interrupt-controller;
17 #interrupt-cells = <1>;
19 interrupt-parent = <&liointc>;
[all …]
Dloongson64g_4core_ls7a.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "loongson64g-package.dtsi"
6 #include "ls7a-pch.dtsi"
9 compatible = "loongson,loongson64g-4core-ls7a";
13 htvec: interrupt-controller@efdfb000080 { label
14 compatible = "loongson,htvec-1.0";
16 interrupt-controller;
17 #interrupt-cells = <1>;
19 interrupt-parent = <&liointc>;
[all …]
Dls7a-pch.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 compatible = "simple-bus";
6 #address-cells = <2>;
7 #size-cells = <2>;
13 pic: interrupt-controller@10000000 {
14 compatible = "loongson,pch-pic-1.0";
16 interrupt-controller;
17 interrupt-parent = <&htvec>;
18 loongson,pic-base-vec = <0>;
19 #interrupt-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/loongarch/kernel/
Dacpi.c1 // SPDX-License-Identifier: GPL-2.0
3 * acpi.c - Architecture-Specific Low-Level ACPI Boot Support
25 int acpi_strict = 1; /* We have no workarounds on LoongArch */
39 *irqp = acpi_register_gsi(NULL, gsi, -1, -1); in acpi_gsi_to_irq()
40 return (*irqp >= 0) ? 0 : -EINVAL; in acpi_gsi_to_irq()
62 fwspec.fwnode = liointc_domain->fwnode; in acpi_register_gsi()
63 fwspec.param[0] = gsi - GSI_MIN_CPU_IRQ; in acpi_register_gsi()
64 fwspec.param[1] = acpi_dev_get_irq_type(trigger, polarity); in acpi_register_gsi()
71 return -EINVAL; in acpi_register_gsi()
73 fwspec.fwnode = pch_lpc_domain->fwnode; in acpi_register_gsi()
[all …]