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/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Di2c-pxa.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP I2C controller
10 - Rob Herring <robh+dt@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
17 - mrvl,i2c-polling
20 - interrupts
[all …]
Dnvidia,tegra20-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/nvidia,tegra20-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Thierry Reding <thierry.reding@gmail.com>
9 - Jon Hunter <jonathanh@nvidia.com>
11 title: NVIDIA Tegra I2C controller driver
16 - description: Tegra20 has 4 generic I2C controller. This can support
17 master and slave mode of I2C communication. The i2c-tegra driver
18 only support master mode of I2C communication. Driver of I2C
[all …]
Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Di2c-pxa.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/i2c/i2c-pxa.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP I2C controller bindings
10 - Rob Herring <robh+dt@kernel.org>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
17 - mrvl,i2c-polling
20 - interrupts
[all …]
Dnvidia,tegra20-i2c.txt1 NVIDIA Tegra20/Tegra30/Tegra114 I2C controller driver.
4 - compatible : For Tegra20, must be one of "nvidia,tegra20-i2c-dvc" or
5 "nvidia,tegra20-i2c". For Tegra30, must be "nvidia,tegra30-i2c".
6 For Tegra114, must be "nvidia,tegra114-i2c". Otherwise, must be
7 "nvidia,<chip>-i2c", plus at least one of the above, where <chip> is
10 nvidia,tegra20-i2c-dvc: Tegra20 has specific I2C controller called as DVC I2C
11 controller. This only support master mode of I2C communication. Register
12 interface/offset and interrupts handling are different than generic I2C
13 controller. Driver of DVC I2C controller is only compatible with
14 "nvidia,tegra20-i2c-dvc".
[all …]
Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: I2C controller embedded in STMicroelectronics STM32 I2C platform
10 - Pierre-Yves MORDRET <pierre-yves.mordret@st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp15-i2c
[all …]
Di2c-st.txt1 ST SSC binding, for I2C mode operation
4 - compatible : Must be "st,comms-ssc-i2c" or "st,comms-ssc4-i2c"
5 - reg : Offset and length of the register set for the device
6 - interrupts : the interrupt specifier
7 - clock-names: Must contain "ssc".
8 - clocks: Must contain an entry for each name in clock-names. See the common
10 - A pinctrl state named "default" must be defined to set pins in mode of
11 operation for I2C transfer.
14 - clock-frequency : Desired I2C bus clock frequency in Hz. If not specified,
15 the default 100 kHz frequency will be used. As only Normal and Fast modes
[all …]
Di2c-exynos5.txt1 * Samsung's High Speed I2C controller
3 The Samsung's High Speed I2C controller is used to interface with I2C devices
7 - compatible: value should be.
8 -> "samsung,exynos5-hsi2c", (DEPRECATED)
9 for i2c compatible with HSI2C available
11 -> "samsung,exynos5250-hsi2c", for i2c compatible with HSI2C available
13 -> "samsung,exynos5260-hsi2c", for i2c compatible with HSI2C available
15 -> "samsung,exynos7-hsi2c", for i2c compatible with HSI2C available
18 - reg: physical base address of the controller and length of memory mapped
20 - interrupts: interrupt number to the cpu.
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/pinctrl/
Dbrcm,bcm11351-pinctrl.txt10 - compatible: Must be "brcm,bcm11351-pinctrl"
11 - reg: Base address of the PAD Controller register block and the size
17 compatible = "brcm,bcm11351-pinctrl";
27 Each pin configuration node is a sub-node of the pin controller node and is a
31 Please refer to the pinctrl-bindings.txt in this directory for details of the
45 details generic pin config properties, please refer to pinctrl-bindings.txt
46 and <include/linux/pinctrl/pinconfig-generic.h>.
49 Standard, I2C, and HDMI. Each type accepts a different set of pin config
54 - pins: Multiple strings. Specifies the name(s) of one or more pins to
59 - function: String. Specifies the pin mux selection. Values
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-synquacer.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/i2c.h>
25 /* I2C register address definitions */
35 /* I2C register bit definitions */
56 #define SYNQUACER_I2C_CCR_FM BIT(6) // Speed Mode Select
68 /* STANDARD MODE frequency */
70 DIV_ROUND_UP(DIV_ROUND_UP((rate), I2C_MAX_STANDARD_MODE_FREQ) - 2, 2)
71 /* FAST MODE frequency */
73 DIV_ROUND_UP((DIV_ROUND_UP((rate), I2C_MAX_FAST_MODE_FREQ) - 2) * 2, 3)
76 /* calculate the value of CS bits in CCR register on standard mode */
[all …]
Di2c-designware-master.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver (master only).
5 * Based on the TI DAVINCI I2C adapter driver.
16 #include <linux/i2c.h>
25 #include "i2c-designware-core.h"
34 regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2); in i2c_dw_configure_fifo_master()
35 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_master()
37 /* Configure the I2C master */ in i2c_dw_configure_fifo_master()
38 regmap_write(dev->map, DW_IC_CON, dev->master_cfg); in i2c_dw_configure_fifo_master()
45 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
[all …]
Di2c-stm32f4.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32 I2C controller
5 * This I2C controller is described in the STM32F429/439 Soc reference manual.
13 * This driver is based on i2c-st.c
20 #include <linux/i2c.h>
31 #include "i2c-stm32.h"
33 /* STM32F4 I2C offset registers */
43 /* STM32F4 I2C control 1*/
50 /* STM32F4 I2C control 2 */
60 /* STM32F4 I2C Status 1 */
[all …]
Di2c-designware-core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
17 #include <linux/i2c.h>
193 * struct dw_i2c_dev - private i2c-designware data
203 * @slave: represent an I2C slave device
215 * @status: i2c master status, one of STATUS_*
217 * @irq: interrupt number for the i2c master
219 * @adapter: i2c subsystem adapter node
225 * @rx_outstanding: current master-rx elements in tx fifo
[all …]
Di2c-nomadik.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2009 ST-Ericsson SA
6 * I2C master mode controller driver, used in Nomadik 8815
17 #include <linux/i2c.h>
25 #define DRIVER_NAME "nmk-i2c"
27 /* I2C Controller register offsets */
46 #define I2C_CR_OM (0x3 << 1) /* Operating mode */
47 #define I2C_CR_SAM (0x1 << 3) /* Slave addressing mode */
48 #define I2C_CR_SM (0x3 << 4) /* Speed mode */
49 #define I2C_CR_SGCM (0x1 << 6) /* Slave general call mode */
[all …]
Di2c-tegra.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/i2c/busses/i2c-tegra.c
14 #include <linux/dma-mapping.h>
16 #include <linux/i2c.h>
51 #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5)
52 #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2)
130 #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4)
131 #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16)
144 * I2C Controller will use PIO mode for transfers up to 32 bytes in order to
154 * @MSG_END_REPEAT_START: Send repeat-start.
[all …]
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-synquacer.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/i2c.h>
25 /* I2C register address definitions */
35 /* I2C register bit definitions */
56 #define SYNQUACER_I2C_CCR_FM BIT(6) // Speed Mode Select
68 /* STANDARD MODE frequency */
70 DIV_ROUND_UP(DIV_ROUND_UP((rate), I2C_MAX_STANDARD_MODE_FREQ) - 2, 2)
71 /* FAST MODE frequency */
73 DIV_ROUND_UP((DIV_ROUND_UP((rate), I2C_MAX_FAST_MODE_FREQ) - 2) * 2, 3)
76 /* calculate the value of CS bits in CCR register on standard mode */
[all …]
Di2c-designware-master.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Synopsys DesignWare I2C adapter driver (master only).
5 * Based on the TI DAVINCI I2C adapter driver.
16 #include <linux/i2c.h>
24 #include "i2c-designware-core.h"
29 regmap_write(dev->map, DW_IC_TX_TL, dev->tx_fifo_depth / 2); in i2c_dw_configure_fifo_master()
30 regmap_write(dev->map, DW_IC_RX_TL, 0); in i2c_dw_configure_fifo_master()
32 /* Configure the I2C master */ in i2c_dw_configure_fifo_master()
33 regmap_write(dev->map, DW_IC_CON, dev->master_cfg); in i2c_dw_configure_fifo_master()
41 struct i2c_timings *t = &dev->timings; in i2c_dw_set_timings_master()
[all …]
Di2c-designware-core.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Synopsys DesignWare I2C adapter driver.
5 * Based on the TI DAVINCI I2C adapter driver.
17 #include <linux/i2c.h>
183 * struct dw_i2c_dev - private i2c-designware data
192 * @slave: represent an I2C slave device
205 * @status: i2c master status, one of STATUS_*
207 * @irq: interrupt number for the i2c master
208 * @adapter: i2c subsystem adapter node
212 * @rx_outstanding: current master-rx elements in tx fifo
[all …]
Di2c-stm32f4.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for STMicroelectronics STM32 I2C controller
5 * This I2C controller is described in the STM32F429/439 Soc reference manual.
13 * This driver is based on i2c-st.c
20 #include <linux/i2c.h>
31 #include "i2c-stm32.h"
33 /* STM32F4 I2C offset registers */
43 /* STM32F4 I2C control 1*/
50 /* STM32F4 I2C control 2 */
60 /* STM32F4 I2C Status 1 */
[all …]
Di2c-nomadik.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2009 ST-Ericsson SA
6 * I2C master mode controller driver, used in Nomadik 8815
17 #include <linux/i2c.h>
25 #define DRIVER_NAME "nmk-i2c"
27 /* I2C Controller register offsets */
46 #define I2C_CR_OM (0x3 << 1) /* Operating mode */
47 #define I2C_CR_SAM (0x1 << 3) /* Slave addressing mode */
48 #define I2C_CR_SM (0x3 << 4) /* Speed mode */
49 #define I2C_CR_SGCM (0x1 << 6) /* Slave general call mode */
[all …]
Di2c-tegra.c1 // SPDX-License-Identifier: GPL-2.0
3 * drivers/i2c/busses/i2c-tegra.c
13 #include <linux/dma-mapping.h>
15 #include <linux/i2c.h>
50 #define I2C_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 5)
51 #define I2C_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 2)
129 #define I2C_MST_FIFO_CONTROL_RX_TRIG(x) (((x) - 1) << 4)
130 #define I2C_MST_FIFO_CONTROL_TX_TRIG(x) (((x) - 1) << 16)
143 * I2C Controller will use PIO mode for transfers up to 32 bytes in order to
153 * @MSG_END_REPEAT_START: Send repeat-start.
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/power/supply/
Drichtek,rt5033-charger.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/richtek,rt5033-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jakob Hauser <jahau@rocketmail.com>
14 under sub-node named "charger" using the following format.
18 const: richtek,rt5033-charger
20 monitored-battery:
26 precharge-current-microamp:
27 Current of pre-charge mode. The pre-charge current levels are 350 mA
[all …]
/kernel/linux/linux-5.10/include/linux/
Di2c-algo-pca.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #define I2C_PCA_OSC_PER 3 /* e10-8s */
34 #define I2C_PCA_ICOUNT 0x00 /* Byte Count for buffered mode */
40 #define I2C_PCA_IMODE 0x06 /* I2C Bus mode */
42 /* PCA9665 I2C bus mode */
43 #define I2C_PCA_MODE_STD 0x00 /* Standard mode */
44 #define I2C_PCA_MODE_FAST 0x01 /* Fast mode */
45 #define I2C_PCA_MODE_FASTP 0x02 /* Fast Plus mode */
46 #define I2C_PCA_MODE_TURBO 0x03 /* Turbo mode */
57 * struct pca_i2c_bus_settings - The configured PCA i2c bus settings
[all …]
/kernel/linux/linux-6.6/include/linux/
Di2c-algo-pca.h1 /* SPDX-License-Identifier: GPL-2.0 */
10 #define I2C_PCA_OSC_PER 3 /* e10-8s */
34 #define I2C_PCA_ICOUNT 0x00 /* Byte Count for buffered mode */
40 #define I2C_PCA_IMODE 0x06 /* I2C Bus mode */
42 /* PCA9665 I2C bus mode */
43 #define I2C_PCA_MODE_STD 0x00 /* Standard mode */
44 #define I2C_PCA_MODE_FAST 0x01 /* Fast mode */
45 #define I2C_PCA_MODE_FASTP 0x02 /* Fast Plus mode */
46 #define I2C_PCA_MODE_TURBO 0x03 /* Turbo mode */
57 * struct pca_i2c_bus_settings - The configured PCA i2c bus settings
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/marvell/
Darmada-3720-uDPU.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3)
12 /dts-v1/;
14 #include <dt-bindings/gpio/gpio.h>
15 #include "armada-372x.dtsi"
22 stdout-path = "serial0:115200n8";
31 pinctrl-names = "default";
32 compatible = "gpio-leds";
65 sfp_eth0: sfp-eth0 {
67 i2c-bus = <&i2c0>;
[all …]

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