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Searched +full:intel +full:- +full:whl +full:- +full:test (Results 1 – 7 of 7) sorted by relevance

/third_party/mesa3d/src/intel/ci/
Dgitlab-ci.yml1 .intel-common-test:
3 - .lava-test:amd64
8 FLAKES_CHANNEL: "#intel-ci"
11 .anv-test:
13 - .intel-common-test
14 - .anv-rules
18 .iris-test:
20 - .intel-common-test
21 - .iris-rules
25 .intel-test:
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/third_party/mesa3d/src/intel/dev/
Dmeson.build1 # Copyright © 2017 Intel Corporation
42 test('intel_device_info_test',
49 suite : ['intel'],
53 if with_tests and with_tools.contains('drm-shim') and with_tools.contains('intel')
57 [ 90, ['skl', 'kbl', 'aml', 'cml', 'whl', 'bxt', 'glk'] ],
72 test('intel_device_info_override_test_@0@'.format(p),
78 suite : ['intel'],
/third_party/mesa3d/docs/relnotes/
D22.0.0.rst1 Mesa 22.0.0 Release Notes / 2022-03-09
20 ---------------
24 e6c41928b5b9917485bd67cec22d15e62cad7a358bf4c711a647979987601250 mesa-22.0.0.tar.xz
28 ------------
30 - lavapipe,radv,anv KHR_dynamic_rendering
31 - radv EXT_image_view_min_lod
32 - VK_KHR_synchronization2 on RADV.
33 - OpenSWR has been moved to the Amber branch
34 - radeonsi, zink ARB_sparse_texture
35 - d3d12 GLES3.1 (shader storage buffers, images, compute, indirect draw, draw params, ARB_framebuff…
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D19.3.0.rst1 Mesa 19.3.0 Release Notes / 2019-12-12
21 ---------------
25 5fa0e4e9dca79560f6882e362f9db36d81cf96da16cf6a84e0ada7466a99a5d7 mesa-19.3.0.tar.xz
28 ------------
30 - GL_ARB_gl_spirv on i965, iris.
31 - GL_ARB_spirv_extensions on i965, iris.
32 - GL_EXT_demote_to_helper_invocation on iris, i965.
33 - OpenGL 4.6 on i965, iris.
34 - EGL_EXT_image_flush_external
35 - VK_ANDROID_external_memory_android_hardware_buffer on RADV.
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/third_party/mesa3d/ohos/
Ddependency_inputs.gni41 "../bin/khronos-update.py",
42 "../bin/meson-cmd-extract.py",
43 "../bin/meson-options.py",
46 "../bin/perf-annotate-jit.py",
47 "../bin/pick-ui.py",
50 "../bin/symbols-check.py",
51 "../bin/update-android-headers.sh",
58 "../build-support/conftest.dyn",
59 "../build-support/conftest.map",
172 "../include/android_stub/system/graphics-base-v1.0.h",
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/third_party/rust/crates/regex/tests/
Dcrates_regex.rs2 // on 2018-06-20 09:56:32.820354.
4 // autoshutdown-0.1.0: r"\s*(\d+)(\w)\s*"
7 // epub-1.1.1: r"/"
10 // rpi-info-0.2.0: "^Revision\t+: ([0-9a-fA-F]+)"
11 consistent!(rpi_info_0, "^Revision\t+: ([0-9a-fA-F]+)");
13 // rpi-info-0.2.0: "Serial\t+: ([0-9a-fA-F]+)"
14 consistent!(rpi_info_1, "Serial\t+: ([0-9a-fA-F]+)");
16 // pnet_macros-0.21.0: r"^u([0-9]+)(be|le|he)?$"
17 consistent!(pnet_macros_0, r"^u([0-9]+)(be|le|he)?$");
19 // iban_validate-1.0.3: r"^[A-Z]{2}\d{2}[A-Z\d]{1,30}$"
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/third_party/mesa3d/src/intel/compiler/
Dtest_eu_validate.cpp2 * Copyright © 2016 Intel Corporation
48 { "whl", },
104 struct disasm_info *disasm = disasm_initialize(p->isa, NULL); in validate()
108 disasm_new_inst_group(disasm, p->next_insn_offset); in validate()
111 bool ret = brw_validate_instructions(p->isa, p->store, 0, in validate()
112 p->next_insn_offset, disasm); in validate()
115 dump_assembly(p->store, 0, p->next_insn_offset, disasm, NULL); in validate()
122 #define last_inst (&p->store[p->nr_insn - 1])
131 p->next_insn_offset = 0; in clear_instructions()
132 p->nr_insn = 0; in clear_instructions()
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