Home
last modified time | relevance | path

Searched +full:iproc +full:- +full:i2c (Results 1 – 25 of 47) sorted by relevance

12

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/i2c/
Dbrcm,iproc-i2c.txt1 Broadcom iProc I2C controller
5 - compatible:
6 Must be "brcm,iproc-i2c" or "brcm,iproc-nic-i2c"
8 - reg:
9 Define the base and range of the I/O address space that contain the iProc
10 I2C controller registers
12 - clock-frequency:
13 This is the I2C bus clock. Need to be either 100000 or 400000
15 - #address-cells:
16 Always 1 (for I2C addresses)
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/i2c/
Dbrcm,iproc-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/brcm,iproc-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom iProc I2C controller
10 - Rafał Miłecki <rafal@milecki.pl>
15 - brcm,iproc-i2c
16 - brcm,iproc-nic-i2c
21 clock-frequency:
26 Should contain the I2C interrupt. For certain revisions of the I2C
[all …]
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dbcm-hr2.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
56 compatible = "arm,cortex-a9-pmu";
[all …]
Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
[all …]
Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
[all …]
Dbcm5301x.dtsi6 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
11 #include <dt-bindings/clock/bcm-nsp.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&gic>;
23 compatible = "simple-bus";
[all …]
/kernel/linux/linux-6.6/arch/arm/boot/dts/broadcom/
Dbcm-hr2.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
56 compatible = "arm,cortex-a9-pmu";
[all …]
Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
[all …]
Dbcm-nsp.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-nsp.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
53 #address-cells = <1>;
54 #size-cells = <0>;
58 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
[all …]
Dbcm-ns.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
6 #include <dt-bindings/clock/bcm-nsp.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <1>;
[all …]
Dbcm5301x.dtsi9 #include "bcm-ns.dtsi"
12 mpcore-bus@19000000 {
14 #clock-cells = <0>;
15 compatible = "brcm,nsp-armpll";
21 compatible = "arm,cortex-a9-twd-wdt";
30 compatible = "arm,cortex-a9-pmu";
37 #address-cells = <1>;
38 #size-cells = <1>;
42 #clock-cells = <0>;
43 compatible = "fixed-clock";
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/northstar2/
Dns2.dtsi35 #include <dt-bindings/interrupt-controller/arm-gic.h>
36 #include <dt-bindings/clock/bcm-ns2.h>
40 interrupt-parent = <&gic>;
41 #address-cells = <2>;
42 #size-cells = <2>;
45 #address-cells = <2>;
46 #size-cells = <0>;
50 compatible = "arm,cortex-a57";
52 enable-method = "psci";
53 next-level-cache = <&CLUSTER0_L2>;
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/broadcom/stingray/
Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/broadcom/stingray/
Dstingray.dtsi4 * Copyright(c) 2015-2017 Broadcom. All rights reserved.
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
37 interrupt-parent = <&gic>;
38 #address-cells = <2>;
39 #size-cells = <2>;
42 #address-cells = <2>;
43 #size-cells = <0>;
47 compatible = "arm,cortex-a72";
49 enable-method = "psci";
50 next-level-cache = <&CLUSTER0_L2>;
[all …]
/kernel/linux/linux-5.10/drivers/net/mdio/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 loadable module or built-in.
44 tristate "APM X-Gene SoC MDIO bus controller"
48 APM X-Gene SoC's.
57 third revision of the ASPEED MDIO register interface - the first two
73 tristate "Broadcom iProc MDIO bus controller"
79 Broadcom iProc SoC's.
94 tristate "GPIO lib-based bitbanged MDIO buses"
98 Supports GPIO lib-based MDIO busses.
101 will be called mdio-gpio.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
4 obj-$(CONFIG_OF_MDIO) += of_mdio.o
6 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o
7 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
8 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
9 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
10 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o
11 obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
12 obj-$(CONFIG_MDIO_HISI_FEMAC) += mdio-hisi-femac.o
13 obj-$(CONFIG_MDIO_I2C) += mdio-i2c.o
[all …]
/kernel/linux/linux-6.6/drivers/net/mdio/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 loadable module or built-in.
58 tristate "APM X-Gene SoC MDIO bus controller"
62 APM X-Gene SoC's.
72 third revision of the ASPEED MDIO register interface - the first two
88 tristate "Broadcom iProc MDIO bus controller"
94 Broadcom iProc SoC's.
109 tristate "GPIO lib-based bitbanged MDIO buses"
113 Supports GPIO lib-based MDIO busses.
116 will be called mdio-gpio.
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
4 obj-$(CONFIG_ACPI_MDIO) += acpi_mdio.o
5 obj-$(CONFIG_FWNODE_MDIO) += fwnode_mdio.o
6 obj-$(CONFIG_OF_MDIO) += of_mdio.o
8 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o
9 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
10 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
11 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
12 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o
13 obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o
[all …]
/kernel/linux/linux-5.10/drivers/pinctrl/bcm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
33 bool "Broadcom iProc GPIO (with PINCONF) driver"
40 Say yes here to enable the Broadcom iProc GPIO driver.
42 The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
47 the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
91 The Broadcom Northstar pins driver supports muxing multi-purpose pins
92 that can be used for various functions (e.g. SPI, I2C, UART) as well
/kernel/linux/linux-6.6/drivers/pinctrl/bcm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 If compiled as module it will be called pinctrl-bcm4908.
110 bool "Broadcom iProc GPIO (with PINCONF) driver"
117 Say yes here to enable the Broadcom iProc GPIO driver.
119 The Broadcom iProc based SoCs- Cygnus, NS2, NSP and Stingray, use
124 the always-ON GPIO controller (CRMU/AON). All 3 GPIO controllers are
170 The Broadcom Northstar pins driver supports muxing multi-purpose pins
171 that can be used for various functions (e.g. SPI, I2C, UART) as well
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-bcm-iproc.c1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <linux/i2c.h>
138 #define M_RX_FIFO_MAX_THLD_VALUE (M_TX_RX_FIFO_SIZE - 1)
238 if (iproc_i2c->idm_base) { in iproc_i2c_rd_reg()
239 spin_lock_irqsave(&iproc_i2c->idm_lock, flags); in iproc_i2c_rd_reg()
240 writel(iproc_i2c->ape_addr_mask, in iproc_i2c_rd_reg()
241 iproc_i2c->idm_base + IDM_CTRL_DIRECT_OFFSET); in iproc_i2c_rd_reg()
242 val = readl(iproc_i2c->base + offset); in iproc_i2c_rd_reg()
243 spin_unlock_irqrestore(&iproc_i2c->idm_lock, flags); in iproc_i2c_rd_reg()
245 val = readl(iproc_i2c->base + offset); in iproc_i2c_rd_reg()
[all …]
/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-bcm-iproc.c15 #include <linux/i2c.h>
147 #define M_RX_FIFO_MAX_THLD_VALUE (M_TX_RX_FIFO_SIZE - 1)
247 if (iproc_i2c->idm_base) { in iproc_i2c_rd_reg()
248 spin_lock_irqsave(&iproc_i2c->idm_lock, flags); in iproc_i2c_rd_reg()
249 writel(iproc_i2c->ape_addr_mask, in iproc_i2c_rd_reg()
250 iproc_i2c->idm_base + IDM_CTRL_DIRECT_OFFSET); in iproc_i2c_rd_reg()
251 val = readl(iproc_i2c->base + offset); in iproc_i2c_rd_reg()
252 spin_unlock_irqrestore(&iproc_i2c->idm_lock, flags); in iproc_i2c_rd_reg()
254 val = readl(iproc_i2c->base + offset); in iproc_i2c_rd_reg()
265 if (iproc_i2c->idm_base) { in iproc_i2c_wr_reg()
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for the i2c bus drivers.
7 obj-$(CONFIG_I2C_SCMI) += i2c-scmi.o
10 obj-$(CONFIG_I2C_ALI1535) += i2c-ali1535.o
11 obj-$(CONFIG_I2C_ALI1563) += i2c-ali1563.o
12 obj-$(CONFIG_I2C_ALI15X3) += i2c-ali15x3.o
13 obj-$(CONFIG_I2C_AMD756) += i2c-amd756.o
14 obj-$(CONFIG_I2C_AMD756_S4882) += i2c-amd756-s4882.o
15 obj-$(CONFIG_I2C_AMD8111) += i2c-amd8111.o
16 obj-$(CONFIG_I2C_CHT_WC) += i2c-cht-wc.o
[all …]
/kernel/linux/linux-5.10/drivers/pwm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 bool "Pulse-Width Modulation (PWM) Support"
5 Generic Pulse-Width Modulation (PWM) support.
7 In Pulse-Width Modulation, a variation of the width of pulses
52 will be called pwm-ab8500.
62 will be called pwm-atmel.
70 (Atmel High-end LCD Controller). This PWM output is mainly used
74 will be called pwm-atmel-hlcdc.
86 will be called pwm-atmel-tcb.
89 tristate "iProc PWM support"
[all …]

12